2 * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
4 * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5 * Munro, in turn based on the Linux kernel's PCI implementation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or any later version.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <gpxe/tables.h>
27 #include <gpxe/device.h>
36 static struct pci_driver pci_drivers[0] __table_start ( pci_drivers );
37 static struct pci_driver pci_drivers_end[0] __table_end ( pci_drivers );
39 static void pcibus_remove ( struct root_device *rootdev );
45 * @v reg PCI register number
46 * @ret bar Base address register
48 * Reads the specified PCI base address register, including the flags
49 * portion. 64-bit BARs will be handled automatically. If the value
50 * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
51 * high dword is non-zero on a 32-bit platform), then the value
52 * returned will be zero plus the flags for a 64-bit BAR. Unreachable
53 * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
55 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
59 pci_read_config_dword ( pci, reg, &low );
60 if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
61 == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
62 pci_read_config_dword ( pci, reg + 4, &high );
64 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
65 return ( ( ( uint64_t ) high << 32 ) | low );
67 DBG ( "Unhandled 64-bit BAR %08lx%08lx\n",
69 return PCI_BASE_ADDRESS_MEM_TYPE_64;
77 * Find the start of a PCI BAR
80 * @v reg PCI register number
81 * @ret start BAR start address
83 * Reads the specified PCI base address register, and returns the
84 * address portion of the BAR (i.e. without the flags).
86 * If the address exceeds the size of an unsigned long (i.e. if a
87 * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
88 * return value will be zero.
90 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
93 bar = pci_bar ( pci, reg );
94 if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
95 return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
97 return ( bar & PCI_BASE_ADDRESS_IO_MASK );
102 * Read membase and ioaddr for a PCI device
106 * This scans through all PCI BARs on the specified device. The first
107 * valid memory BAR is recorded as pci_device::membase, and the first
108 * valid IO BAR is recorded as pci_device::ioaddr.
110 * 64-bit BARs are handled automatically. On a 32-bit platform, if a
111 * 64-bit BAR has a non-zero high dword, it will be regarded as
114 static void pci_read_bases ( struct pci_device *pci ) {
118 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
119 bar = pci_bar ( pci, reg );
120 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
123 ( bar & PCI_BASE_ADDRESS_IO_MASK );
125 if ( ! pci->membase )
127 ( bar & PCI_BASE_ADDRESS_MEM_MASK );
128 /* Skip next BAR if 64-bit */
129 if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
140 * Set device to be a busmaster in case BIOS neglected to do so. Also
141 * adjust PCI latency timer to a reasonable value, 32.
143 void adjust_pci_device ( struct pci_device *pci ) {
144 unsigned short new_command, pci_command;
145 unsigned char pci_latency;
147 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
148 new_command = pci_command | PCI_COMMAND_MASTER | PCI_COMMAND_IO;
149 if ( pci_command != new_command ) {
150 DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! "
151 "Updating PCI command %04x->%04x\n", pci->bus,
152 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
153 pci_command, new_command );
154 pci_write_config_word ( pci, PCI_COMMAND, new_command );
157 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
158 if ( pci_latency < 32 ) {
159 DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably "
160 "low at %d. Setting to 32.\n", pci->bus,
161 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
163 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
168 * Register PCI device
171 * @ret rc Return status code
173 * Searches for a driver for the PCI device. If a driver is found,
174 * its probe() routine is called, and the device is added to the
177 static int register_pcidev ( struct pci_device *pci ) {
178 struct pci_driver *driver;
179 struct pci_device_id *id;
183 DBG ( "Registering PCI device %02x:%02x.%x (%04x:%04x mem %lx "
184 "io %lx irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ),
185 PCI_FUNC ( pci->devfn ), pci->vendor, pci->device,
186 pci->membase, pci->ioaddr, pci->irq );
188 for ( driver = pci_drivers ; driver < pci_drivers_end ; driver++ ) {
189 for ( i = 0 ; i < driver->id_count ; i++ ) {
190 id = &driver->ids[i];
191 if ( ( id->vendor != pci->vendor ) ||
192 ( id->device != pci->device ) )
194 pci->driver = driver;
195 pci->name = id->name;
196 DBG ( "...using driver %s\n", pci->name );
197 if ( ( rc = driver->probe ( pci, id ) ) != 0 ) {
198 DBG ( "......probe failed\n" );
201 list_add ( &pci->dev.siblings,
202 &pci->dev.parent->children );
207 DBG ( "...no driver found\n" );
212 * Unregister a PCI device
216 * Calls the device's driver's remove() routine, and removes the
217 * device from the device hierarchy.
219 static void unregister_pcidev ( struct pci_device *pci ) {
220 pci->driver->remove ( pci );
221 list_del ( &pci->dev.siblings );
222 DBG ( "Unregistered PCI device %02x:%02x.%x\n", pci->bus,
223 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) );
229 * @v rootdev PCI bus root device
231 * Scans the PCI bus for devices and registers all devices it can
234 static int pcibus_probe ( struct root_device *rootdev ) {
235 struct pci_device *pci = NULL;
236 unsigned int max_bus;
243 max_bus = pci_max_bus();
244 for ( bus = 0 ; bus <= max_bus ; bus++ ) {
245 for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
247 /* Allocate struct pci_device */
249 pci = malloc ( sizeof ( *pci ) );
254 memset ( pci, 0, sizeof ( *pci ) );
258 /* Skip all but the first function on
259 * non-multifunction cards
261 if ( PCI_FUNC ( devfn ) == 0 ) {
262 pci_read_config_byte ( pci, PCI_HEADER_TYPE,
264 } else if ( ! ( hdrtype & 0x80 ) ) {
268 /* Check for physical device presence */
269 pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
270 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
273 /* Populate struct pci_device */
274 pci->vendor = ( tmp & 0xffff );
275 pci->device = ( tmp >> 16 );
276 pci_read_config_dword ( pci, PCI_REVISION, &tmp );
277 pci->class = ( tmp >> 8 );
278 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE,
280 pci_read_bases ( pci );
281 INIT_LIST_HEAD ( &pci->dev.children );
282 pci->dev.parent = &rootdev->dev;
284 /* Look for a driver */
285 if ( register_pcidev ( pci ) == 0 ) {
286 /* pcidev registered, we can drop our ref */
289 /* Not registered; re-use struct pci_device */
299 pcibus_remove ( rootdev );
304 * Remove PCI root bus
306 * @v rootdev PCI bus root device
308 static void pcibus_remove ( struct root_device *rootdev ) {
309 struct pci_device *pci;
310 struct pci_device *tmp;
312 list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
314 unregister_pcidev ( pci );
319 /** PCI bus root device driver */
320 static struct root_driver pci_root_driver = {
321 .probe = pcibus_probe,
322 .remove = pcibus_remove,
325 /** PCI bus root device */
326 struct root_device pci_root_device __root_device = {
328 .driver = &pci_root_driver,
330 .children = LIST_HEAD_INIT ( pci_root_device.dev.children ),