2 * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
4 * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5 * Munro, in turn based on the Linux kernel's PCI implementation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or any later version.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <gpxe/tables.h>
27 #include <gpxe/device.h>
36 static struct pci_driver pci_drivers[0] __table_start ( pci_drivers );
37 static struct pci_driver pci_drivers_end[0] __table_end ( pci_drivers );
39 static void pcibus_remove ( struct root_device *rootdev );
42 * Maximum PCI bus number
44 * Architecture-specific code may know how many buses we have, in
45 * which case it can overwrite this value.
48 unsigned int pci_max_bus = 0xff;
54 * @v reg PCI register number
55 * @ret bar Base address register
57 * Reads the specified PCI base address register, including the flags
58 * portion. 64-bit BARs will be handled automatically. If the value
59 * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
60 * high dword is non-zero on a 32-bit platform), then the value
61 * returned will be zero plus the flags for a 64-bit BAR. Unreachable
62 * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
64 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
68 pci_read_config_dword ( pci, reg, &low );
69 if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
70 == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
71 pci_read_config_dword ( pci, reg + 4, &high );
73 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
74 return ( ( ( uint64_t ) high << 32 ) | low );
76 DBG ( "Unhandled 64-bit BAR %08x%08x\n",
78 return PCI_BASE_ADDRESS_MEM_TYPE_64;
86 * Find the start of a PCI BAR
89 * @v reg PCI register number
90 * @ret start BAR start address
92 * Reads the specified PCI base address register, and returns the
93 * address portion of the BAR (i.e. without the flags).
95 * If the address exceeds the size of an unsigned long (i.e. if a
96 * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
97 * return value will be zero.
99 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
102 bar = pci_bar ( pci, reg );
103 if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
104 return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
106 return ( bar & PCI_BASE_ADDRESS_IO_MASK );
111 * Read membase and ioaddr for a PCI device
115 * This scans through all PCI BARs on the specified device. The first
116 * valid memory BAR is recorded as pci_device::membase, and the first
117 * valid IO BAR is recorded as pci_device::ioaddr.
119 * 64-bit BARs are handled automatically. On a 32-bit platform, if a
120 * 64-bit BAR has a non-zero high dword, it will be regarded as
123 static void pci_read_bases ( struct pci_device *pci ) {
127 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
128 bar = pci_bar ( pci, reg );
129 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
132 ( bar & PCI_BASE_ADDRESS_IO_MASK );
134 if ( ! pci->membase )
136 ( bar & PCI_BASE_ADDRESS_MEM_MASK );
137 /* Skip next BAR if 64-bit */
138 if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
149 * Set device to be a busmaster in case BIOS neglected to do so. Also
150 * adjust PCI latency timer to a reasonable value, 32.
152 void adjust_pci_device ( struct pci_device *pci ) {
153 unsigned short new_command, pci_command;
154 unsigned char pci_latency;
156 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
157 new_command = pci_command | PCI_COMMAND_MASTER | PCI_COMMAND_IO;
158 if ( pci_command != new_command ) {
159 DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! "
160 "Updating PCI command %04x->%04x\n", pci->bus,
161 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
162 pci_command, new_command );
163 pci_write_config_word ( pci, PCI_COMMAND, new_command );
166 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
167 if ( pci_latency < 32 ) {
168 DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably "
169 "low at %d. Setting to 32.\n", pci->bus,
170 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ),
172 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
177 * Register PCI device
180 * @ret rc Return status code
182 * Searches for a driver for the PCI device. If a driver is found,
183 * its probe() routine is called, and the device is added to the
186 static int register_pcidev ( struct pci_device *pci ) {
187 struct pci_driver *driver;
188 struct pci_device_id *id;
192 DBG ( "Registering PCI device %02x:%02x.%x (%04x:%04x mem %lx "
193 "io %lx irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ),
194 PCI_FUNC ( pci->devfn ), pci->vendor, pci->device,
195 pci->membase, pci->ioaddr, pci->irq );
197 for ( driver = pci_drivers ; driver < pci_drivers_end ; driver++ ) {
198 for ( i = 0 ; i < driver->id_count ; i++ ) {
199 id = &driver->ids[i];
200 if ( ( id->vendor != pci->vendor ) ||
201 ( id->device != pci->device ) )
203 pci->driver = driver;
204 pci->name = id->name;
205 DBG ( "...using driver %s\n", pci->name );
206 if ( ( rc = driver->probe ( pci, id ) ) != 0 ) {
207 DBG ( "......probe failed\n" );
210 list_add ( &pci->dev.siblings,
211 &pci->dev.parent->children );
216 DBG ( "...no driver found\n" );
221 * Unregister a PCI device
225 * Calls the device's driver's remove() routine, and removes the
226 * device from the device hierarchy.
228 static void unregister_pcidev ( struct pci_device *pci ) {
229 pci->driver->remove ( pci );
230 list_del ( &pci->dev.siblings );
231 DBG ( "Unregistered PCI device %02x:%02x.%x\n", pci->bus,
232 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) );
238 * @v rootdev PCI bus root device
240 * Scans the PCI bus for devices and registers all devices it can
243 static int pcibus_probe ( struct root_device *rootdev ) {
244 struct pci_device *pci = NULL;
251 for ( bus = 0 ; bus <= pci_max_bus ; bus++ ) {
252 for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) {
254 /* Allocate struct pci_device */
256 pci = malloc ( sizeof ( *pci ) );
261 memset ( pci, 0, sizeof ( *pci ) );
265 /* Skip all but the first function on
266 * non-multifunction cards
268 if ( PCI_FUNC ( devfn ) == 0 ) {
269 pci_read_config_byte ( pci, PCI_HEADER_TYPE,
271 } else if ( ! ( hdrtype & 0x80 ) ) {
275 /* Check for physical device presence */
276 pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
277 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
280 /* Populate struct pci_device */
281 pci->vendor = ( tmp & 0xffff );
282 pci->device = ( tmp >> 16 );
283 pci_read_config_dword ( pci, PCI_REVISION, &tmp );
284 pci->class = ( tmp >> 8 );
285 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE,
287 pci_read_bases ( pci );
288 INIT_LIST_HEAD ( &pci->dev.children );
289 pci->dev.parent = &rootdev->dev;
291 /* Look for a driver */
292 if ( register_pcidev ( pci ) == 0 ) {
293 /* pcidev registered, we can drop our ref */
296 /* Not registered; re-use struct pci_device */
306 pcibus_remove ( rootdev );
311 * Remove PCI root bus
313 * @v rootdev PCI bus root device
315 static void pcibus_remove ( struct root_device *rootdev ) {
316 struct pci_device *pci;
317 struct pci_device *tmp;
319 list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
321 unregister_pcidev ( pci );
326 /** PCI bus root device driver */
327 static struct root_driver pci_root_driver = {
328 .probe = pcibus_probe,
329 .remove = pcibus_remove,
332 /** PCI bus root device */
333 struct root_device pci_root_device __root_device = {
335 .driver = &pci_root_driver,
337 .children = LIST_HEAD_INIT ( pci_root_device.dev.children ),