8 * pci_io.c may know how many buses we have, in which case it can
9 * overwrite this value.
12 unsigned int pci_max_bus = 0xff;
15 * Increment a bus_loc structure to the next possible PCI location.
16 * Leave the structure zeroed and return 0 if there are no more valid
20 static int pci_next_location ( struct bus_loc *bus_loc ) {
21 struct pci_loc *pci_loc = ( struct pci_loc * ) bus_loc;
24 * Ensure that there is sufficient space in the shared bus
25 * structures for a struct pci_loc and a struct
26 * pci_dev, as mandated by bus.h.
29 BUS_LOC_CHECK ( struct pci_loc );
30 BUS_DEV_CHECK ( struct pci_device );
32 return ( ++pci_loc->busdevfn );
36 * Fill in parameters (vendor & device ids, class, membase etc.) for a
37 * PCI device based on bus & devfn.
39 * Returns 1 if a device was found, 0 for no device present.
42 static int pci_fill_device ( struct bus_dev *bus_dev,
43 struct bus_loc *bus_loc ) {
44 struct pci_loc *pci_loc = ( struct pci_loc * ) bus_loc;
45 struct pci_device *pci = ( struct pci_device * ) bus_dev;
46 uint16_t busdevfn = pci_loc->busdevfn;
54 /* Store busdevfn in struct pci_device and set default values */
55 pci->busdevfn = busdevfn;
58 /* Check bus is within range */
59 if ( PCI_BUS ( busdevfn ) > pci_max_bus ) {
63 /* Check to see if we've cached the result that this is a
64 * non-zero function on a non-existent card. This is done to
65 * increase scan speed by a factor of 8.
67 if ( ( PCI_FUNC ( busdevfn ) != 0 ) &&
68 ( PCI_FN0 ( busdevfn ) == cache.busdevfn0 ) &&
69 ( ! cache.is_present ) ) {
73 /* Check to see if there's anything physically present.
75 pci_read_config_dword ( pci, PCI_VENDOR_ID, &l );
76 /* some broken boards return 0 if a slot is empty: */
77 if ( ( l == 0xffffffff ) || ( l == 0x00000000 ) ) {
78 if ( PCI_FUNC ( busdevfn ) == 0 ) {
79 /* Don't look for subsequent functions if the
80 * card itself is not present.
82 cache.busdevfn0 = busdevfn;
87 pci->vendor_id = l & 0xffff;
88 pci->device_id = ( l >> 16 ) & 0xffff;
90 /* Check that we're not a duplicate function on a
91 * non-multifunction device.
93 if ( PCI_FUNC ( busdevfn ) != 0 ) {
96 pci->busdevfn &= PCI_FN0 ( busdevfn );
97 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &header_type );
98 pci->busdevfn = busdevfn;
100 if ( ! ( header_type & 0x80 ) ) {
105 /* Get device class */
106 pci_read_config_word ( pci, PCI_SUBCLASS_CODE, &pci->class );
109 pci_read_config_byte ( pci, PCI_REVISION, &pci->revision );
111 /* Get the "membase" */
112 pci_read_config_dword ( pci, PCI_BASE_ADDRESS_1, &pci->membase );
114 /* Get the "ioaddr" */
116 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
117 pci_read_config_dword ( pci, reg, &pci->ioaddr );
118 if ( pci->ioaddr & PCI_BASE_ADDRESS_SPACE_IO ) {
119 pci->ioaddr &= PCI_BASE_ADDRESS_IO_MASK;
128 pci_read_config_byte ( pci, PCI_INTERRUPT_PIN, &pci->irq );
130 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
133 DBG ( "PCI found device %hhx:%hhx.%d Class %hx: %hx:%hx (rev %hhx)\n",
134 PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
135 PCI_FUNC ( pci->busdevfn ), pci->class, pci->vendor_id,
136 pci->device_id, pci->revision );
142 * Test whether or not a driver is capable of driving the device.
145 static int pci_check_driver ( struct bus_dev *bus_dev,
146 struct device_driver *device_driver ) {
147 struct pci_device *pci = ( struct pci_device * ) bus_dev;
148 struct pci_driver *pci_driver
149 = ( struct pci_driver * ) device_driver->bus_driver_info;
152 /* If driver has a class, and class matches, use it */
153 if ( pci_driver->class &&
154 ( pci_driver->class == pci->class ) ) {
155 DBG ( "PCI driver %s matches class %hx\n",
156 device_driver->name, pci_driver->class );
157 pci->name = device_driver->name;
161 /* If any of driver's IDs match, use it */
162 for ( i = 0 ; i < pci_driver->id_count; i++ ) {
163 struct pci_id *id = &pci_driver->ids[i];
165 if ( ( pci->vendor_id == id->vendor_id ) &&
166 ( pci->device_id == id->device_id ) ) {
167 DBG ( "PCI driver %s device %s matches ID %hx:%hx\n",
168 device_driver->name, id->name,
169 id->vendor_id, id->device_id );
170 pci->name = id->name;
179 * Describe a PCI device
182 static char * pci_describe_device ( struct bus_dev *bus_dev ) {
183 struct pci_device *pci = ( struct pci_device * ) bus_dev;
184 static char pci_description[] = "PCI 00:00.0";
186 sprintf ( pci_description + 4, "%hhx:%hhx.%d",
187 PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
188 PCI_FUNC ( pci->busdevfn ) );
189 return pci_description;
196 static const char * pci_name_device ( struct bus_dev *bus_dev ) {
197 struct pci_device *pci = ( struct pci_device * ) bus_dev;
203 * PCI bus operations table
206 struct bus_driver pci_driver __bus_driver = {
208 .next_location = pci_next_location,
209 .fill_device = pci_fill_device,
210 .check_driver = pci_check_driver,
211 .describe_device = pci_describe_device,
212 .name_device = pci_name_device,
216 * Set device to be a busmaster in case BIOS neglected to do so. Also
217 * adjust PCI latency timer to a reasonable value, 32.
219 void adjust_pci_device ( struct pci_device *pci ) {
220 unsigned short new_command, pci_command;
221 unsigned char pci_latency;
223 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
224 new_command = pci_command | PCI_COMMAND_MASTER | PCI_COMMAND_IO;
225 if ( pci_command != new_command ) {
226 DBG ( "PCI BIOS has not enabled device %hhx:%hhx.%d! "
227 "Updating PCI command %hX->%hX\n",
228 PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
229 PCI_FUNC ( pci->busdevfn ), pci_command, new_command );
230 pci_write_config_word ( pci, PCI_COMMAND, new_command );
232 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
233 if ( pci_latency < 32 ) {
234 DBG ( "PCI device %hhx:%hhx.%d latency timer is "
235 "unreasonably low at %d. Setting to 32.\n",
236 PCI_BUS ( pci->busdevfn ), PCI_DEV ( pci->busdevfn ),
237 PCI_FUNC ( pci->busdevfn ), pci_latency );
238 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
243 * Find the start of a pci resource.
245 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int index ) {
249 pci_read_config_dword ( pci, index, &lo );
250 if ( lo & PCI_BASE_ADDRESS_SPACE_IO ) {
251 bar = lo & PCI_BASE_ADDRESS_IO_MASK;
254 if ( ( lo & PCI_BASE_ADDRESS_MEM_TYPE_MASK ) ==
255 PCI_BASE_ADDRESS_MEM_TYPE_64) {
256 pci_read_config_dword ( pci, index + 4, &hi );
258 #if ULONG_MAX > 0xffffffff
262 printf ( "Unhandled 64bit BAR %08x:%08x\n",
268 bar |= lo & PCI_BASE_ADDRESS_MEM_MASK;
270 return bar + pci_bus_base ( pci );
274 * Find the size of a pci resource.
276 unsigned long pci_bar_size ( struct pci_device *pci, unsigned int bar ) {
277 uint32_t start, size;
279 /* Save the original bar */
280 pci_read_config_dword ( pci, bar, &start );
281 /* Compute which bits can be set */
282 pci_write_config_dword ( pci, bar, ~0 );
283 pci_read_config_dword ( pci, bar, &size );
284 /* Restore the original size */
285 pci_write_config_dword ( pci, bar, start );
286 /* Find the significant bits */
287 if ( start & PCI_BASE_ADDRESS_SPACE_IO ) {
288 size &= PCI_BASE_ADDRESS_IO_MASK;
290 size &= PCI_BASE_ADDRESS_MEM_MASK;
292 /* Find the lowest bit set */
293 size = size & ~( size - 1 );
298 * pci_find_capability - query for devices' capabilities
299 * @pci: PCI device to query
300 * @cap: capability code
302 * Tell if a device supports a given PCI capability.
303 * Returns the address of the requested capability structure within the
304 * device's PCI configuration space or 0 in case the device does not
305 * support it. Possible values for @cap:
307 * %PCI_CAP_ID_PM Power Management
309 * %PCI_CAP_ID_AGP Accelerated Graphics Port
311 * %PCI_CAP_ID_VPD Vital Product Data
313 * %PCI_CAP_ID_SLOTID Slot Identification
315 * %PCI_CAP_ID_MSI Message Signalled Interrupts
317 * %PCI_CAP_ID_CHSWP CompactPCI HotSwap
319 int pci_find_capability ( struct pci_device *pci, int cap ) {
325 pci_read_config_word ( pci, PCI_STATUS, &status );
326 if ( ! ( status & PCI_STATUS_CAP_LIST ) )
329 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
330 switch ( hdr_type & 0x7F ) {
331 case PCI_HEADER_TYPE_NORMAL:
332 case PCI_HEADER_TYPE_BRIDGE:
334 pci_read_config_byte ( pci, PCI_CAPABILITY_LIST, &pos );
336 case PCI_HEADER_TYPE_CARDBUS:
337 pci_read_config_byte ( pci, PCI_CB_CAPABILITY_LIST, &pos );
340 while ( ttl-- && pos >= 0x40 ) {
342 pci_read_config_byte ( pci, pos + PCI_CAP_LIST_ID, &id );
343 DBG ( "PCI Capability: %d\n", id );
348 pci_read_config_byte ( pci, pos + PCI_CAP_LIST_NEXT, &pos );
354 * Fill in a nic structure
357 void pci_fill_nic ( struct nic *nic, struct pci_device *pci ) {
359 /* Fill in ioaddr and irqno */
360 nic->ioaddr = pci->ioaddr;
361 nic->irqno = pci->irq;
363 /* Fill in DHCP device ID structure */
364 nic->dhcp_dev_id.bus_type = PCI_BUS_TYPE;
365 nic->dhcp_dev_id.vendor_id = htons ( pci->vendor_id );
366 nic->dhcp_dev_id.device_id = htons ( pci->device_id );