2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <gpxe/malloc.h>
30 #include <gpxe/iobuf.h>
31 #include <gpxe/netdevice.h>
32 #include <gpxe/if_ether.h>
33 #include <gpxe/ethernet.h>
44 /** Maximum time to wait for SPI lock */
45 #define PHN_SPI_LOCK_TIMEOUT_MS 100
47 /** Maximum time to wait for SPI command to be issued */
48 #define PHN_SPI_CMD_TIMEOUT_MS 100
50 /** Maximum time to wait for command PEG to initialise
54 * The command PEG will currently report initialisation complete only
55 * when at least one PHY has detected a link (so that the global PHY
56 * clock can be set to 10G/1G as appropriate). This can take a very,
59 * A future firmware revision should decouple PHY initialisation from
60 * firmware initialisation, at which point the command PEG will report
61 * initialisation complete much earlier, and this timeout can be
64 #define PHN_CMDPEG_INIT_TIMEOUT_SEC 50
66 /** Maximum time to wait for receive PEG to initialise */
67 #define PHN_RCVPEG_INIT_TIMEOUT_SEC 2
69 /** Maximum time to wait for firmware to accept a command */
70 #define PHN_ISSUE_CMD_TIMEOUT_MS 2000
72 /** Maximum time to wait for test memory */
73 #define PHN_TEST_MEM_TIMEOUT_MS 100
75 /** Link state poll frequency
77 * The link state will be checked once in every N calls to poll().
79 #define PHN_LINK_POLL_FREQUENCY 4096
81 /** Number of RX descriptors */
82 #define PHN_NUM_RDS 32
84 /** RX maximum fill level. Must be strictly less than PHN_NUM_RDS. */
85 #define PHN_RDS_MAX_FILL 16
88 #define PHN_RX_BUFSIZE ( 32 /* max LL padding added by card */ + \
91 /** Number of RX status descriptors */
92 #define PHN_NUM_SDS 32
94 /** Number of TX descriptors */
97 /** A Phantom descriptor ring set */
98 struct phantom_descriptor_rings {
100 struct phantom_rds rds[PHN_NUM_RDS];
101 /** RX status descriptors */
102 struct phantom_sds sds[PHN_NUM_SDS];
103 /** TX descriptors */
104 union phantom_cds cds[PHN_NUM_CDS];
105 /** TX consumer index */
106 volatile uint32_t cmd_cons;
109 /** A Phantom NIC port */
110 struct phantom_nic_port {
111 /** Phantom NIC containing this port */
112 struct phantom_nic *phantom;
118 uint16_t rx_context_id;
119 /** RX descriptor producer CRB offset */
120 unsigned long rds_producer_crb;
121 /** RX status descriptor consumer CRB offset */
122 unsigned long sds_consumer_crb;
124 /** RX producer index */
125 unsigned int rds_producer_idx;
126 /** RX consumer index */
127 unsigned int rds_consumer_idx;
128 /** RX status consumer index */
129 unsigned int sds_consumer_idx;
130 /** RX I/O buffers */
131 struct io_buffer *rds_iobuf[PHN_RDS_MAX_FILL];
135 uint16_t tx_context_id;
136 /** TX descriptor producer CRB offset */
137 unsigned long cds_producer_crb;
139 /** TX producer index */
140 unsigned int cds_producer_idx;
141 /** TX consumer index */
142 unsigned int cds_consumer_idx;
143 /** TX I/O buffers */
144 struct io_buffer *cds_iobuf[PHN_NUM_CDS];
147 /** Link state poll timer */
148 unsigned long link_poll_timer;
151 /** Descriptor rings */
152 struct phantom_descriptor_rings *desc;
155 /** RX context creation request and response buffers */
156 struct phantom_create_rx_ctx_rqrsp {
158 struct nx_hostrq_rx_ctx_s rx_ctx;
159 struct nx_hostrq_rds_ring_s rds;
160 struct nx_hostrq_sds_ring_s sds;
161 } __unm_dma_aligned hostrq;
163 struct nx_cardrsp_rx_ctx_s rx_ctx;
164 struct nx_cardrsp_rds_ring_s rds;
165 struct nx_cardrsp_sds_ring_s sds;
166 } __unm_dma_aligned cardrsp;
169 /** TX context creation request and response buffers */
170 struct phantom_create_tx_ctx_rqrsp {
172 struct nx_hostrq_tx_ctx_s tx_ctx;
173 } __unm_dma_aligned hostrq;
175 struct nx_cardrsp_tx_ctx_s tx_ctx;
176 } __unm_dma_aligned cardrsp;
179 /** A Phantom DMA buffer area */
180 union phantom_dma_buffer {
181 /** Dummy area required for (read-only) self-tests */
182 uint8_t dummy_dma[UNM_DUMMY_DMA_SIZE];
183 /** RX context creation request and response buffers */
184 struct phantom_create_rx_ctx_rqrsp create_rx_ctx;
185 /** TX context creation request and response buffers */
186 struct phantom_create_tx_ctx_rqrsp create_tx_ctx;
193 /** Current CRB window */
194 unsigned long crb_window;
195 /** CRB window access method */
196 unsigned long ( *crb_access ) ( struct phantom_nic *phantom,
199 /** Number of ports */
201 /** Per-port network devices */
202 struct net_device *netdev[UNM_FLASH_NUM_PORTS];
205 union phantom_dma_buffer *dma_buf;
207 /** Flash memory SPI bus */
208 struct spi_bus spi_bus;
209 /** Flash memory SPI device */
210 struct spi_device flash;
212 /** Last known link state */
216 /***************************************************************************
218 * CRB register access
223 * Prepare for access to CRB register via 128MB BAR
225 * @v phantom Phantom NIC
226 * @v reg Register offset within abstract address space
227 * @ret offset Register offset within PCI BAR0
229 static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
230 unsigned long reg ) {
231 unsigned long offset = ( 0x6000000 + ( reg & 0x1ffffff ) );
232 uint32_t window = ( reg & 0x2000000 );
233 uint32_t verify_window;
235 if ( phantom->crb_window != window ) {
237 /* Write to the CRB window register */
238 writel ( window, phantom->bar0 + UNM_128M_CRB_WINDOW );
240 /* Ensure that the write has reached the card */
241 verify_window = readl ( phantom->bar0 + UNM_128M_CRB_WINDOW );
242 assert ( verify_window == window );
244 /* Record new window */
245 phantom->crb_window = window;
252 * Prepare for access to CRB register via 32MB BAR
254 * @v phantom Phantom NIC
255 * @v reg Register offset within abstract address space
256 * @ret offset Register offset within PCI BAR0
258 static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
259 unsigned long reg ) {
260 unsigned long offset = ( reg & 0x1ffffff );
261 uint32_t window = ( reg & 0x2000000 );
262 uint32_t verify_window;
264 if ( phantom->crb_window != window ) {
266 /* Write to the CRB window register */
267 writel ( window, phantom->bar0 + UNM_32M_CRB_WINDOW );
269 /* Ensure that the write has reached the card */
270 verify_window = readl ( phantom->bar0 + UNM_32M_CRB_WINDOW );
271 assert ( verify_window == window );
273 /* Record new window */
274 phantom->crb_window = window;
281 * Prepare for access to CRB register via 2MB BAR
283 * @v phantom Phantom NIC
284 * @v reg Register offset within abstract address space
285 * @ret offset Register offset within PCI BAR0
287 static unsigned long phantom_crb_access_2m ( struct phantom_nic *phantom,
288 unsigned long reg ) {
289 static const struct {
292 } reg_window_hi[] = {
293 { UNM_CRB_BLK_PCIE, 0x773 },
294 { UNM_CRB_BLK_CAM, 0x416 },
295 { UNM_CRB_BLK_ROMUSB, 0x421 },
296 { UNM_CRB_BLK_TEST, 0x295 },
298 unsigned int block = UNM_CRB_BLK ( reg );
299 unsigned long offset = UNM_CRB_OFFSET ( reg );
301 uint32_t verify_window;
304 for ( i = 0 ; i < ( sizeof ( reg_window_hi ) /
305 sizeof ( reg_window_hi[0] ) ) ; i++ ) {
307 if ( reg_window_hi[i].block != block )
310 window = ( ( reg_window_hi[i].window_hi << 20 ) |
311 ( offset & 0x000f0000 ) );
313 if ( phantom->crb_window != window ) {
315 /* Write to the CRB window register */
316 writel ( window, phantom->bar0 + UNM_2M_CRB_WINDOW );
318 /* Ensure that the write has reached the card */
319 verify_window = readl ( phantom->bar0 +
321 assert ( verify_window == window );
323 /* Record new window */
324 phantom->crb_window = window;
327 return ( 0x1e0000 + ( offset & 0xffff ) );
335 * Read from Phantom CRB register
337 * @v phantom Phantom NIC
338 * @v reg Register offset within abstract address space
339 * @ret value Register value
341 static uint32_t phantom_readl ( struct phantom_nic *phantom,
342 unsigned long reg ) {
343 unsigned long offset;
345 offset = phantom->crb_access ( phantom, reg );
346 return readl ( phantom->bar0 + offset );
350 * Write to Phantom CRB register
352 * @v phantom Phantom NIC
353 * @v value Register value
354 * @v reg Register offset within abstract address space
356 static void phantom_writel ( struct phantom_nic *phantom, uint32_t value,
357 unsigned long reg ) {
358 unsigned long offset;
360 offset = phantom->crb_access ( phantom, reg );
361 writel ( value, phantom->bar0 + offset );
365 * Write to Phantom CRB HI/LO register pair
367 * @v phantom Phantom NIC
368 * @v value Register value
369 * @v lo_offset LO register offset within CRB
370 * @v hi_offset HI register offset within CRB
372 static inline void phantom_write_hilo ( struct phantom_nic *phantom,
374 unsigned long lo_offset,
375 unsigned long hi_offset ) {
376 uint32_t lo = ( value & 0xffffffffUL );
377 uint32_t hi = ( value >> 32 );
379 phantom_writel ( phantom, lo, lo_offset );
380 phantom_writel ( phantom, hi, hi_offset );
383 /***************************************************************************
385 * Firmware message buffer access (for debug)
390 * Read from Phantom test memory
392 * @v phantom Phantom NIC
393 * @v offset Offset within test memory
394 * @v buf 8-byte buffer to fill
395 * @ret rc Return status code
397 static int phantom_read_test_mem_block ( struct phantom_nic *phantom,
398 unsigned long offset,
400 unsigned int retries;
401 uint32_t test_control;
403 phantom_write_hilo ( phantom, offset, UNM_TEST_ADDR_LO,
405 phantom_writel ( phantom, UNM_TEST_CONTROL_ENABLE, UNM_TEST_CONTROL );
406 phantom_writel ( phantom,
407 ( UNM_TEST_CONTROL_ENABLE | UNM_TEST_CONTROL_START ),
410 for ( retries = 0 ; retries < PHN_TEST_MEM_TIMEOUT_MS ; retries++ ) {
411 test_control = phantom_readl ( phantom, UNM_TEST_CONTROL );
412 if ( ( test_control & UNM_TEST_CONTROL_BUSY ) == 0 ) {
413 buf[0] = phantom_readl ( phantom, UNM_TEST_RDDATA_LO );
414 buf[1] = phantom_readl ( phantom, UNM_TEST_RDDATA_HI );
420 DBGC ( phantom, "Phantom %p timed out waiting for test memory\n",
426 * Read single byte from Phantom test memory
428 * @v phantom Phantom NIC
429 * @v offset Offset within test memory
430 * @ret byte Byte read, or negative error
432 static int phantom_read_test_mem ( struct phantom_nic *phantom,
433 unsigned long offset ) {
438 static unsigned long cache_offset = -1UL;
439 unsigned long sub_offset;
442 sub_offset = ( offset & ( sizeof ( cache ) - 1 ) );
443 offset = ( offset & ~( sizeof ( cache ) - 1 ) );
445 if ( cache_offset != offset ) {
446 if ( ( rc = phantom_read_test_mem_block ( phantom, offset,
447 cache.dwords )) !=0 )
449 cache_offset = offset;
452 return cache.bytes[sub_offset];
456 * Dump Phantom firmware dmesg log
458 * @v phantom Phantom NIC
460 * @v max_lines Maximum number of lines to show, or -1 to show all
461 * @ret rc Return status code
463 static int phantom_dmesg ( struct phantom_nic *phantom, unsigned int log,
464 unsigned int max_lines ) {
472 /* Optimise out for non-debug builds */
477 head = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_HEAD ( log ) );
478 len = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_LEN ( log ) );
479 tail = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_TAIL ( log ) );
480 sig = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_SIG ( log ) );
481 DBGC ( phantom, "Phantom %p firmware dmesg buffer %d (%08lx-%08lx)\n",
482 phantom, log, head, tail );
483 assert ( ( head & 0x07 ) == 0 );
484 if ( sig != UNM_CAM_RAM_DMESG_SIG_MAGIC ) {
485 DBGC ( phantom, "Warning: bad signature %08lx (want %08lx)\n",
486 sig, UNM_CAM_RAM_DMESG_SIG_MAGIC );
489 /* Locate start of last (max_lines) lines */
490 for ( offset = tail ; offset > head ; offset-- ) {
491 if ( ( byte = phantom_read_test_mem ( phantom,
492 ( offset - 1 ) ) ) < 0 )
494 if ( ( byte == '\n' ) && ( max_lines-- == 0 ) )
499 for ( ; offset < tail ; offset++ ) {
500 if ( ( byte = phantom_read_test_mem ( phantom, offset ) ) < 0 )
509 * Dump Phantom firmware dmesg logs
511 * @v phantom Phantom NIC
512 * @v max_lines Maximum number of lines to show, or -1 to show all
514 static void __attribute__ (( unused ))
515 phantom_dmesg_all ( struct phantom_nic *phantom, unsigned int max_lines ) {
518 for ( i = 0 ; i < UNM_CAM_RAM_NUM_DMESG_BUFFERS ; i++ )
519 phantom_dmesg ( phantom, i, max_lines );
522 /***************************************************************************
524 * SPI bus access (for flash memory)
529 * Acquire Phantom SPI lock
531 * @v phantom Phantom NIC
532 * @ret rc Return status code
534 static int phantom_spi_lock ( struct phantom_nic *phantom ) {
535 unsigned int retries;
536 uint32_t pcie_sem2_lock;
538 for ( retries = 0 ; retries < PHN_SPI_LOCK_TIMEOUT_MS ; retries++ ) {
539 pcie_sem2_lock = phantom_readl ( phantom, UNM_PCIE_SEM2_LOCK );
540 if ( pcie_sem2_lock != 0 )
545 DBGC ( phantom, "Phantom %p timed out waiting for SPI lock\n",
551 * Wait for Phantom SPI command to complete
553 * @v phantom Phantom NIC
554 * @ret rc Return status code
556 static int phantom_spi_wait ( struct phantom_nic *phantom ) {
557 unsigned int retries;
560 for ( retries = 0 ; retries < PHN_SPI_CMD_TIMEOUT_MS ; retries++ ) {
561 glb_status = phantom_readl ( phantom, UNM_ROMUSB_GLB_STATUS );
562 if ( glb_status & UNM_ROMUSB_GLB_STATUS_ROM_DONE )
567 DBGC ( phantom, "Phantom %p timed out waiting for SPI command\n",
573 * Release Phantom SPI lock
575 * @v phantom Phantom NIC
577 static void phantom_spi_unlock ( struct phantom_nic *phantom ) {
578 phantom_readl ( phantom, UNM_PCIE_SEM2_UNLOCK );
582 * Read/write data via Phantom SPI bus
585 * @v device SPI device
587 * @v address Address to read/write (<0 for no address)
588 * @v data_out TX data buffer (or NULL)
589 * @v data_in RX data buffer (or NULL)
590 * @v len Length of data buffer(s)
591 * @ret rc Return status code
593 static int phantom_spi_rw ( struct spi_bus *bus,
594 struct spi_device *device,
595 unsigned int command, int address,
596 const void *data_out, void *data_in,
598 struct phantom_nic *phantom =
599 container_of ( bus, struct phantom_nic, spi_bus );
603 DBGCP ( phantom, "Phantom %p SPI command %x at %x+%zx\n",
604 phantom, command, address, len );
606 DBGCP_HDA ( phantom, address, data_out, len );
608 /* We support only exactly 4-byte reads */
609 if ( len != UNM_SPI_BLKSIZE ) {
610 DBGC ( phantom, "Phantom %p invalid SPI length %zx\n",
615 /* Acquire SPI lock */
616 if ( ( rc = phantom_spi_lock ( phantom ) ) != 0 )
619 /* Issue SPI command as per the PRM */
621 memcpy ( &data, data_out, sizeof ( data ) );
622 phantom_writel ( phantom, data, UNM_ROMUSB_ROM_WDATA );
624 phantom_writel ( phantom, address, UNM_ROMUSB_ROM_ADDRESS );
625 phantom_writel ( phantom, ( device->address_len / 8 ),
626 UNM_ROMUSB_ROM_ABYTE_CNT );
627 udelay ( 100 ); /* according to PRM */
628 phantom_writel ( phantom, 0, UNM_ROMUSB_ROM_DUMMY_BYTE_CNT );
629 phantom_writel ( phantom, command, UNM_ROMUSB_ROM_INSTR_OPCODE );
631 /* Wait for SPI command to complete */
632 if ( ( rc = phantom_spi_wait ( phantom ) ) != 0 )
635 /* Reset address byte count and dummy byte count, because the
638 phantom_writel ( phantom, 0, UNM_ROMUSB_ROM_ABYTE_CNT );
639 udelay ( 100 ); /* according to PRM */
640 phantom_writel ( phantom, 0, UNM_ROMUSB_ROM_DUMMY_BYTE_CNT );
642 /* Read data, if applicable */
644 data = phantom_readl ( phantom, UNM_ROMUSB_ROM_RDATA );
645 memcpy ( data_in, &data, sizeof ( data ) );
646 DBGCP_HDA ( phantom, address, data_in, len );
650 phantom_spi_unlock ( phantom );
655 /***************************************************************************
662 * Wait for firmware to accept command
664 * @v phantom Phantom NIC
665 * @ret rc Return status code
667 static int phantom_wait_for_cmd ( struct phantom_nic *phantom ) {
668 unsigned int retries;
671 for ( retries = 0 ; retries < PHN_ISSUE_CMD_TIMEOUT_MS ; retries++ ) {
673 cdrp = phantom_readl ( phantom, UNM_NIC_REG_NX_CDRP );
674 if ( NX_CDRP_IS_RSP ( cdrp ) ) {
675 switch ( NX_CDRP_FORM_RSP ( cdrp ) ) {
678 case NX_CDRP_RSP_FAIL:
680 case NX_CDRP_RSP_TIMEOUT:
688 DBGC ( phantom, "Phantom %p timed out waiting for firmware to accept "
689 "command\n", phantom );
694 * Issue command to firmware
696 * @v phantom_port Phantom NIC port
697 * @v command Firmware command
701 * @ret rc Return status code
703 static int phantom_issue_cmd ( struct phantom_nic_port *phantom_port,
704 uint32_t command, uint32_t arg1, uint32_t arg2,
706 struct phantom_nic *phantom = phantom_port->phantom;
711 signature = NX_CDRP_SIGNATURE_MAKE ( phantom_port->port,
713 DBGC2 ( phantom, "Phantom %p port %d issuing command %08lx (%08lx, "
714 "%08lx, %08lx)\n", phantom, phantom_port->port,
715 command, arg1, arg2, arg3 );
716 phantom_writel ( phantom, signature, UNM_NIC_REG_NX_SIGN );
717 phantom_writel ( phantom, arg1, UNM_NIC_REG_NX_ARG1 );
718 phantom_writel ( phantom, arg2, UNM_NIC_REG_NX_ARG2 );
719 phantom_writel ( phantom, arg3, UNM_NIC_REG_NX_ARG3 );
720 phantom_writel ( phantom, NX_CDRP_FORM_CMD ( command ),
721 UNM_NIC_REG_NX_CDRP );
723 /* Wait for command to be accepted */
724 if ( ( rc = phantom_wait_for_cmd ( phantom ) ) != 0 ) {
725 DBGC ( phantom, "Phantom %p could not issue command: %s\n",
726 phantom, strerror ( rc ) );
734 * Issue buffer-format command to firmware
736 * @v phantom_port Phantom NIC port
737 * @v command Firmware command
738 * @v buffer Buffer to pass to firmware
739 * @v len Length of buffer
740 * @ret rc Return status code
742 static int phantom_issue_buf_cmd ( struct phantom_nic_port *phantom_port,
743 uint32_t command, void *buffer,
747 physaddr = virt_to_bus ( buffer );
748 return phantom_issue_cmd ( phantom_port, command, ( physaddr >> 32 ),
749 ( physaddr & 0xffffffffUL ), len );
753 * Create Phantom RX context
755 * @v phantom_port Phantom NIC port
756 * @ret rc Return status code
758 static int phantom_create_rx_ctx ( struct phantom_nic_port *phantom_port ) {
759 struct phantom_nic *phantom = phantom_port->phantom;
760 struct phantom_create_rx_ctx_rqrsp *buf;
763 /* Prepare request */
764 buf = &phantom->dma_buf->create_rx_ctx;
765 memset ( buf, 0, sizeof ( *buf ) );
766 buf->hostrq.rx_ctx.host_rsp_dma_addr =
767 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
768 buf->hostrq.rx_ctx.capabilities[0] =
769 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
770 buf->hostrq.rx_ctx.host_int_crb_mode =
771 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
772 buf->hostrq.rx_ctx.host_rds_crb_mode =
773 cpu_to_le32 ( NX_HOST_RDS_CRB_MODE_UNIQUE );
774 buf->hostrq.rx_ctx.rds_ring_offset = cpu_to_le32 ( 0 );
775 buf->hostrq.rx_ctx.sds_ring_offset =
776 cpu_to_le32 ( sizeof ( buf->hostrq.rds ) );
777 buf->hostrq.rx_ctx.num_rds_rings = cpu_to_le16 ( 1 );
778 buf->hostrq.rx_ctx.num_sds_rings = cpu_to_le16 ( 1 );
779 buf->hostrq.rds.host_phys_addr =
780 cpu_to_le64 ( virt_to_bus ( phantom_port->desc->rds ) );
781 buf->hostrq.rds.buff_size = cpu_to_le64 ( PHN_RX_BUFSIZE );
782 buf->hostrq.rds.ring_size = cpu_to_le32 ( PHN_NUM_RDS );
783 buf->hostrq.rds.ring_kind = cpu_to_le32 ( NX_RDS_RING_TYPE_NORMAL );
784 buf->hostrq.sds.host_phys_addr =
785 cpu_to_le64 ( virt_to_bus ( phantom_port->desc->sds ) );
786 buf->hostrq.sds.ring_size = cpu_to_le32 ( PHN_NUM_SDS );
788 DBGC ( phantom, "Phantom %p port %d creating RX context\n",
789 phantom, phantom_port->port );
790 DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
791 &buf->hostrq, sizeof ( buf->hostrq ) );
794 if ( ( rc = phantom_issue_buf_cmd ( phantom_port,
795 NX_CDRP_CMD_CREATE_RX_CTX,
797 sizeof ( buf->hostrq ) ) ) != 0 ) {
798 DBGC ( phantom, "Phantom %p port %d could not create RX "
800 phantom, phantom_port->port, strerror ( rc ) );
801 DBGC ( phantom, "Request:\n" );
802 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
803 &buf->hostrq, sizeof ( buf->hostrq ) );
804 DBGC ( phantom, "Response:\n" );
805 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
806 &buf->cardrsp, sizeof ( buf->cardrsp ) );
810 /* Retrieve context parameters */
811 phantom_port->rx_context_id =
812 le16_to_cpu ( buf->cardrsp.rx_ctx.context_id );
813 phantom_port->rds_producer_crb =
815 le32_to_cpu ( buf->cardrsp.rds.host_producer_crb ));
816 phantom_port->sds_consumer_crb =
818 le32_to_cpu ( buf->cardrsp.sds.host_consumer_crb ));
820 DBGC ( phantom, "Phantom %p port %d created RX context (id %04x, "
821 "port phys %02x virt %02x)\n", phantom, phantom_port->port,
822 phantom_port->rx_context_id, buf->cardrsp.rx_ctx.phys_port,
823 buf->cardrsp.rx_ctx.virt_port );
824 DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
825 &buf->cardrsp, sizeof ( buf->cardrsp ) );
826 DBGC ( phantom, "Phantom %p port %d RDS producer CRB is %08lx\n",
827 phantom, phantom_port->port, phantom_port->rds_producer_crb );
828 DBGC ( phantom, "Phantom %p port %d SDS consumer CRB is %08lx\n",
829 phantom, phantom_port->port, phantom_port->sds_consumer_crb );
835 * Destroy Phantom RX context
837 * @v phantom_port Phantom NIC port
838 * @ret rc Return status code
840 static void phantom_destroy_rx_ctx ( struct phantom_nic_port *phantom_port ) {
841 struct phantom_nic *phantom = phantom_port->phantom;
844 DBGC ( phantom, "Phantom %p port %d destroying RX context (id %04x)\n",
845 phantom, phantom_port->port, phantom_port->rx_context_id );
848 if ( ( rc = phantom_issue_cmd ( phantom_port,
849 NX_CDRP_CMD_DESTROY_RX_CTX,
850 phantom_port->rx_context_id,
851 NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
852 DBGC ( phantom, "Phantom %p port %d could not destroy RX "
854 phantom, phantom_port->port, strerror ( rc ) );
855 /* We're probably screwed */
859 /* Clear context parameters */
860 phantom_port->rx_context_id = 0;
861 phantom_port->rds_producer_crb = 0;
862 phantom_port->sds_consumer_crb = 0;
864 /* Reset software counters */
865 phantom_port->rds_producer_idx = 0;
866 phantom_port->rds_consumer_idx = 0;
867 phantom_port->sds_consumer_idx = 0;
871 * Create Phantom TX context
873 * @v phantom_port Phantom NIC port
874 * @ret rc Return status code
876 static int phantom_create_tx_ctx ( struct phantom_nic_port *phantom_port ) {
877 struct phantom_nic *phantom = phantom_port->phantom;
878 struct phantom_create_tx_ctx_rqrsp *buf;
881 /* Prepare request */
882 buf = &phantom->dma_buf->create_tx_ctx;
883 memset ( buf, 0, sizeof ( *buf ) );
884 buf->hostrq.tx_ctx.host_rsp_dma_addr =
885 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
886 buf->hostrq.tx_ctx.cmd_cons_dma_addr =
887 cpu_to_le64 ( virt_to_bus ( &phantom_port->desc->cmd_cons ) );
888 buf->hostrq.tx_ctx.dummy_dma_addr =
889 cpu_to_le64 ( virt_to_bus ( phantom->dma_buf->dummy_dma ) );
890 buf->hostrq.tx_ctx.capabilities[0] =
891 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
892 buf->hostrq.tx_ctx.host_int_crb_mode =
893 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
894 buf->hostrq.tx_ctx.cds_ring.host_phys_addr =
895 cpu_to_le64 ( virt_to_bus ( phantom_port->desc->cds ) );
896 buf->hostrq.tx_ctx.cds_ring.ring_size = cpu_to_le32 ( PHN_NUM_CDS );
898 DBGC ( phantom, "Phantom %p port %d creating TX context\n",
899 phantom, phantom_port->port );
900 DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
901 &buf->hostrq, sizeof ( buf->hostrq ) );
904 if ( ( rc = phantom_issue_buf_cmd ( phantom_port,
905 NX_CDRP_CMD_CREATE_TX_CTX,
907 sizeof ( buf->hostrq ) ) ) != 0 ) {
908 DBGC ( phantom, "Phantom %p port %d could not create TX "
910 phantom, phantom_port->port, strerror ( rc ) );
911 DBGC ( phantom, "Request:\n" );
912 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
913 &buf->hostrq, sizeof ( buf->hostrq ) );
914 DBGC ( phantom, "Response:\n" );
915 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
916 &buf->cardrsp, sizeof ( buf->cardrsp ) );
920 /* Retrieve context parameters */
921 phantom_port->tx_context_id =
922 le16_to_cpu ( buf->cardrsp.tx_ctx.context_id );
923 phantom_port->cds_producer_crb =
925 le32_to_cpu(buf->cardrsp.tx_ctx.cds_ring.host_producer_crb));
927 DBGC ( phantom, "Phantom %p port %d created TX context (id %04x, "
928 "port phys %02x virt %02x)\n", phantom, phantom_port->port,
929 phantom_port->tx_context_id, buf->cardrsp.tx_ctx.phys_port,
930 buf->cardrsp.tx_ctx.virt_port );
931 DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
932 &buf->cardrsp, sizeof ( buf->cardrsp ) );
933 DBGC ( phantom, "Phantom %p port %d CDS producer CRB is %08lx\n",
934 phantom, phantom_port->port, phantom_port->cds_producer_crb );
940 * Destroy Phantom TX context
942 * @v phantom_port Phantom NIC port
943 * @ret rc Return status code
945 static void phantom_destroy_tx_ctx ( struct phantom_nic_port *phantom_port ) {
946 struct phantom_nic *phantom = phantom_port->phantom;
949 DBGC ( phantom, "Phantom %p port %d destroying TX context (id %04x)\n",
950 phantom, phantom_port->port, phantom_port->tx_context_id );
953 if ( ( rc = phantom_issue_cmd ( phantom_port,
954 NX_CDRP_CMD_DESTROY_TX_CTX,
955 phantom_port->tx_context_id,
956 NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
957 DBGC ( phantom, "Phantom %p port %d could not destroy TX "
959 phantom, phantom_port->port, strerror ( rc ) );
960 /* We're probably screwed */
964 /* Clear context parameters */
965 phantom_port->tx_context_id = 0;
966 phantom_port->cds_producer_crb = 0;
968 /* Reset software counters */
969 phantom_port->cds_producer_idx = 0;
970 phantom_port->cds_consumer_idx = 0;
973 /***************************************************************************
975 * Descriptor ring management
980 * Allocate Phantom RX descriptor
982 * @v phantom_port Phantom NIC port
983 * @ret index RX descriptor index, or negative error
985 static int phantom_alloc_rds ( struct phantom_nic_port *phantom_port ) {
986 struct phantom_nic *phantom = phantom_port->phantom;
987 unsigned int rds_producer_idx;
988 unsigned int next_rds_producer_idx;
990 /* Check for space in the ring. RX descriptors are consumed
991 * out of order, but they are *read* by the hardware in strict
992 * order. We maintain a pessimistic consumer index, which is
993 * guaranteed never to be an overestimate of the number of
994 * descriptors read by the hardware.
996 rds_producer_idx = phantom_port->rds_producer_idx;
997 next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
998 if ( next_rds_producer_idx == phantom_port->rds_consumer_idx ) {
999 DBGC ( phantom, "Phantom %p port %d RDS ring full (index %d "
1000 "not consumed)\n", phantom, phantom_port->port,
1001 next_rds_producer_idx );
1005 return rds_producer_idx;
1009 * Post Phantom RX descriptor
1011 * @v phantom_port Phantom NIC port
1012 * @v rds RX descriptor
1014 static void phantom_post_rds ( struct phantom_nic_port *phantom_port,
1015 struct phantom_rds *rds ) {
1016 struct phantom_nic *phantom = phantom_port->phantom;
1017 unsigned int rds_producer_idx;
1018 unsigned int next_rds_producer_idx;
1019 struct phantom_rds *entry;
1021 /* Copy descriptor to ring */
1022 rds_producer_idx = phantom_port->rds_producer_idx;
1023 entry = &phantom_port->desc->rds[rds_producer_idx];
1024 memcpy ( entry, rds, sizeof ( *entry ) );
1025 DBGC2 ( phantom, "Phantom %p port %d posting RDS %ld (slot %d):\n",
1026 phantom, phantom_port->port, NX_GET ( rds, handle ),
1028 DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
1030 /* Update producer index */
1031 next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
1032 phantom_port->rds_producer_idx = next_rds_producer_idx;
1034 phantom_writel ( phantom, phantom_port->rds_producer_idx,
1035 phantom_port->rds_producer_crb );
1039 * Allocate Phantom TX descriptor
1041 * @v phantom_port Phantom NIC port
1042 * @ret index TX descriptor index, or negative error
1044 static int phantom_alloc_cds ( struct phantom_nic_port *phantom_port ) {
1045 struct phantom_nic *phantom = phantom_port->phantom;
1046 unsigned int cds_producer_idx;
1047 unsigned int next_cds_producer_idx;
1049 /* Check for space in the ring. TX descriptors are consumed
1050 * in strict order, so we just check for a collision against
1051 * the consumer index.
1053 cds_producer_idx = phantom_port->cds_producer_idx;
1054 next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
1055 if ( next_cds_producer_idx == phantom_port->cds_consumer_idx ) {
1056 DBGC ( phantom, "Phantom %p port %d CDS ring full (index %d "
1057 "not consumed)\n", phantom, phantom_port->port,
1058 next_cds_producer_idx );
1062 return cds_producer_idx;
1066 * Post Phantom TX descriptor
1068 * @v phantom_port Phantom NIC port
1069 * @v cds TX descriptor
1071 static void phantom_post_cds ( struct phantom_nic_port *phantom_port,
1072 union phantom_cds *cds ) {
1073 struct phantom_nic *phantom = phantom_port->phantom;
1074 unsigned int cds_producer_idx;
1075 unsigned int next_cds_producer_idx;
1076 union phantom_cds *entry;
1078 /* Copy descriptor to ring */
1079 cds_producer_idx = phantom_port->cds_producer_idx;
1080 entry = &phantom_port->desc->cds[cds_producer_idx];
1081 memcpy ( entry, cds, sizeof ( *entry ) );
1082 DBGC2 ( phantom, "Phantom %p port %d posting CDS %d:\n",
1083 phantom, phantom_port->port, cds_producer_idx );
1084 DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
1086 /* Update producer index */
1087 next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
1088 phantom_port->cds_producer_idx = next_cds_producer_idx;
1090 phantom_writel ( phantom, phantom_port->cds_producer_idx,
1091 phantom_port->cds_producer_crb );
1094 /***************************************************************************
1096 * MAC address management
1101 * Add/remove MAC address
1103 * @v phantom_port Phantom NIC port
1104 * @v ll_addr MAC address to add or remove
1105 * @v opcode MAC request opcode
1106 * @ret rc Return status code
1108 static int phantom_update_macaddr ( struct phantom_nic_port *phantom_port,
1109 const uint8_t *ll_addr,
1110 unsigned int opcode ) {
1111 union phantom_cds cds;
1114 /* Get descriptor ring entry */
1115 index = phantom_alloc_cds ( phantom_port );
1119 /* Fill descriptor ring entry */
1120 memset ( &cds, 0, sizeof ( cds ) );
1121 NX_FILL_1 ( &cds, 0,
1122 nic_request.common.opcode, UNM_NIC_REQUEST );
1123 NX_FILL_2 ( &cds, 1,
1124 nic_request.header.opcode, UNM_MAC_EVENT,
1125 nic_request.header.context_id, phantom_port->port );
1126 NX_FILL_7 ( &cds, 2,
1127 nic_request.body.mac_request.opcode, opcode,
1128 nic_request.body.mac_request.mac_addr_0, ll_addr[0],
1129 nic_request.body.mac_request.mac_addr_1, ll_addr[1],
1130 nic_request.body.mac_request.mac_addr_2, ll_addr[2],
1131 nic_request.body.mac_request.mac_addr_3, ll_addr[3],
1132 nic_request.body.mac_request.mac_addr_4, ll_addr[4],
1133 nic_request.body.mac_request.mac_addr_5, ll_addr[5] );
1135 /* Post descriptor */
1136 phantom_post_cds ( phantom_port, &cds );
1144 * @v phantom_port Phantom NIC port
1145 * @v ll_addr MAC address to add or remove
1146 * @ret rc Return status code
1148 static inline int phantom_add_macaddr ( struct phantom_nic_port *phantom_port,
1149 const uint8_t *ll_addr ) {
1150 struct phantom_nic *phantom = phantom_port->phantom;
1152 DBGC ( phantom, "Phantom %p port %d adding MAC address %s\n",
1153 phantom, phantom_port->port, eth_ntoa ( ll_addr ) );
1155 return phantom_update_macaddr ( phantom_port, ll_addr, UNM_MAC_ADD );
1159 * Remove MAC address
1161 * @v phantom_port Phantom NIC port
1162 * @v ll_addr MAC address to add or remove
1163 * @ret rc Return status code
1165 static inline int phantom_del_macaddr ( struct phantom_nic_port *phantom_port,
1166 const uint8_t *ll_addr ) {
1167 struct phantom_nic *phantom = phantom_port->phantom;
1169 DBGC ( phantom, "Phantom %p port %d removing MAC address %s\n",
1170 phantom, phantom_port->port, eth_ntoa ( ll_addr ) );
1172 return phantom_update_macaddr ( phantom_port, ll_addr, UNM_MAC_DEL );
1175 /***************************************************************************
1177 * Link state detection
1184 * @v phantom Phantom NIC
1186 static void phantom_poll_link_state ( struct phantom_nic *phantom ) {
1187 struct net_device *netdev;
1188 struct phantom_nic_port *phantom_port;
1189 uint32_t xg_state_p3;
1193 /* Read link state */
1194 xg_state_p3 = phantom_readl ( phantom, UNM_NIC_REG_XG_STATE_P3 );
1196 /* If there is no change, do nothing */
1197 if ( phantom->link_state == xg_state_p3 )
1200 /* Record new link state */
1201 DBGC ( phantom, "Phantom %p new link state %08lx (was %08lx)\n",
1202 phantom, xg_state_p3, phantom->link_state );
1203 phantom->link_state = xg_state_p3;
1205 /* Indicate per-port link state to gPXE */
1206 for ( i = 0 ; i < phantom->num_ports ; i++ ) {
1207 netdev = phantom->netdev[i];
1208 phantom_port = netdev_priv ( netdev );
1209 link = UNM_NIC_REG_XG_STATE_P3_LINK ( phantom_port->port,
1210 phantom->link_state );
1212 case UNM_NIC_REG_XG_STATE_P3_LINK_UP:
1213 DBGC ( phantom, "Phantom %p port %d link is up\n",
1214 phantom, phantom_port->port );
1215 netdev_link_up ( netdev );
1217 case UNM_NIC_REG_XG_STATE_P3_LINK_DOWN:
1218 DBGC ( phantom, "Phantom %p port %d link is down\n",
1219 phantom, phantom_port->port );
1220 netdev_link_down ( netdev );
1223 DBGC ( phantom, "Phantom %p port %d bad link state "
1224 "%d\n", phantom, phantom_port->port, link );
1230 /***************************************************************************
1237 * Refill descriptor ring
1239 * @v netdev Net device
1241 static void phantom_refill_rx_ring ( struct net_device *netdev ) {
1242 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1243 struct io_buffer *iobuf;
1244 struct phantom_rds rds;
1245 unsigned int handle;
1248 for ( handle = 0 ; handle < PHN_RDS_MAX_FILL ; handle++ ) {
1250 /* Skip this index if the descriptor has not yet been
1253 if ( phantom_port->rds_iobuf[handle] != NULL )
1256 /* Allocate descriptor ring entry */
1257 index = phantom_alloc_rds ( phantom_port );
1258 assert ( PHN_RDS_MAX_FILL < PHN_NUM_RDS );
1259 assert ( index >= 0 ); /* Guaranteed by MAX_FILL < NUM_RDS ) */
1261 /* Try to allocate an I/O buffer */
1262 iobuf = alloc_iob ( PHN_RX_BUFSIZE );
1264 /* Failure is non-fatal; we will retry later */
1265 netdev_rx_err ( netdev, NULL, -ENOMEM );
1269 /* Fill descriptor ring entry */
1270 memset ( &rds, 0, sizeof ( rds ) );
1271 NX_FILL_2 ( &rds, 0,
1273 length, iob_len ( iobuf ) );
1274 NX_FILL_1 ( &rds, 1,
1275 dma_addr, virt_to_bus ( iobuf->data ) );
1277 /* Record I/O buffer */
1278 assert ( phantom_port->rds_iobuf[handle] == NULL );
1279 phantom_port->rds_iobuf[handle] = iobuf;
1281 /* Post descriptor */
1282 phantom_post_rds ( phantom_port, &rds );
1289 * @v netdev Net device
1290 * @ret rc Return status code
1292 static int phantom_open ( struct net_device *netdev ) {
1293 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1296 /* Allocate and zero descriptor rings */
1297 phantom_port->desc = malloc_dma ( sizeof ( *(phantom_port->desc) ),
1298 UNM_DMA_BUFFER_ALIGN );
1299 if ( ! phantom_port->desc ) {
1301 goto err_alloc_desc;
1303 memset ( phantom_port->desc, 0, sizeof ( *(phantom_port->desc) ) );
1305 /* Create RX context */
1306 if ( ( rc = phantom_create_rx_ctx ( phantom_port ) ) != 0 )
1307 goto err_create_rx_ctx;
1309 /* Create TX context */
1310 if ( ( rc = phantom_create_tx_ctx ( phantom_port ) ) != 0 )
1311 goto err_create_tx_ctx;
1313 /* Fill the RX descriptor ring */
1314 phantom_refill_rx_ring ( netdev );
1316 /* Add MAC addresses
1320 * We would like to be able to enable receiving all multicast
1321 * packets (or, failing that, promiscuous mode), but the
1322 * firmware doesn't currently support this.
1324 if ( ( rc = phantom_add_macaddr ( phantom_port,
1325 netdev->ll_protocol->ll_broadcast ) ) != 0 )
1326 goto err_add_macaddr_broadcast;
1327 if ( ( rc = phantom_add_macaddr ( phantom_port,
1328 netdev->ll_addr ) ) != 0 )
1329 goto err_add_macaddr_unicast;
1333 phantom_del_macaddr ( phantom_port, netdev->ll_addr );
1334 err_add_macaddr_unicast:
1335 phantom_del_macaddr ( phantom_port,
1336 netdev->ll_protocol->ll_broadcast );
1337 err_add_macaddr_broadcast:
1338 phantom_destroy_tx_ctx ( phantom_port );
1340 phantom_destroy_rx_ctx ( phantom_port );
1342 free_dma ( phantom_port->desc, sizeof ( *(phantom_port->desc) ) );
1343 phantom_port->desc = NULL;
1351 * @v netdev Net device
1353 static void phantom_close ( struct net_device *netdev ) {
1354 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1355 struct io_buffer *iobuf;
1358 /* Shut down the port */
1359 phantom_del_macaddr ( phantom_port, netdev->ll_addr );
1360 phantom_del_macaddr ( phantom_port,
1361 netdev->ll_protocol->ll_broadcast );
1362 phantom_destroy_tx_ctx ( phantom_port );
1363 phantom_destroy_rx_ctx ( phantom_port );
1364 free_dma ( phantom_port->desc, sizeof ( *(phantom_port->desc) ) );
1365 phantom_port->desc = NULL;
1367 /* Flush any uncompleted descriptors */
1368 for ( i = 0 ; i < PHN_RDS_MAX_FILL ; i++ ) {
1369 iobuf = phantom_port->rds_iobuf[i];
1372 phantom_port->rds_iobuf[i] = NULL;
1375 for ( i = 0 ; i < PHN_NUM_CDS ; i++ ) {
1376 iobuf = phantom_port->cds_iobuf[i];
1378 netdev_tx_complete_err ( netdev, iobuf, -ECANCELED );
1379 phantom_port->cds_iobuf[i] = NULL;
1387 * @v netdev Network device
1388 * @v iobuf I/O buffer
1389 * @ret rc Return status code
1391 static int phantom_transmit ( struct net_device *netdev,
1392 struct io_buffer *iobuf ) {
1393 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1394 union phantom_cds cds;
1397 /* Get descriptor ring entry */
1398 index = phantom_alloc_cds ( phantom_port );
1402 /* Fill descriptor ring entry */
1403 memset ( &cds, 0, sizeof ( cds ) );
1404 NX_FILL_3 ( &cds, 0,
1405 tx.opcode, UNM_TX_ETHER_PKT,
1407 tx.length, iob_len ( iobuf ) );
1408 NX_FILL_2 ( &cds, 2,
1409 tx.port, phantom_port->port,
1410 tx.context_id, phantom_port->port );
1411 NX_FILL_1 ( &cds, 4,
1412 tx.buffer1_dma_addr, virt_to_bus ( iobuf->data ) );
1413 NX_FILL_1 ( &cds, 5,
1414 tx.buffer1_length, iob_len ( iobuf ) );
1416 /* Record I/O buffer */
1417 assert ( phantom_port->cds_iobuf[index] == NULL );
1418 phantom_port->cds_iobuf[index] = iobuf;
1420 /* Post descriptor */
1421 phantom_post_cds ( phantom_port, &cds );
1427 * Poll for received packets
1429 * @v netdev Network device
1431 static void phantom_poll ( struct net_device *netdev ) {
1432 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1433 struct phantom_nic *phantom = phantom_port->phantom;
1434 struct io_buffer *iobuf;
1435 unsigned int cds_consumer_idx;
1436 unsigned int raw_new_cds_consumer_idx;
1437 unsigned int new_cds_consumer_idx;
1438 unsigned int rds_consumer_idx;
1439 unsigned int sds_consumer_idx;
1440 struct phantom_sds *sds;
1441 unsigned int sds_handle;
1442 unsigned int sds_opcode;
1444 /* Check for TX completions */
1445 cds_consumer_idx = phantom_port->cds_consumer_idx;
1446 raw_new_cds_consumer_idx = phantom_port->desc->cmd_cons;
1447 new_cds_consumer_idx = le32_to_cpu ( raw_new_cds_consumer_idx );
1448 while ( cds_consumer_idx != new_cds_consumer_idx ) {
1449 DBGC2 ( phantom, "Phantom %p port %d CDS %d complete\n",
1450 phantom, phantom_port->port, cds_consumer_idx );
1451 /* Completions may be for commands other than TX, so
1452 * there may not always be an associated I/O buffer.
1454 if ( ( iobuf = phantom_port->cds_iobuf[cds_consumer_idx] ) ) {
1455 netdev_tx_complete ( netdev, iobuf );
1456 phantom_port->cds_iobuf[cds_consumer_idx] = NULL;
1458 cds_consumer_idx = ( ( cds_consumer_idx + 1 ) % PHN_NUM_CDS );
1459 phantom_port->cds_consumer_idx = cds_consumer_idx;
1462 /* Check for received packets */
1463 rds_consumer_idx = phantom_port->rds_consumer_idx;
1464 sds_consumer_idx = phantom_port->sds_consumer_idx;
1466 sds = &phantom_port->desc->sds[sds_consumer_idx];
1467 if ( NX_GET ( sds, owner ) == 0 )
1470 DBGC2 ( phantom, "Phantom %p port %d SDS %d status:\n",
1471 phantom, phantom_port->port, sds_consumer_idx );
1472 DBGC2_HDA ( phantom, virt_to_bus ( sds ), sds, sizeof (*sds) );
1474 /* Check received opcode */
1475 sds_opcode = NX_GET ( sds, opcode );
1476 if ( ( sds_opcode == UNM_RXPKT_DESC ) ||
1477 ( sds_opcode == UNM_SYN_OFFLOAD ) ) {
1479 /* Sanity check: ensure that all of the SDS
1480 * descriptor has been written.
1482 if ( NX_GET ( sds, total_length ) == 0 ) {
1483 DBGC ( phantom, "Phantom %p port %d SDS %d "
1484 "incomplete; deferring\n", phantom,
1485 phantom_port->port, sds_consumer_idx );
1486 /* Leave for next poll() */
1490 /* Process received packet */
1491 sds_handle = NX_GET ( sds, handle );
1492 iobuf = phantom_port->rds_iobuf[sds_handle];
1493 assert ( iobuf != NULL );
1494 iob_put ( iobuf, NX_GET ( sds, total_length ) );
1495 iob_pull ( iobuf, NX_GET ( sds, pkt_offset ) );
1496 DBGC2 ( phantom, "Phantom %p port %d RDS %d "
1498 phantom, phantom_port->port, sds_handle );
1499 netdev_rx ( netdev, iobuf );
1500 phantom_port->rds_iobuf[sds_handle] = NULL;
1502 /* Update RDS consumer counter. This is a
1503 * lower bound for the number of descriptors
1504 * that have been read by the hardware, since
1505 * the hardware must have read at least one
1506 * descriptor for each completion that we
1510 ( ( rds_consumer_idx + 1 ) % PHN_NUM_RDS );
1511 phantom_port->rds_consumer_idx = rds_consumer_idx;
1515 DBGC ( phantom, "Phantom %p port %d unexpected SDS "
1517 phantom, phantom_port->port, sds_opcode );
1518 DBGC_HDA ( phantom, virt_to_bus ( sds ),
1519 sds, sizeof ( *sds ) );
1522 /* Clear status descriptor */
1523 memset ( sds, 0, sizeof ( *sds ) );
1525 /* Update SDS consumer index */
1526 sds_consumer_idx = ( ( sds_consumer_idx + 1 ) % PHN_NUM_SDS );
1527 phantom_port->sds_consumer_idx = sds_consumer_idx;
1529 phantom_writel ( phantom, phantom_port->sds_consumer_idx,
1530 phantom_port->sds_consumer_crb );
1533 /* Refill the RX descriptor ring */
1534 phantom_refill_rx_ring ( netdev );
1536 /* Occasionally poll the link state */
1537 if ( phantom_port->link_poll_timer-- == 0 ) {
1538 phantom_poll_link_state ( phantom );
1539 /* Reset the link poll timer */
1540 phantom_port->link_poll_timer = PHN_LINK_POLL_FREQUENCY;
1545 * Enable/disable interrupts
1547 * @v netdev Network device
1548 * @v enable Interrupts should be enabled
1550 static void phantom_irq ( struct net_device *netdev, int enable ) {
1551 struct phantom_nic_port *phantom_port = netdev_priv ( netdev );
1552 struct phantom_nic *phantom = phantom_port->phantom;
1553 static const unsigned long sw_int_mask_reg[UNM_FLASH_NUM_PORTS] = {
1554 UNM_NIC_REG_SW_INT_MASK_0,
1555 UNM_NIC_REG_SW_INT_MASK_1,
1556 UNM_NIC_REG_SW_INT_MASK_2,
1557 UNM_NIC_REG_SW_INT_MASK_3
1560 phantom_writel ( phantom,
1562 sw_int_mask_reg[phantom_port->port] );
1565 /** Phantom net device operations */
1566 static struct net_device_operations phantom_operations = {
1567 .open = phantom_open,
1568 .close = phantom_close,
1569 .transmit = phantom_transmit,
1570 .poll = phantom_poll,
1575 * Map Phantom CRB window
1577 * @v phantom Phantom NIC
1578 * @ret rc Return status code
1580 static int phantom_map_crb ( struct phantom_nic *phantom,
1581 struct pci_device *pci ) {
1582 unsigned long bar0_start;
1583 unsigned long bar0_size;
1585 bar0_start = pci_bar_start ( pci, PCI_BASE_ADDRESS_0 );
1586 bar0_size = pci_bar_size ( pci, PCI_BASE_ADDRESS_0 );
1587 DBGC ( phantom, "Phantom %p BAR0 is %08lx+%lx\n",
1588 phantom, bar0_start, bar0_size );
1590 switch ( bar0_size ) {
1591 case ( 128 * 1024 * 1024 ) :
1592 DBGC ( phantom, "Phantom %p has 128MB BAR\n", phantom );
1593 phantom->crb_access = phantom_crb_access_128m;
1595 case ( 32 * 1024 * 1024 ) :
1596 DBGC ( phantom, "Phantom %p has 32MB BAR\n", phantom );
1597 phantom->crb_access = phantom_crb_access_32m;
1599 case ( 2 * 1024 * 1024 ) :
1600 DBGC ( phantom, "Phantom %p has 2MB BAR\n", phantom );
1601 phantom->crb_access = phantom_crb_access_2m;
1604 DBGC ( phantom, "Phantom %p has bad BAR size\n", phantom );
1608 phantom->bar0 = ioremap ( bar0_start, bar0_size );
1609 if ( ! phantom->bar0 ) {
1610 DBGC ( phantom, "Phantom %p could not map BAR0\n", phantom );
1614 /* Mark current CRB window as invalid, so that the first
1615 * read/write will set the current window.
1617 phantom->crb_window = -1UL;
1623 * Read Phantom flash contents
1625 * @v phantom Phantom NIC
1626 * @ret rc Return status code
1628 static int phantom_read_flash ( struct phantom_nic *phantom ) {
1629 struct unm_board_info board_info;
1632 /* Initialise flash access */
1633 phantom->spi_bus.rw = phantom_spi_rw;
1634 phantom->flash.bus = &phantom->spi_bus;
1635 init_m25p32 ( &phantom->flash );
1636 /* Phantom doesn't support greater than 4-byte block sizes */
1637 phantom->flash.nvs.block_size = UNM_SPI_BLKSIZE;
1639 /* Read and verify board information */
1640 if ( ( rc = nvs_read ( &phantom->flash.nvs, UNM_BRDCFG_START,
1641 &board_info, sizeof ( board_info ) ) ) != 0 ) {
1642 DBGC ( phantom, "Phantom %p could not read board info: %s\n",
1643 phantom, strerror ( rc ) );
1646 if ( board_info.magic != UNM_BDINFO_MAGIC ) {
1647 DBGC ( phantom, "Phantom %p has bad board info magic %lx\n",
1648 phantom, board_info.magic );
1649 DBGC_HD ( phantom, &board_info, sizeof ( board_info ) );
1652 if ( board_info.header_version != UNM_BDINFO_VERSION ) {
1653 DBGC ( phantom, "Phantom %p has bad board info version %lx\n",
1654 phantom, board_info.header_version );
1655 DBGC_HD ( phantom, &board_info, sizeof ( board_info ) );
1659 /* Identify board type and number of ports */
1660 switch ( board_info.board_type ) {
1661 case UNM_BRDTYPE_P3_4_GB:
1662 case UNM_BRDTYPE_P3_4_GB_MM:
1663 phantom->num_ports = 4;
1665 case UNM_BRDTYPE_P3_HMEZ:
1666 case UNM_BRDTYPE_P3_IMEZ:
1667 case UNM_BRDTYPE_P3_10G_CX4:
1668 case UNM_BRDTYPE_P3_10G_CX4_LP:
1669 case UNM_BRDTYPE_P3_10G_SFP_PLUS:
1670 case UNM_BRDTYPE_P3_XG_LOM:
1671 phantom->num_ports = 2;
1673 case UNM_BRDTYPE_P3_10000_BASE_T:
1674 case UNM_BRDTYPE_P3_10G_XFP:
1675 phantom->num_ports = 1;
1678 DBGC ( phantom, "Phantom %p unrecognised board type %#lx; "
1679 "assuming single-port\n",
1680 phantom, board_info.board_type );
1681 phantom->num_ports = 1;
1684 DBGC ( phantom, "Phantom %p board type is %#lx (%d ports)\n",
1685 phantom, board_info.board_type, phantom->num_ports );
1691 * Initialise the Phantom command PEG
1693 * @v phantom Phantom NIC
1694 * @ret rc Return status code
1696 static int phantom_init_cmdpeg ( struct phantom_nic *phantom ) {
1699 physaddr_t dummy_dma_phys;
1700 unsigned int retries;
1701 uint32_t cmdpeg_state;
1702 uint32_t last_cmdpeg_state = 0;
1704 /* Check for a previous initialisation. This could have
1705 * happened if, for example, the BIOS used the UNDI API to
1706 * drive the NIC prior to a full PXE boot.
1708 cmdpeg_state = phantom_readl ( phantom, UNM_NIC_REG_CMDPEG_STATE );
1709 if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK ) {
1710 DBGC ( phantom, "Phantom %p command PEG already initialized\n",
1715 /* If this was a cold boot, check that the hardware came up ok */
1716 cold_boot = phantom_readl ( phantom, UNM_CAM_RAM_COLD_BOOT );
1717 if ( cold_boot == UNM_CAM_RAM_COLD_BOOT_MAGIC ) {
1718 DBGC ( phantom, "Phantom %p coming up from cold boot\n",
1720 sw_reset = phantom_readl ( phantom, UNM_ROMUSB_GLB_SW_RESET );
1721 if ( sw_reset != UNM_ROMUSB_GLB_SW_RESET_MAGIC ) {
1722 DBGC ( phantom, "Phantom %p reset failed: %08lx\n",
1723 phantom, sw_reset );
1727 DBGC ( phantom, "Phantom %p coming up from warm boot "
1728 "(%08lx)\n", phantom, cold_boot );
1730 /* Clear cold-boot flag */
1731 phantom_writel ( phantom, 0, UNM_CAM_RAM_COLD_BOOT );
1733 /* Set port modes */
1734 phantom_writel ( phantom, UNM_CAM_RAM_PORT_MODE_AUTO_NEG_1G,
1735 UNM_CAM_RAM_WOL_PORT_MODE );
1737 /* Pass dummy DMA area to card */
1738 dummy_dma_phys = virt_to_bus ( phantom->dma_buf->dummy_dma );
1739 DBGC ( phantom, "Phantom %p dummy DMA at %08lx\n",
1740 phantom, dummy_dma_phys );
1741 phantom_write_hilo ( phantom, dummy_dma_phys,
1742 UNM_NIC_REG_DUMMY_BUF_ADDR_LO,
1743 UNM_NIC_REG_DUMMY_BUF_ADDR_HI );
1744 phantom_writel ( phantom, UNM_NIC_REG_DUMMY_BUF_INIT,
1745 UNM_NIC_REG_DUMMY_BUF );
1747 /* Tell the hardware that tuning is complete */
1748 phantom_writel ( phantom, UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGIC,
1749 UNM_ROMUSB_GLB_PEGTUNE_DONE );
1751 /* Wait for command PEG to finish initialising */
1752 DBGC ( phantom, "Phantom %p initialising command PEG (will take up to "
1753 "%d seconds)...\n", phantom, PHN_CMDPEG_INIT_TIMEOUT_SEC );
1754 for ( retries = 0; retries < PHN_CMDPEG_INIT_TIMEOUT_SEC; retries++ ) {
1755 cmdpeg_state = phantom_readl ( phantom,
1756 UNM_NIC_REG_CMDPEG_STATE );
1757 if ( cmdpeg_state != last_cmdpeg_state ) {
1758 DBGC ( phantom, "Phantom %p command PEG state is "
1759 "%08lx after %d seconds...\n",
1760 phantom, cmdpeg_state, retries );
1761 last_cmdpeg_state = cmdpeg_state;
1763 if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZED ) {
1764 /* Acknowledge the PEG initialisation */
1765 phantom_writel ( phantom,
1766 UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK,
1767 UNM_NIC_REG_CMDPEG_STATE );
1773 DBGC ( phantom, "Phantom %p timed out waiting for command PEG to "
1774 "initialise (status %08lx)\n", phantom, cmdpeg_state );
1779 * Read Phantom MAC address
1781 * @v phanton_port Phantom NIC port
1782 * @v ll_addr Buffer to fill with MAC address
1784 static void phantom_get_macaddr ( struct phantom_nic_port *phantom_port,
1785 uint8_t *ll_addr ) {
1786 struct phantom_nic *phantom = phantom_port->phantom;
1788 uint8_t mac_addr[2][ETH_ALEN];
1791 unsigned long offset;
1794 /* Read the three dwords that include this MAC address and one other */
1795 offset = ( UNM_CAM_RAM_MAC_ADDRS +
1796 ( 12 * ( phantom_port->port / 2 ) ) );
1797 for ( i = 0 ; i < 3 ; i++, offset += 4 ) {
1798 u.dwords[i] = phantom_readl ( phantom, offset );
1801 /* Copy out the relevant MAC address */
1802 for ( i = 0 ; i < ETH_ALEN ; i++ ) {
1803 ll_addr[ ETH_ALEN - i - 1 ] =
1804 u.mac_addr[ phantom_port->port & 1 ][i];
1806 DBGC ( phantom, "Phantom %p port %d MAC address is %s\n",
1807 phantom, phantom_port->port, eth_ntoa ( ll_addr ) );
1811 * Initialise Phantom receive PEG
1813 * @v phantom Phantom NIC
1814 * @ret rc Return status code
1816 static int phantom_init_rcvpeg ( struct phantom_nic *phantom ) {
1817 unsigned int retries;
1818 uint32_t rcvpeg_state;
1819 uint32_t last_rcvpeg_state = 0;
1821 DBGC ( phantom, "Phantom %p initialising receive PEG (will take up to "
1822 "%d seconds)...\n", phantom, PHN_RCVPEG_INIT_TIMEOUT_SEC );
1823 for ( retries = 0; retries < PHN_RCVPEG_INIT_TIMEOUT_SEC; retries++ ) {
1824 rcvpeg_state = phantom_readl ( phantom,
1825 UNM_NIC_REG_RCVPEG_STATE );
1826 if ( rcvpeg_state != last_rcvpeg_state ) {
1827 DBGC ( phantom, "Phantom %p receive PEG state is "
1828 "%08lx after %d seconds...\n",
1829 phantom, rcvpeg_state, retries );
1830 last_rcvpeg_state = rcvpeg_state;
1832 if ( rcvpeg_state == UNM_NIC_REG_RCVPEG_STATE_INITIALIZED )
1837 DBGC ( phantom, "Phantom %p timed out waiting for receive PEG to "
1838 "initialise (status %08lx)\n", phantom, rcvpeg_state );
1847 * @ret rc Return status code
1849 static int phantom_probe ( struct pci_device *pci,
1850 const struct pci_device_id *id __unused ) {
1851 struct phantom_nic *phantom;
1852 struct net_device *netdev;
1853 struct phantom_nic_port *phantom_port;
1857 /* Phantom NICs expose multiple PCI functions, used for
1858 * virtualisation. Ignore everything except function 0.
1860 if ( PCI_FUNC ( pci->devfn ) != 0 )
1863 /* Allocate Phantom device */
1864 phantom = zalloc ( sizeof ( *phantom ) );
1867 goto err_alloc_phantom;
1869 pci_set_drvdata ( pci, phantom );
1871 /* Fix up PCI device */
1872 adjust_pci_device ( pci );
1875 if ( ( rc = phantom_map_crb ( phantom, pci ) ) != 0 )
1878 /* Read flash information */
1879 if ( ( rc = phantom_read_flash ( phantom ) ) != 0 )
1880 goto err_read_flash;
1882 /* Allocate net devices for each port */
1883 for ( i = 0 ; i < phantom->num_ports ; i++ ) {
1884 netdev = alloc_etherdev ( sizeof ( *phantom_port ) );
1887 goto err_alloc_etherdev;
1889 phantom->netdev[i] = netdev;
1890 netdev_init ( netdev, &phantom_operations );
1891 phantom_port = netdev_priv ( netdev );
1892 netdev->dev = &pci->dev;
1893 phantom_port->phantom = phantom;
1894 phantom_port->port = i;
1897 /* BUG5945 - need to hack PCI config space on P3 B1 silicon.
1898 * B2 will have this fixed; remove this hack when B1 is no
1901 for ( i = 0 ; i < 8 ; i++ ) {
1903 pci->devfn = PCI_DEVFN ( PCI_SLOT ( pci->devfn ), i );
1904 pci_read_config_dword ( pci, 0xc8, &temp );
1905 pci_read_config_dword ( pci, 0xc8, &temp );
1906 pci_write_config_dword ( pci, 0xc8, 0xf1000 );
1908 pci->devfn = PCI_DEVFN ( PCI_SLOT ( pci->devfn ), 0 );
1910 /* Allocate dummy DMA buffer and perform initial hardware handshake */
1911 phantom->dma_buf = malloc_dma ( sizeof ( *(phantom->dma_buf) ),
1912 UNM_DMA_BUFFER_ALIGN );
1913 if ( ! phantom->dma_buf )
1915 if ( ( rc = phantom_init_cmdpeg ( phantom ) ) != 0 )
1916 goto err_init_cmdpeg;
1918 /* Initialise the receive firmware */
1919 if ( ( rc = phantom_init_rcvpeg ( phantom ) ) != 0 )
1920 goto err_init_rcvpeg;
1922 /* Read MAC addresses */
1923 for ( i = 0 ; i < phantom->num_ports ; i++ ) {
1924 phantom_port = netdev_priv ( phantom->netdev[i] );
1925 phantom_get_macaddr ( phantom_port,
1926 phantom->netdev[i]->ll_addr );
1929 /* Register network devices */
1930 for ( i = 0 ; i < phantom->num_ports ; i++ ) {
1931 if ( ( rc = register_netdev ( phantom->netdev[i] ) ) != 0 ) {
1932 DBGC ( phantom, "Phantom %p could not register port "
1933 "%d: %s\n", phantom, i, strerror ( rc ) );
1934 goto err_register_netdev;
1940 i = ( phantom->num_ports - 1 );
1941 err_register_netdev:
1942 for ( ; i >= 0 ; i-- )
1943 unregister_netdev ( phantom->netdev[i] );
1946 free_dma ( phantom->dma_buf, sizeof ( *(phantom->dma_buf) ) );
1947 phantom->dma_buf = NULL;
1949 i = ( phantom->num_ports - 1 );
1951 for ( ; i >= 0 ; i-- ) {
1952 netdev_nullify ( phantom->netdev[i] );
1953 netdev_put ( phantom->netdev[i] );
1967 static void phantom_remove ( struct pci_device *pci ) {
1968 struct phantom_nic *phantom = pci_get_drvdata ( pci );
1971 for ( i = ( phantom->num_ports - 1 ) ; i >= 0 ; i-- )
1972 unregister_netdev ( phantom->netdev[i] );
1973 free_dma ( phantom->dma_buf, sizeof ( *(phantom->dma_buf) ) );
1974 phantom->dma_buf = NULL;
1975 for ( i = ( phantom->num_ports - 1 ) ; i >= 0 ; i-- ) {
1976 netdev_nullify ( phantom->netdev[i] );
1977 netdev_put ( phantom->netdev[i] );
1982 /** Phantom PCI IDs */
1983 static struct pci_device_id phantom_nics[] = {
1984 PCI_ROM ( 0x4040, 0x0100, "nx", "NX" ),
1987 /** Phantom PCI driver */
1988 struct pci_driver phantom_driver __pci_driver = {
1989 .ids = phantom_nics,
1990 .id_count = ( sizeof ( phantom_nics ) / sizeof ( phantom_nics[0] ) ),
1991 .probe = phantom_probe,
1992 .remove = phantom_remove,