2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 Mellanox Technologies Ltd.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
30 #include <gpxe/malloc.h>
31 #include <gpxe/umalloc.h>
32 #include <gpxe/iobuf.h>
33 #include <gpxe/netdevice.h>
34 #include <gpxe/infiniband.h>
40 * Mellanox Hermon Infiniband HCA
47 /***************************************************************************
49 * Queue number allocation
51 ***************************************************************************
55 * Allocate offsets within usage bitmask
57 * @v bits Usage bitmask
58 * @v bits_len Length of usage bitmask
59 * @v num_bits Number of contiguous bits to allocate within bitmask
60 * @ret bit First free bit within bitmask, or negative error
62 static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
63 unsigned int bits_len,
64 unsigned int num_bits ) {
66 hermon_bitmask_t mask = 1;
67 unsigned int found = 0;
69 /* Search bits for num_bits contiguous free bits */
70 while ( bit < bits_len ) {
71 if ( ( mask & *bits ) == 0 ) {
72 if ( ++found == num_bits )
78 mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
85 /* Mark bits as in-use */
90 mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
93 return ( bit - num_bits + 1 );
97 * Free offsets within usage bitmask
99 * @v bits Usage bitmask
100 * @v bit Starting bit within bitmask
101 * @v num_bits Number of contiguous bits to free within bitmask
103 static void hermon_bitmask_free ( hermon_bitmask_t *bits,
104 int bit, unsigned int num_bits ) {
105 hermon_bitmask_t mask;
107 for ( ; num_bits ; bit++, num_bits-- ) {
108 mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
109 bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
113 /***************************************************************************
117 ***************************************************************************
121 * Wait for Hermon command completion
123 * @v hermon Hermon device
124 * @v hcr HCA command registers
125 * @ret rc Return status code
127 static int hermon_cmd_wait ( struct hermon *hermon,
128 struct hermonprm_hca_command_register *hcr ) {
131 for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
133 readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
134 if ( ( MLX_GET ( hcr, go ) == 0 ) &&
135 ( MLX_GET ( hcr, t ) == hermon->toggle ) )
145 * @v hermon Hermon device
146 * @v command Command opcode, flags and input/output lengths
147 * @v op_mod Opcode modifier (0 if no modifier applicable)
148 * @v in Input parameters
149 * @v in_mod Input modifier (0 if no modifier applicable)
150 * @v out Output parameters
151 * @ret rc Return status code
153 static int hermon_cmd ( struct hermon *hermon, unsigned long command,
154 unsigned int op_mod, const void *in,
155 unsigned int in_mod, void *out ) {
156 struct hermonprm_hca_command_register hcr;
157 unsigned int opcode = HERMON_HCR_OPCODE ( command );
158 size_t in_len = HERMON_HCR_IN_LEN ( command );
159 size_t out_len = HERMON_HCR_OUT_LEN ( command );
166 assert ( in_len <= HERMON_MBOX_SIZE );
167 assert ( out_len <= HERMON_MBOX_SIZE );
169 DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
170 hermon, opcode, in_len,
171 ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
172 ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
174 /* Check that HCR is free */
175 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
176 DBGC ( hermon, "Hermon %p command interface locked\n",
181 /* Flip HCR toggle */
182 hermon->toggle = ( 1 - hermon->toggle );
185 memset ( &hcr, 0, sizeof ( hcr ) );
186 in_buffer = &hcr.u.dwords[0];
187 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
188 in_buffer = hermon->mailbox_in;
189 MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
191 memcpy ( in_buffer, in, in_len );
192 MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
193 out_buffer = &hcr.u.dwords[3];
194 if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
195 out_buffer = hermon->mailbox_out;
196 MLX_FILL_1 ( &hcr, 4, out_param_l,
197 virt_to_bus ( out_buffer ) );
199 MLX_FILL_4 ( &hcr, 6,
201 opcode_modifier, op_mod,
204 DBGC ( hermon, "Hermon %p issuing command:\n", hermon );
205 DBGC_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
206 &hcr, sizeof ( hcr ) );
207 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
208 DBGC2 ( hermon, "Input mailbox:\n" );
209 DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
210 ( ( in_len < 512 ) ? in_len : 512 ) );
214 for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
216 writel ( hcr.u.dwords[i],
217 hermon->config + HERMON_HCR_REG ( i ) );
221 /* Wait for command completion */
222 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
223 DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
226 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
227 &hcr, sizeof ( hcr ) );
231 /* Check command status */
232 status = MLX_GET ( &hcr, status );
234 DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
237 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
238 &hcr, sizeof ( hcr ) );
242 /* Read output parameters, if any */
243 hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
244 hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
245 memcpy ( out, out_buffer, out_len );
247 DBGC2 ( hermon, "Output%s:\n",
248 ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
249 DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
250 ( ( out_len < 512 ) ? out_len : 512 ) );
257 hermon_cmd_query_dev_cap ( struct hermon *hermon,
258 struct hermonprm_query_dev_cap *dev_cap ) {
259 return hermon_cmd ( hermon,
260 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
261 1, sizeof ( *dev_cap ) ),
262 0, NULL, 0, dev_cap );
266 hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
267 return hermon_cmd ( hermon,
268 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
274 hermon_cmd_init_hca ( struct hermon *hermon,
275 const struct hermonprm_init_hca *init_hca ) {
276 return hermon_cmd ( hermon,
277 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
278 1, sizeof ( *init_hca ) ),
279 0, init_hca, 0, NULL );
283 hermon_cmd_close_hca ( struct hermon *hermon ) {
284 return hermon_cmd ( hermon,
285 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
290 hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
291 const struct hermonprm_init_port *init_port ) {
292 return hermon_cmd ( hermon,
293 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
294 1, sizeof ( *init_port ) ),
295 0, init_port, port, NULL );
299 hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
300 return hermon_cmd ( hermon,
301 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
302 0, NULL, port, NULL );
306 hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
307 const struct hermonprm_mpt *mpt ) {
308 return hermon_cmd ( hermon,
309 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
310 1, sizeof ( *mpt ) ),
311 0, mpt, index, NULL );
315 hermon_cmd_write_mtt ( struct hermon *hermon,
316 const struct hermonprm_write_mtt *write_mtt ) {
317 return hermon_cmd ( hermon,
318 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
319 1, sizeof ( *write_mtt ) ),
320 0, write_mtt, 1, NULL );
324 hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
325 const struct hermonprm_eqc *eqc ) {
326 return hermon_cmd ( hermon,
327 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
328 1, sizeof ( *eqc ) ),
329 0, eqc, index, NULL );
333 hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index ) {
334 return hermon_cmd ( hermon,
335 HERMON_HCR_VOID_CMD ( HERMON_HCR_HW2SW_EQ ),
336 1, NULL, index, NULL );
340 hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
341 const struct hermonprm_completion_queue_context *cqctx ){
342 return hermon_cmd ( hermon,
343 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
344 1, sizeof ( *cqctx ) ),
345 0, cqctx, cqn, NULL );
349 hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
350 struct hermonprm_completion_queue_context *cqctx) {
351 return hermon_cmd ( hermon,
352 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
353 1, sizeof ( *cqctx ) ),
354 0, NULL, cqn, cqctx );
358 hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
359 const struct hermonprm_qp_ee_state_transitions *ctx ){
360 return hermon_cmd ( hermon,
361 HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
362 1, sizeof ( *ctx ) ),
367 hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
368 const struct hermonprm_qp_ee_state_transitions *ctx ){
369 return hermon_cmd ( hermon,
370 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
371 1, sizeof ( *ctx ) ),
376 hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
377 const struct hermonprm_qp_ee_state_transitions *ctx ) {
378 return hermon_cmd ( hermon,
379 HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
380 1, sizeof ( *ctx ) ),
385 hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
386 return hermon_cmd ( hermon,
387 HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
388 0x03, NULL, qpn, NULL );
392 hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
393 union hermonprm_mad *mad ) {
394 return hermon_cmd ( hermon,
395 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
397 1, sizeof ( *mad ) ),
398 0x03, mad, port, mad );
402 hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
403 struct hermonprm_mcg_entry *mcg ) {
404 return hermon_cmd ( hermon,
405 HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
406 1, sizeof ( *mcg ) ),
407 0, NULL, index, mcg );
411 hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
412 const struct hermonprm_mcg_entry *mcg ) {
413 return hermon_cmd ( hermon,
414 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
415 1, sizeof ( *mcg ) ),
416 0, mcg, index, NULL );
420 hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
421 struct hermonprm_mgm_hash *hash ) {
422 return hermon_cmd ( hermon,
423 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
425 0, sizeof ( *hash ) ),
430 hermon_cmd_run_fw ( struct hermon *hermon ) {
431 return hermon_cmd ( hermon,
432 HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
437 hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
438 const struct hermonprm_scalar_parameter *offset ) {
439 return hermon_cmd ( hermon,
440 HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
441 0, sizeof ( *offset ) ),
442 0, offset, page_count, NULL );
446 hermon_cmd_map_icm ( struct hermon *hermon,
447 const struct hermonprm_virtual_physical_mapping *map ) {
448 return hermon_cmd ( hermon,
449 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
450 1, sizeof ( *map ) ),
455 hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
456 return hermon_cmd ( hermon,
457 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
462 hermon_cmd_map_icm_aux ( struct hermon *hermon,
463 const struct hermonprm_virtual_physical_mapping *map ) {
464 return hermon_cmd ( hermon,
465 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
466 1, sizeof ( *map ) ),
471 hermon_cmd_set_icm_size ( struct hermon *hermon,
472 const struct hermonprm_scalar_parameter *icm_size,
473 struct hermonprm_scalar_parameter *icm_aux_size ) {
474 return hermon_cmd ( hermon,
475 HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
476 0, sizeof ( *icm_size ),
477 0, sizeof (*icm_aux_size) ),
478 0, icm_size, 0, icm_aux_size );
482 hermon_cmd_unmap_fa ( struct hermon *hermon ) {
483 return hermon_cmd ( hermon,
484 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
489 hermon_cmd_map_fa ( struct hermon *hermon,
490 const struct hermonprm_virtual_physical_mapping *map ) {
491 return hermon_cmd ( hermon,
492 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
493 1, sizeof ( *map ) ),
497 /***************************************************************************
499 * Memory translation table operations
501 ***************************************************************************
505 * Allocate MTT entries
507 * @v hermon Hermon device
508 * @v memory Memory to map into MTT
509 * @v len Length of memory to map
510 * @v mtt MTT descriptor to fill in
511 * @ret rc Return status code
513 static int hermon_alloc_mtt ( struct hermon *hermon,
514 const void *memory, size_t len,
515 struct hermon_mtt *mtt ) {
516 struct hermonprm_write_mtt write_mtt;
518 unsigned int page_offset;
519 unsigned int num_pages;
521 unsigned int mtt_base_addr;
525 /* Find available MTT entries */
526 start = virt_to_phys ( memory );
527 page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
528 start -= page_offset;
530 num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
531 mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
533 if ( mtt_offset < 0 ) {
534 DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
539 mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
540 hermon->cap.mtt_entry_size );
542 /* Fill in MTT structure */
543 mtt->mtt_offset = mtt_offset;
544 mtt->num_pages = num_pages;
545 mtt->mtt_base_addr = mtt_base_addr;
546 mtt->page_offset = page_offset;
548 /* Construct and issue WRITE_MTT commands */
549 for ( i = 0 ; i < num_pages ; i++ ) {
550 memset ( &write_mtt, 0, sizeof ( write_mtt ) );
551 MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
552 value, mtt_base_addr );
553 MLX_FILL_2 ( &write_mtt.mtt, 1,
555 ptag_l, ( start >> 3 ) );
556 if ( ( rc = hermon_cmd_write_mtt ( hermon,
557 &write_mtt ) ) != 0 ) {
558 DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
559 hermon, mtt_base_addr );
562 start += HERMON_PAGE_SIZE;
563 mtt_base_addr += hermon->cap.mtt_entry_size;
569 hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
577 * @v hermon Hermon device
578 * @v mtt MTT descriptor
580 static void hermon_free_mtt ( struct hermon *hermon,
581 struct hermon_mtt *mtt ) {
582 hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
586 /***************************************************************************
588 * Completion queue operations
590 ***************************************************************************
594 * Create completion queue
596 * @v ibdev Infiniband device
597 * @v cq Completion queue
598 * @ret rc Return status code
600 static int hermon_create_cq ( struct ib_device *ibdev,
601 struct ib_completion_queue *cq ) {
602 struct hermon *hermon = ibdev->dev_priv;
603 struct hermon_completion_queue *hermon_cq;
604 struct hermonprm_completion_queue_context cqctx;
609 /* Find a free completion queue number */
610 cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
612 if ( cqn_offset < 0 ) {
613 DBGC ( hermon, "Hermon %p out of completion queues\n",
618 cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
620 /* Allocate control structures */
621 hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
627 /* Allocate completion queue itself */
628 hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
629 hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
630 sizeof ( hermon_cq->cqe[0] ) );
631 if ( ! hermon_cq->cqe ) {
635 memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
636 for ( i = 0 ; i < cq->num_cqes ; i++ ) {
637 MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
641 /* Allocate MTT entries */
642 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
644 &hermon_cq->mtt ) ) != 0 )
647 /* Hand queue over to hardware */
648 memset ( &cqctx, 0, sizeof ( cqctx ) );
649 MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
650 MLX_FILL_1 ( &cqctx, 2,
651 page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
652 MLX_FILL_2 ( &cqctx, 3,
653 usr_page, HERMON_UAR_PAGE,
654 log_cq_size, fls ( cq->num_cqes - 1 ) );
655 MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
656 ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
657 MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
658 ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
659 if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
660 DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
661 hermon, strerror ( rc ) );
665 DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
666 hermon, cq->cqn, hermon_cq->cqe,
667 ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
668 cq->dev_priv = hermon_cq;
672 hermon_free_mtt ( hermon, &hermon_cq->mtt );
674 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
678 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
684 * Destroy completion queue
686 * @v ibdev Infiniband device
687 * @v cq Completion queue
689 static void hermon_destroy_cq ( struct ib_device *ibdev,
690 struct ib_completion_queue *cq ) {
691 struct hermon *hermon = ibdev->dev_priv;
692 struct hermon_completion_queue *hermon_cq = cq->dev_priv;
693 struct hermonprm_completion_queue_context cqctx;
697 /* Take ownership back from hardware */
698 if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
699 DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
700 "%s\n", hermon, cq->cqn, strerror ( rc ) );
701 /* Leak memory and return; at least we avoid corruption */
705 /* Free MTT entries */
706 hermon_free_mtt ( hermon, &hermon_cq->mtt );
709 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
712 /* Mark queue number as free */
713 cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
714 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
719 /***************************************************************************
721 * Queue pair operations
723 ***************************************************************************
729 * @v ibdev Infiniband device
731 * @ret rc Return status code
733 static int hermon_create_qp ( struct ib_device *ibdev,
734 struct ib_queue_pair *qp ) {
735 struct hermon *hermon = ibdev->dev_priv;
736 struct hermon_queue_pair *hermon_qp;
737 struct hermonprm_qp_ee_state_transitions qpctx;
741 /* Find a free queue pair number */
742 qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
744 if ( qpn_offset < 0 ) {
745 DBGC ( hermon, "Hermon %p out of queue pairs\n", hermon );
749 qp->qpn = ( HERMON_QPN_BASE + hermon->cap.reserved_qps +
752 /* Allocate control structures */
753 hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
759 /* Allocate work queue buffer */
760 hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
761 ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
762 hermon_qp->send.num_wqes =
763 ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
764 hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
765 sizeof ( hermon_qp->send.wqe[0] ) );
766 hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
767 sizeof ( hermon_qp->recv.wqe[0] ) );
768 hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
769 hermon_qp->recv.wqe_size );
770 hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
771 sizeof ( hermon_qp->send.wqe[0] ) );
772 if ( ! hermon_qp->wqe ) {
776 hermon_qp->send.wqe = hermon_qp->wqe;
777 memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
778 hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
779 memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
781 /* Allocate MTT entries */
782 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
784 &hermon_qp->mtt ) ) != 0 ) {
788 /* Transition queue to INIT state */
789 memset ( &qpctx, 0, sizeof ( qpctx ) );
790 MLX_FILL_2 ( &qpctx, 2,
791 qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
792 qpc_eec_data.st, HERMON_ST_UD );
793 MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
794 MLX_FILL_4 ( &qpctx, 4,
795 qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
796 qpc_eec_data.log_rq_stride,
797 ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
798 qpc_eec_data.log_sq_size,
799 fls ( hermon_qp->send.num_wqes - 1 ),
800 qpc_eec_data.log_sq_stride,
801 ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
802 MLX_FILL_1 ( &qpctx, 5,
803 qpc_eec_data.usr_page, HERMON_UAR_PAGE );
804 MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
805 MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.page_offset,
806 ( hermon_qp->mtt.page_offset >> 6 ) );
807 MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
808 MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
809 ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
810 MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
811 MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
812 ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
813 if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
815 DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
816 hermon, strerror ( rc ) );
817 goto err_rst2init_qp;
820 /* Transition queue to RTR state */
821 memset ( &qpctx, 0, sizeof ( qpctx ) );
822 MLX_FILL_2 ( &qpctx, 4,
823 qpc_eec_data.mtu, HERMON_MTU_2048,
824 qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
825 MLX_FILL_1 ( &qpctx, 16,
826 qpc_eec_data.primary_address_path.sched_queue,
827 ( 0x83 /* default policy */ |
828 ( ( ibdev->port - 1 ) << 6 ) ) );
829 if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
831 DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
832 hermon, strerror ( rc ) );
833 goto err_init2rtr_qp;
835 memset ( &qpctx, 0, sizeof ( qpctx ) );
836 if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
837 DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
838 hermon, strerror ( rc ) );
842 DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
843 hermon, qp->qpn, hermon_qp->send.wqe,
844 ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
845 DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
846 hermon, qp->qpn, hermon_qp->recv.wqe,
847 ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
848 qp->dev_priv = hermon_qp;
853 hermon_cmd_2rst_qp ( hermon, qp->qpn );
855 hermon_free_mtt ( hermon, &hermon_qp->mtt );
857 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
861 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
869 * @v ibdev Infiniband device
872 static void hermon_destroy_qp ( struct ib_device *ibdev,
873 struct ib_queue_pair *qp ) {
874 struct hermon *hermon = ibdev->dev_priv;
875 struct hermon_queue_pair *hermon_qp = qp->dev_priv;
879 /* Take ownership back from hardware */
880 if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
881 DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
882 "%s\n", hermon, qp->qpn, strerror ( rc ) );
883 /* Leak memory and return; at least we avoid corruption */
887 /* Free MTT entries */
888 hermon_free_mtt ( hermon, &hermon_qp->mtt );
891 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
894 /* Mark queue number as free */
895 qpn_offset = ( qp->qpn - HERMON_QPN_BASE -
896 hermon->cap.reserved_qps );
897 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
902 /***************************************************************************
904 * Work request operations
906 ***************************************************************************
909 /** GID used for GID-less send work queue entries */
910 static const struct ib_gid hermon_no_gid = {
911 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
915 * Post send work queue entry
917 * @v ibdev Infiniband device
919 * @v av Address vector
920 * @v iobuf I/O buffer
921 * @ret rc Return status code
923 static int hermon_post_send ( struct ib_device *ibdev,
924 struct ib_queue_pair *qp,
925 struct ib_address_vector *av,
926 struct io_buffer *iobuf ) {
927 struct hermon *hermon = ibdev->dev_priv;
928 struct hermon_queue_pair *hermon_qp = qp->dev_priv;
929 struct ib_work_queue *wq = &qp->send;
930 struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
931 struct hermonprm_ud_send_wqe *wqe;
932 const struct ib_gid *gid;
933 union hermonprm_doorbell_register db_reg;
934 unsigned int wqe_idx_mask;
936 /* Allocate work queue entry */
937 wqe_idx_mask = ( wq->num_wqes - 1 );
938 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
939 DBGC ( hermon, "Hermon %p send queue full", hermon );
942 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
943 wqe = &hermon_send_wq->wqe[ wq->next_idx &
944 ( hermon_send_wq->num_wqes - 1 ) ].ud;
946 /* Construct work queue entry */
947 memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
948 ( sizeof ( *wqe ) - 4 ) );
949 MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( *wqe ) / 16 ) );
950 MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
951 MLX_FILL_2 ( &wqe->ud, 0,
952 ud_address_vector.pd, HERMON_GLOBAL_PD,
953 ud_address_vector.port_number, ibdev->port );
954 MLX_FILL_2 ( &wqe->ud, 1,
955 ud_address_vector.rlid, av->dlid,
956 ud_address_vector.g, av->gid_present );
957 MLX_FILL_1 ( &wqe->ud, 2,
958 ud_address_vector.max_stat_rate,
959 ( ( ( av->rate < 2 ) || ( av->rate > 10 ) ) ?
960 8 : ( av->rate + 5 ) ) );
961 MLX_FILL_1 ( &wqe->ud, 3, ud_address_vector.sl, av->sl );
962 gid = ( av->gid_present ? &av->gid : &hermon_no_gid );
963 memcpy ( &wqe->ud.u.dwords[4], gid, sizeof ( *gid ) );
964 MLX_FILL_1 ( &wqe->ud, 8, destination_qp, av->dest_qp );
965 MLX_FILL_1 ( &wqe->ud, 9, q_key, av->qkey );
966 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_len ( iobuf ) );
967 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
968 MLX_FILL_1 ( &wqe->data[0], 3,
969 local_address_l, virt_to_bus ( iobuf->data ) );
971 MLX_FILL_2 ( &wqe->ctrl, 0,
972 opcode, HERMON_OPCODE_SEND,
974 ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
975 DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
976 DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
979 /* Ring doorbell register */
980 MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
981 DBGCP ( hermon, "Ringing doorbell %08lx with %08lx\n",
982 virt_to_phys ( hermon->uar + HERMON_DB_POST_SND_OFFSET ),
984 writel ( db_reg.dword[0], ( hermon->uar + HERMON_DB_POST_SND_OFFSET ));
986 /* Update work queue's index */
993 * Post receive work queue entry
995 * @v ibdev Infiniband device
997 * @v iobuf I/O buffer
998 * @ret rc Return status code
1000 static int hermon_post_recv ( struct ib_device *ibdev,
1001 struct ib_queue_pair *qp,
1002 struct io_buffer *iobuf ) {
1003 struct hermon *hermon = ibdev->dev_priv;
1004 struct hermon_queue_pair *hermon_qp = qp->dev_priv;
1005 struct ib_work_queue *wq = &qp->recv;
1006 struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
1007 struct hermonprm_recv_wqe *wqe;
1008 unsigned int wqe_idx_mask;
1010 /* Allocate work queue entry */
1011 wqe_idx_mask = ( wq->num_wqes - 1 );
1012 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1013 DBGC ( hermon, "Hermon %p receive queue full", hermon );
1016 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1017 wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
1019 /* Construct work queue entry */
1020 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
1021 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
1022 MLX_FILL_1 ( &wqe->data[0], 3,
1023 local_address_l, virt_to_bus ( iobuf->data ) );
1025 /* Update work queue's index */
1028 /* Update doorbell record */
1030 MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
1031 ( wq->next_idx & 0xffff ) );
1039 * @v ibdev Infiniband device
1040 * @v cq Completion queue
1041 * @v cqe Hardware completion queue entry
1042 * @v complete_send Send completion handler
1043 * @v complete_recv Receive completion handler
1044 * @ret rc Return status code
1046 static int hermon_complete ( struct ib_device *ibdev,
1047 struct ib_completion_queue *cq,
1048 union hermonprm_completion_entry *cqe,
1049 ib_completer_t complete_send,
1050 ib_completer_t complete_recv ) {
1051 struct hermon *hermon = ibdev->dev_priv;
1052 struct ib_completion completion;
1053 struct ib_work_queue *wq;
1054 struct ib_queue_pair *qp;
1055 struct hermon_queue_pair *hermon_qp;
1056 struct io_buffer *iobuf;
1057 ib_completer_t complete;
1058 unsigned int opcode;
1061 unsigned int wqe_idx;
1064 /* Parse completion */
1065 memset ( &completion, 0, sizeof ( completion ) );
1066 qpn = MLX_GET ( &cqe->normal, qpn );
1067 is_send = MLX_GET ( &cqe->normal, s_r );
1068 opcode = MLX_GET ( &cqe->normal, opcode );
1069 if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
1070 /* "s" field is not valid for error opcodes */
1071 is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
1072 completion.syndrome = MLX_GET ( &cqe->error, syndrome );
1073 DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %lx\n",
1074 hermon, cq->cqn, completion.syndrome,
1075 MLX_GET ( &cqe->error, vendor_error_syndrome ) );
1077 /* Don't return immediately; propagate error to completer */
1080 /* Identify work queue */
1081 wq = ib_find_wq ( cq, qpn, is_send );
1083 DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
1084 hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
1088 hermon_qp = qp->dev_priv;
1090 /* Identify I/O buffer */
1091 wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
1092 ( wq->num_wqes - 1 ) );
1093 iobuf = wq->iobufs[wqe_idx];
1095 DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
1096 hermon, cq->cqn, qpn, wqe_idx );
1099 wq->iobufs[wqe_idx] = NULL;
1101 /* Fill in length for received packets */
1103 completion.len = MLX_GET ( &cqe->normal, byte_cnt );
1104 if ( completion.len > iob_tailroom ( iobuf ) ) {
1105 DBGC ( hermon, "Hermon %p CQN %lx QPN %lx IDX %x "
1106 "overlength received packet length %zd\n",
1107 hermon, cq->cqn, qpn, wqe_idx, completion.len );
1112 /* Pass off to caller's completion handler */
1113 complete = ( is_send ? complete_send : complete_recv );
1114 complete ( ibdev, qp, &completion, iobuf );
1120 * Poll completion queue
1122 * @v ibdev Infiniband device
1123 * @v cq Completion queue
1124 * @v complete_send Send completion handler
1125 * @v complete_recv Receive completion handler
1127 static void hermon_poll_cq ( struct ib_device *ibdev,
1128 struct ib_completion_queue *cq,
1129 ib_completer_t complete_send,
1130 ib_completer_t complete_recv ) {
1131 struct hermon *hermon = ibdev->dev_priv;
1132 struct hermon_completion_queue *hermon_cq = cq->dev_priv;
1133 union hermonprm_completion_entry *cqe;
1134 unsigned int cqe_idx_mask;
1138 /* Look for completion entry */
1139 cqe_idx_mask = ( cq->num_cqes - 1 );
1140 cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
1141 if ( MLX_GET ( &cqe->normal, owner ) ^
1142 ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
1143 /* Entry still owned by hardware; end of poll */
1146 DBGCP ( hermon, "Hermon %p completion:\n", hermon );
1147 DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
1149 /* Handle completion */
1150 if ( ( rc = hermon_complete ( ibdev, cq, cqe, complete_send,
1151 complete_recv ) ) != 0 ) {
1152 DBGC ( hermon, "Hermon %p failed to complete: %s\n",
1153 hermon, strerror ( rc ) );
1154 DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
1157 /* Update completion queue's index */
1160 /* Update doorbell record */
1161 MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
1162 ( cq->next_idx & 0xffffffUL ) );
1166 /***************************************************************************
1168 * Infiniband link-layer operations
1170 ***************************************************************************
1174 * Initialise Infiniband link
1176 * @v ibdev Infiniband device
1177 * @ret rc Return status code
1179 static int hermon_open ( struct ib_device *ibdev ) {
1180 struct hermon *hermon = ibdev->dev_priv;
1181 struct hermonprm_init_port init_port;
1184 memset ( &init_port, 0, sizeof ( init_port ) );
1185 MLX_FILL_2 ( &init_port, 0,
1188 MLX_FILL_2 ( &init_port, 1,
1189 mtu, HERMON_MTU_2048,
1191 MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
1192 if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
1193 &init_port ) ) != 0 ) {
1194 DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
1195 hermon, strerror ( rc ) );
1203 * Close Infiniband link
1205 * @v ibdev Infiniband device
1207 static void hermon_close ( struct ib_device *ibdev ) {
1208 struct hermon *hermon = ibdev->dev_priv;
1211 if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
1212 DBGC ( hermon, "Hermon %p could not close port: %s\n",
1213 hermon, strerror ( rc ) );
1214 /* Nothing we can do about this */
1218 /***************************************************************************
1220 * Multicast group operations
1222 ***************************************************************************
1226 * Attach to multicast group
1228 * @v ibdev Infiniband device
1230 * @v gid Multicast GID
1231 * @ret rc Return status code
1233 static int hermon_mcast_attach ( struct ib_device *ibdev,
1234 struct ib_queue_pair *qp,
1235 struct ib_gid *gid ) {
1236 struct hermon *hermon = ibdev->dev_priv;
1237 struct hermonprm_mgm_hash hash;
1238 struct hermonprm_mcg_entry mcg;
1242 /* Generate hash table index */
1243 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1244 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1245 hermon, strerror ( rc ) );
1248 index = MLX_GET ( &hash, hash );
1250 /* Check for existing hash table entry */
1251 if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
1252 DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
1253 hermon, index, strerror ( rc ) );
1256 if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
1257 /* FIXME: this implementation allows only a single QP
1258 * per multicast group, and doesn't handle hash
1259 * collisions. Sufficient for IPoIB but may need to
1260 * be extended in future.
1262 DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
1267 /* Update hash table entry */
1268 MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
1269 MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
1270 memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
1271 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1272 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1273 hermon, index, strerror ( rc ) );
1281 * Detach from multicast group
1283 * @v ibdev Infiniband device
1285 * @v gid Multicast GID
1287 static void hermon_mcast_detach ( struct ib_device *ibdev,
1288 struct ib_queue_pair *qp __unused,
1289 struct ib_gid *gid ) {
1290 struct hermon *hermon = ibdev->dev_priv;
1291 struct hermonprm_mgm_hash hash;
1292 struct hermonprm_mcg_entry mcg;
1296 /* Generate hash table index */
1297 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1298 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1299 hermon, strerror ( rc ) );
1302 index = MLX_GET ( &hash, hash );
1304 /* Clear hash table entry */
1305 memset ( &mcg, 0, sizeof ( mcg ) );
1306 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1307 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1308 hermon, index, strerror ( rc ) );
1313 /***************************************************************************
1317 ***************************************************************************
1321 * Issue management datagram
1323 * @v ibdev Infiniband device
1324 * @v mad Management datagram
1325 * @v len Length of management datagram
1326 * @ret rc Return status code
1328 static int hermon_mad ( struct ib_device *ibdev, struct ib_mad_hdr *mad,
1330 struct hermon *hermon = ibdev->dev_priv;
1331 union hermonprm_mad mad_ifc;
1334 /* Copy in request packet */
1335 memset ( &mad_ifc, 0, sizeof ( mad_ifc ) );
1336 assert ( len <= sizeof ( mad_ifc.mad ) );
1337 memcpy ( &mad_ifc.mad, mad, len );
1340 if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
1341 &mad_ifc ) ) != 0 ) {
1342 DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
1343 hermon, strerror ( rc ) );
1347 /* Copy out reply packet */
1348 memcpy ( mad, &mad_ifc.mad, len );
1350 if ( mad->status != 0 ) {
1351 DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
1352 hermon, ntohs ( mad->status ) );
1358 /** Hermon Infiniband operations */
1359 static struct ib_device_operations hermon_ib_operations = {
1360 .create_cq = hermon_create_cq,
1361 .destroy_cq = hermon_destroy_cq,
1362 .create_qp = hermon_create_qp,
1363 .destroy_qp = hermon_destroy_qp,
1364 .post_send = hermon_post_send,
1365 .post_recv = hermon_post_recv,
1366 .poll_cq = hermon_poll_cq,
1367 .open = hermon_open,
1368 .close = hermon_close,
1369 .mcast_attach = hermon_mcast_attach,
1370 .mcast_detach = hermon_mcast_detach,
1374 /***************************************************************************
1378 ***************************************************************************
1382 * Start firmware running
1384 * @v hermon Hermon device
1385 * @ret rc Return status code
1387 static int hermon_start_firmware ( struct hermon *hermon ) {
1388 struct hermonprm_query_fw fw;
1389 struct hermonprm_virtual_physical_mapping map_fa;
1390 unsigned int fw_pages;
1391 unsigned int log2_fw_pages;
1396 /* Get firmware parameters */
1397 if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
1398 DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
1399 hermon, strerror ( rc ) );
1402 DBGC ( hermon, "Hermon %p firmware version %ld.%ld.%ld\n", hermon,
1403 MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
1404 MLX_GET ( &fw, fw_rev_subminor ) );
1405 fw_pages = MLX_GET ( &fw, fw_pages );
1406 log2_fw_pages = fls ( fw_pages - 1 );
1407 fw_pages = ( 1 << log2_fw_pages );
1408 DBGC ( hermon, "Hermon %p requires %d kB for firmware\n",
1409 hermon, ( fw_pages * 4 ) );
1411 /* Allocate firmware pages and map firmware area */
1412 fw_size = ( fw_pages * HERMON_PAGE_SIZE );
1413 hermon->firmware_area = umalloc ( fw_size );
1414 if ( ! hermon->firmware_area ) {
1418 fw_base = ( user_to_phys ( hermon->firmware_area, fw_size ) &
1420 DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
1421 hermon, fw_base, ( fw_base + fw_size ) );
1422 memset ( &map_fa, 0, sizeof ( map_fa ) );
1423 MLX_FILL_2 ( &map_fa, 3,
1424 log2size, log2_fw_pages,
1425 pa_l, ( fw_base >> 12 ) );
1426 if ( ( rc = hermon_cmd_map_fa ( hermon, &map_fa ) ) != 0 ) {
1427 DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
1428 hermon, strerror ( rc ) );
1432 /* Start firmware */
1433 if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
1434 DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
1435 hermon, strerror ( rc ) );
1439 DBGC ( hermon, "Hermon %p firmware started\n", hermon );
1443 hermon_cmd_unmap_fa ( hermon );
1445 ufree ( hermon->firmware_area );
1446 hermon->firmware_area = UNULL;
1453 * Stop firmware running
1455 * @v hermon Hermon device
1457 static void hermon_stop_firmware ( struct hermon *hermon ) {
1460 if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
1461 DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
1462 hermon, strerror ( rc ) );
1463 /* Leak memory and return; at least we avoid corruption */
1466 ufree ( hermon->firmware_area );
1467 hermon->firmware_area = UNULL;
1470 /***************************************************************************
1472 * Infinihost Context Memory management
1474 ***************************************************************************
1480 * @v hermon Hermon device
1481 * @ret rc Return status code
1483 static int hermon_get_cap ( struct hermon *hermon ) {
1484 struct hermonprm_query_dev_cap dev_cap;
1487 if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
1488 DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
1489 hermon, strerror ( rc ) );
1493 hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
1494 hermon->cap.reserved_qps =
1495 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
1496 hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
1497 hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
1498 hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
1499 hermon->cap.reserved_srqs =
1500 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
1501 hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
1502 hermon->cap.reserved_cqs =
1503 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
1504 hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
1505 hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
1506 hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
1507 hermon->cap.reserved_mtts =
1508 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
1509 hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
1510 hermon->cap.reserved_mrws =
1511 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
1512 hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
1513 hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
1521 * @v log_num_entries Log2 of the number of entries
1522 * @v entry_size Entry size
1523 * @ret usage Usage size in ICM
1525 static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
1528 usage = ( ( 1 << log_num_entries ) * entry_size );
1529 usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
1530 ~( HERMON_PAGE_SIZE - 1 ) );
1537 * @v hermon Hermon device
1538 * @v init_hca INIT_HCA structure to fill in
1539 * @ret rc Return status code
1541 static int hermon_alloc_icm ( struct hermon *hermon,
1542 struct hermonprm_init_hca *init_hca ) {
1543 struct hermonprm_scalar_parameter icm_size;
1544 struct hermonprm_scalar_parameter icm_aux_size;
1545 struct hermonprm_virtual_physical_mapping map_icm_aux;
1546 struct hermonprm_virtual_physical_mapping map_icm;
1547 uint64_t icm_offset = 0;
1548 unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
1549 unsigned int log_num_mtts, log_num_mpts;
1550 size_t cmpt_max_len;
1551 size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
1552 size_t icm_len, icm_aux_len;
1553 physaddr_t icm_phys;
1558 * Start by carving up the ICM virtual address space
1562 /* Calculate number of each object type within ICM */
1563 log_num_qps = fls ( hermon->cap.reserved_qps + HERMON_MAX_QPS - 1 );
1564 log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
1565 log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
1566 log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
1567 log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
1569 /* ICM starts with the cMPT tables, which are sparse */
1570 cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
1571 ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
1572 qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
1573 hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
1574 hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
1575 icm_offset += cmpt_max_len;
1576 srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
1577 hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
1578 hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
1579 icm_offset += cmpt_max_len;
1580 cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
1581 hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
1582 hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
1583 icm_offset += cmpt_max_len;
1584 eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
1585 hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
1586 hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
1587 icm_offset += cmpt_max_len;
1589 hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
1591 /* Queue pair contexts */
1592 MLX_FILL_1 ( init_hca, 12,
1593 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
1594 ( icm_offset >> 32 ) );
1595 MLX_FILL_2 ( init_hca, 13,
1596 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
1597 ( icm_offset >> 5 ),
1598 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
1600 DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
1601 icm_offset += icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
1603 /* Extended alternate path contexts */
1604 MLX_FILL_1 ( init_hca, 24,
1605 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
1606 ( icm_offset >> 32 ) );
1607 MLX_FILL_1 ( init_hca, 25,
1608 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
1610 DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
1611 icm_offset += icm_usage ( log_num_qps,
1612 hermon->cap.altc_entry_size );
1614 /* Extended auxiliary contexts */
1615 MLX_FILL_1 ( init_hca, 28,
1616 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
1617 ( icm_offset >> 32 ) );
1618 MLX_FILL_1 ( init_hca, 29,
1619 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
1621 DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
1622 icm_offset += icm_usage ( log_num_qps,
1623 hermon->cap.auxc_entry_size );
1625 /* Shared receive queue contexts */
1626 MLX_FILL_1 ( init_hca, 18,
1627 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
1628 ( icm_offset >> 32 ) );
1629 MLX_FILL_2 ( init_hca, 19,
1630 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
1631 ( icm_offset >> 5 ),
1632 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
1634 DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
1635 icm_offset += icm_usage ( log_num_srqs,
1636 hermon->cap.srqc_entry_size );
1638 /* Completion queue contexts */
1639 MLX_FILL_1 ( init_hca, 20,
1640 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
1641 ( icm_offset >> 32 ) );
1642 MLX_FILL_2 ( init_hca, 21,
1643 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
1644 ( icm_offset >> 5 ),
1645 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
1647 DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
1648 icm_offset += icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
1650 /* Event queue contexts */
1651 MLX_FILL_1 ( init_hca, 32,
1652 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
1653 ( icm_offset >> 32 ) );
1654 MLX_FILL_2 ( init_hca, 33,
1655 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
1656 ( icm_offset >> 5 ),
1657 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
1659 DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
1660 icm_offset += icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
1662 /* Memory translation table */
1663 MLX_FILL_1 ( init_hca, 64,
1664 tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
1665 MLX_FILL_1 ( init_hca, 65,
1666 tpt_parameters.mtt_base_addr_l, icm_offset );
1667 DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
1668 icm_offset += icm_usage ( log_num_mtts,
1669 hermon->cap.mtt_entry_size );
1671 /* Memory protection table */
1672 log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
1673 MLX_FILL_1 ( init_hca, 60,
1674 tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
1675 MLX_FILL_1 ( init_hca, 61,
1676 tpt_parameters.dmpt_base_adr_l, icm_offset );
1677 MLX_FILL_1 ( init_hca, 62,
1678 tpt_parameters.log_dmpt_sz, log_num_mpts );
1679 DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
1680 icm_offset += icm_usage ( log_num_mpts,
1681 hermon->cap.dmpt_entry_size );
1683 /* Multicast table */
1684 MLX_FILL_1 ( init_hca, 48,
1685 multicast_parameters.mc_base_addr_h,
1686 ( icm_offset >> 32 ) );
1687 MLX_FILL_1 ( init_hca, 49,
1688 multicast_parameters.mc_base_addr_l, icm_offset );
1689 MLX_FILL_1 ( init_hca, 52,
1690 multicast_parameters.log_mc_table_entry_sz,
1691 fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
1692 MLX_FILL_1 ( init_hca, 53,
1693 multicast_parameters.log_mc_table_hash_sz, 3 );
1694 MLX_FILL_1 ( init_hca, 54,
1695 multicast_parameters.log_mc_table_sz, 3 );
1696 DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
1697 icm_offset += ( ( 8 * sizeof ( struct hermonprm_mcg_entry ) +
1698 HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
1700 hermon->icm_map[HERMON_ICM_OTHER].len =
1701 ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
1704 * Allocate and map physical memory for (portions of) ICM
1707 * ICM AUX area (aligned to its own size)
1712 /* Calculate physical memory required for ICM */
1714 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
1715 icm_len += hermon->icm_map[i].len;
1718 /* Get ICM auxiliary area size */
1719 memset ( &icm_size, 0, sizeof ( icm_size ) );
1720 MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
1721 MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
1722 if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
1723 &icm_aux_size ) ) != 0 ) {
1724 DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
1725 hermon, strerror ( rc ) );
1726 goto err_set_icm_size;
1728 icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
1729 /* Must round up to nearest power of two :( */
1730 icm_aux_len = ( 1 << fls ( icm_aux_len - 1 ) );
1732 /* Allocate ICM data and auxiliary area */
1733 DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
1734 hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
1735 hermon->icm = umalloc ( 2 * icm_aux_len + icm_len );
1736 if ( ! hermon->icm ) {
1740 icm_phys = user_to_phys ( hermon->icm, 0 );
1742 /* Map ICM auxiliary area */
1743 icm_phys = ( ( icm_phys + icm_aux_len - 1 ) & ~( icm_aux_len - 1 ) );
1744 memset ( &map_icm_aux, 0, sizeof ( map_icm_aux ) );
1745 MLX_FILL_2 ( &map_icm_aux, 3,
1746 log2size, fls ( ( icm_aux_len / HERMON_PAGE_SIZE ) - 1 ),
1747 pa_l, ( icm_phys >> 12 ) );
1748 DBGC ( hermon, "Hermon %p mapping ICM AUX (2^%d pages) => %08lx\n",
1749 hermon, fls ( ( icm_aux_len / HERMON_PAGE_SIZE ) - 1 ),
1751 if ( ( rc = hermon_cmd_map_icm_aux ( hermon, &map_icm_aux ) ) != 0 ) {
1752 DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
1753 hermon, strerror ( rc ) );
1754 goto err_map_icm_aux;
1756 icm_phys += icm_aux_len;
1759 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
1760 memset ( &map_icm, 0, sizeof ( map_icm ) );
1761 MLX_FILL_1 ( &map_icm, 0,
1762 va_h, ( hermon->icm_map[i].offset >> 32 ) );
1763 MLX_FILL_1 ( &map_icm, 1,
1764 va_l, ( hermon->icm_map[i].offset >> 12 ) );
1765 MLX_FILL_2 ( &map_icm, 3,
1767 fls ( ( hermon->icm_map[i].len /
1768 HERMON_PAGE_SIZE ) - 1 ),
1769 pa_l, ( icm_phys >> 12 ) );
1770 DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx (2^%d pages) "
1771 "=> %08lx\n", hermon, hermon->icm_map[i].offset,
1772 hermon->icm_map[i].len,
1773 fls ( ( hermon->icm_map[i].len /
1774 HERMON_PAGE_SIZE ) - 1 ), icm_phys );
1775 if ( ( rc = hermon_cmd_map_icm ( hermon, &map_icm ) ) != 0 ) {
1776 DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
1777 hermon, strerror ( rc ) );
1780 icm_phys += hermon->icm_map[i].len;
1786 assert ( i == 0 ); /* We don't handle partial failure at present */
1787 hermon_cmd_unmap_icm_aux ( hermon );
1789 ufree ( hermon->icm );
1790 hermon->icm = UNULL;
1799 * @v hermon Hermon device
1801 static void hermon_free_icm ( struct hermon *hermon ) {
1802 struct hermonprm_scalar_parameter unmap_icm;
1805 for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
1806 memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
1807 MLX_FILL_1 ( &unmap_icm, 0, value_hi,
1808 ( hermon->icm_map[i].offset >> 32 ) );
1809 MLX_FILL_1 ( &unmap_icm, 1, value,
1810 hermon->icm_map[i].offset );
1811 hermon_cmd_unmap_icm ( hermon,
1812 ( 1 << fls ( ( hermon->icm_map[i].len /
1813 HERMON_PAGE_SIZE ) - 1)),
1816 hermon_cmd_unmap_icm_aux ( hermon );
1817 ufree ( hermon->icm );
1818 hermon->icm = UNULL;
1821 /***************************************************************************
1825 ***************************************************************************
1829 * Set up memory protection table
1831 * @v hermon Hermon device
1832 * @ret rc Return status code
1834 static int hermon_setup_mpt ( struct hermon *hermon ) {
1835 struct hermonprm_mpt mpt;
1840 key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
1841 hermon->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
1843 /* Initialise memory protection table */
1844 memset ( &mpt, 0, sizeof ( mpt ) );
1845 MLX_FILL_4 ( &mpt, 0,
1850 MLX_FILL_1 ( &mpt, 2, mem_key, key );
1851 MLX_FILL_1 ( &mpt, 3, pd, HERMON_GLOBAL_PD );
1852 MLX_FILL_1 ( &mpt, 10, len64, 1 );
1853 if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
1854 hermon->cap.reserved_mrws,
1856 DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
1857 hermon, strerror ( rc ) );
1869 * @ret rc Return status code
1871 static int hermon_probe ( struct pci_device *pci,
1872 const struct pci_device_id *id __unused ) {
1873 struct ib_device *ibdev;
1874 struct hermon *hermon;
1875 struct hermonprm_init_hca init_hca;
1878 /* Allocate Infiniband device */
1879 ibdev = alloc_ibdev ( sizeof ( *hermon ) );
1884 ibdev->op = &hermon_ib_operations;
1885 pci_set_drvdata ( pci, ibdev );
1886 ibdev->dev = &pci->dev;
1887 ibdev->port = PXE_IB_PORT;
1888 hermon = ibdev->dev_priv;
1889 memset ( hermon, 0, sizeof ( *hermon ) );
1891 /* Fix up PCI device */
1892 adjust_pci_device ( pci );
1895 hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
1896 HERMON_PCI_CONFIG_BAR_SIZE );
1897 hermon->uar = ioremap ( ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ) +
1898 HERMON_UAR_PAGE * HERMON_PAGE_SIZE ),
1901 /* Allocate space for mailboxes */
1902 hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
1903 HERMON_MBOX_ALIGN );
1904 if ( ! hermon->mailbox_in ) {
1906 goto err_mailbox_in;
1908 hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
1909 HERMON_MBOX_ALIGN );
1910 if ( ! hermon->mailbox_out ) {
1912 goto err_mailbox_out;
1915 /* Start firmware */
1916 if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
1917 goto err_start_firmware;
1919 /* Get device limits */
1920 if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
1924 memset ( &init_hca, 0, sizeof ( init_hca ) );
1925 if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
1928 /* Initialise HCA */
1929 MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
1930 MLX_FILL_1 ( &init_hca, 5, udp, 1 );
1931 MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
1932 if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
1933 DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
1934 hermon, strerror ( rc ) );
1938 /* Set up memory protection */
1939 if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
1942 /* Register Infiniband device */
1943 if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
1944 DBGC ( hermon, "Hermon %p could not register IB device: %s\n",
1945 hermon, strerror ( rc ) );
1946 goto err_register_ibdev;
1953 hermon_cmd_close_hca ( hermon );
1955 hermon_free_icm ( hermon );
1958 hermon_stop_firmware ( hermon );
1960 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
1962 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
1964 free_ibdev ( ibdev );
1974 static void hermon_remove ( struct pci_device *pci ) {
1975 struct ib_device *ibdev = pci_get_drvdata ( pci );
1976 struct hermon *hermon = ibdev->dev_priv;
1978 unregister_ibdev ( ibdev );
1979 hermon_cmd_close_hca ( hermon );
1980 hermon_free_icm ( hermon );
1981 hermon_stop_firmware ( hermon );
1982 hermon_stop_firmware ( hermon );
1983 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
1984 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
1985 free_ibdev ( ibdev );
1988 static struct pci_device_id hermon_nics[] = {
1989 PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver" ),
1990 PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver" ),
1993 struct pci_driver hermon_driver __pci_driver = {
1995 .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
1996 .probe = hermon_probe,
1997 .remove = hermon_remove,