1 /* rtl8139.c - etherboot driver for the Realtek 8139 chipset
3 ported from the linux driver written by Donald Becker
4 by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
6 This software may be used and distributed according to the terms
7 of the GNU Public License, incorporated herein by reference.
9 changes to the original driver:
10 - removed support for interrupts, switching to polling mode (yuck!)
11 - removed support for the 8129 chip (external MII)
15 /*********************************************************************/
16 /* Revision History */
17 /*********************************************************************/
20 27 May 2006 mcb30@users.sourceforge.net (Michael Brown)
21 Rewrote to use the new net driver API, the updated PCI API, and
22 the generic three-wire serial device support for EEPROM access.
24 28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
25 Put in virt_to_bus calls to allow Etherboot relocation.
27 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
28 Following email from Hyun-Joon Cha, added a disable routine, otherwise
29 NIC remains live and can crash the kernel later.
31 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
32 Shuffled things around, removed the leftovers from the 8129 support
33 that was in the Linux driver and added a bit more 8139 definitions.
34 Moved the 8K receive buffer to a fixed, available address outside the
35 0x98000-0x9ffff range. This is a bit of a hack, but currently the only
36 way to make room for the Etherboot features that need substantial amounts
37 of code like the ANSI console support. Currently the buffer is just below
38 0x10000, so this even conforms to the tagged boot image specification,
39 which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
40 interpretation of this "reserved" is that Etherboot may do whatever it
41 likes, as long as its environment is kept intact (like the BIOS
42 variables). Hopefully fixed rtl_poll() once and for all. The symptoms
43 were that if Etherboot was left at the boot menu for several minutes, the
44 first eth_poll failed. Seems like I am the only person who does this.
45 First of all I fixed the debugging code and then set out for a long bug
46 hunting session. It took me about a week full time work - poking around
47 various places in the driver, reading Don Becker's and Jeff Garzik's Linux
48 driver and even the FreeBSD driver (what a piece of crap!) - and
49 eventually spotted the nasty thing: the transmit routine was acknowledging
50 each and every interrupt pending, including the RxOverrun and RxFIFIOver
51 interrupts. This confused the RTL8139 thoroughly. It destroyed the
52 Rx ring contents by dumping the 2K FIFO contents right where we wanted to
53 get the next packet. Oh well, what fun.
55 18 Jan 2000 mdc@etherboot.org (Marty Connor)
56 Drastically simplified error handling. Basically, if any error
57 in transmission or reception occurs, the card is reset.
58 Also, pointed all transmit descriptors to the same buffer to
59 save buffer space. This should decrease driver size and avoid
60 corruption because of exceeding 32K during runtime.
62 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
63 rtl_poll was quite broken: it used the RxOK interrupt flag instead
64 of the RxBufferEmpty flag which often resulted in very bad
65 transmission performace - below 1kBytes/s.
77 #include <gpxe/if_ether.h>
78 #include <gpxe/ethernet.h>
79 #include <gpxe/iobuf.h>
80 #include <gpxe/netdevice.h>
81 #include <gpxe/spi_bit.h>
82 #include <gpxe/threewire.h>
85 #define TX_RING_SIZE 4
89 struct io_buffer *iobuf[TX_RING_SIZE];
98 unsigned short ioaddr;
100 struct rtl8139_rx rx;
101 struct spi_bit_basher spibit;
102 struct spi_device eeprom;
103 struct nvo_block nvo;
106 /* Tuning Parameters */
107 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
108 #define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
109 #define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
110 #define TX_DMA_BURST 4 /* Calculate as 16<<val. */
111 #define TX_IPG 3 /* This is the only valid value */
112 #define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
113 #define RX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) )
116 /* Symbolic offsets to registers. */
117 enum RTL8139_registers {
118 MAC0=0, /* Ethernet hardware address. */
119 MAR0=8, /* Multicast filter. */
120 TxStatus0=0x10, /* Transmit status (four 32bit registers). */
121 TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
122 RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
123 ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
124 IntrMask=0x3C, IntrStatus=0x3E,
125 TxConfig=0x40, RxConfig=0x44,
126 Timer=0x48, /* general-purpose counter. */
127 RxMissed=0x4C, /* 24 bits valid, write clears. */
128 Cfg9346=0x50, Config0=0x51, Config1=0x52,
129 TimerIntrReg=0x54, /* intr if gp counter reaches this value */
133 RevisionID=0x5E, /* revision of the RTL8139 chip */
135 MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
137 DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
139 RxCnt=0x72, /* packet received counter */
140 CSCR=0x74, /* chip status and configuration register */
141 PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
142 /* from 0x84 onwards are a number of power management/wakeup frame
143 * definitions we will probably never need to know about. */
146 enum RxEarlyStatusBits {
147 ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
151 CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
154 SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
155 FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
156 TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
159 /* Interrupt register bits, using my own meaningful names. */
160 enum IntrStatusBits {
161 PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
162 RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
163 TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
166 TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
167 TxOutOfWindow=0x20000000, TxAborted=0x40000000,
168 TxCarrierLost=0x80000000,
171 RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
172 RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
173 RxBadAlign=0x0002, RxStatusOK=0x0001,
176 enum MediaStatusBits {
177 MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
178 MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
182 BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
183 BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
187 CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
188 CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
189 CSCR_LinkDownCmd=0x0f3c0,
195 AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
196 AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
204 #define EE_M1 0x80 /* Mode select bit 1 */
205 #define EE_M0 0x40 /* Mode select bit 0 */
206 #define EE_CS 0x08 /* EEPROM chip select */
207 #define EE_SK 0x04 /* EEPROM shift clock */
208 #define EE_DI 0x02 /* Data in */
209 #define EE_DO 0x01 /* Data out */
211 /* Offsets within EEPROM (these are word offsets) */
214 static const uint8_t rtl_ee_bits[] = {
215 [SPI_BIT_SCLK] = EE_SK,
216 [SPI_BIT_MOSI] = EE_DI,
217 [SPI_BIT_MISO] = EE_DO,
218 [SPI_BIT_SS(0)] = ( EE_CS | EE_M1 ),
221 static int rtl_spi_read_bit ( struct bit_basher *basher,
222 unsigned int bit_id ) {
223 struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
225 uint8_t mask = rtl_ee_bits[bit_id];
228 eereg = inb ( rtl->ioaddr + Cfg9346 );
229 return ( eereg & mask );
232 static void rtl_spi_write_bit ( struct bit_basher *basher,
233 unsigned int bit_id, unsigned long data ) {
234 struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
236 uint8_t mask = rtl_ee_bits[bit_id];
239 eereg = inb ( rtl->ioaddr + Cfg9346 );
241 eereg |= ( data & mask );
242 outb ( eereg, rtl->ioaddr + Cfg9346 );
245 static struct bit_basher_operations rtl_basher_ops = {
246 .read = rtl_spi_read_bit,
247 .write = rtl_spi_write_bit,
250 /** Portion of EEPROM available for non-volatile stored options
252 * We use offset 0x40 (i.e. address 0x20), length 0x40. This block is
253 * marked as VPD in the rtl8139 datasheets, so we use it only if we
254 * detect that the card is not supporting VPD.
256 static struct nvo_fragment rtl_nvo_fragments[] = {
262 * Set up for EEPROM access
266 void rtl_init_eeprom ( struct rtl8139_nic *rtl ) {
270 /* Initialise three-wire bus */
271 rtl->spibit.basher.op = &rtl_basher_ops;
272 rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
273 init_spi_bit_basher ( &rtl->spibit );
275 /* Detect EEPROM type and initialise three-wire device */
276 ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 );
278 DBG ( "EEPROM is an AT93C56\n" );
279 init_at93c56 ( &rtl->eeprom, 16 );
281 DBG ( "EEPROM is an AT93C46\n" );
282 init_at93c46 ( &rtl->eeprom, 16 );
284 rtl->eeprom.bus = &rtl->spibit.bus;
286 /* Initialise space for non-volatile options, if available */
287 vpd = ( inw ( rtl->ioaddr + Config1 ) & VPDEnable );
289 DBG ( "EEPROM in use for VPD; cannot use for options\n" );
291 rtl->nvo.nvs = &rtl->eeprom.nvs;
292 rtl->nvo.fragments = rtl_nvo_fragments;
301 * Issues a hardware reset and waits for the reset to complete.
303 static void rtl_reset ( struct rtl8139_nic *rtl ) {
305 /* Disable interrupts. May not be necessary, but datasheet
306 * doesn't say that the reset command also resets the
309 outw ( 0, rtl->ioaddr + IntrMask );
312 outb ( CmdReset, rtl->ioaddr + ChipCmd );
314 memset ( &rtl->tx, 0, sizeof ( rtl->tx ) );
321 * @v netdev Net device
322 * @ret rc Return status code
324 static int rtl_open ( struct net_device *netdev ) {
325 struct rtl8139_nic *rtl = netdev->priv;
328 /* Program the MAC address */
329 for ( i = 0 ; i < ETH_ALEN ; i++ )
330 outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i );
333 rtl->rx.ring = malloc ( RX_BUF_LEN + RX_BUF_PAD );
334 if ( ! rtl->rx.ring )
336 outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf );
337 DBG ( "RX ring at %lx\n", virt_to_bus ( rtl->rx.ring ) );
339 /* Enable TX and RX */
340 outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd );
341 outl ( ( ( RX_FIFO_THRESH << 13 ) | ( RX_BUF_LEN_IDX << 11 ) |
342 ( RX_DMA_BURST << 8 ) | AcceptBroadcast | AcceptMulticast |
343 AcceptMyPhys ), rtl->ioaddr + RxConfig );
344 outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 0 );
345 outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 4 );
346 outl ( ( ( TX_DMA_BURST << 8 ) | ( TX_IPG << 24 ) ),
347 rtl->ioaddr + TxConfig );
349 /* Enable interrupts */
350 outw ( ( ROK | RER | TOK | TER ), rtl->ioaddr + IntrMask );
358 * @v netdev Net device
360 static void rtl_close ( struct net_device *netdev ) {
361 struct rtl8139_nic *rtl = netdev->priv;
363 /* Reset the hardware to disable everything in one go */
367 free ( rtl->rx.ring );
374 * @v netdev Network device
375 * @v iobuf I/O buffer
376 * @ret rc Return status code
378 static int rtl_transmit ( struct net_device *netdev, struct io_buffer *iobuf ) {
379 struct rtl8139_nic *rtl = netdev->priv;
381 /* Check for space in TX ring */
382 if ( rtl->tx.iobuf[rtl->tx.next] != NULL ) {
383 printf ( "TX overflow\n" );
388 /* Pad and align packet */
389 iob_pad ( iobuf, ETH_ZLEN );
392 DBG ( "TX id %d at %lx+%x\n", rtl->tx.next,
393 virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
394 rtl->tx.iobuf[rtl->tx.next] = iobuf;
395 outl ( virt_to_bus ( iobuf->data ),
396 rtl->ioaddr + TxAddr0 + 4 * rtl->tx.next );
397 outl ( ( ( ( TX_FIFO_THRESH & 0x7e0 ) << 11 ) | iob_len ( iobuf ) ),
398 rtl->ioaddr + TxStatus0 + 4 * rtl->tx.next );
399 rtl->tx.next = ( rtl->tx.next + 1 ) % TX_RING_SIZE;
405 * Poll for received packets
407 * @v netdev Network device
408 * @v rx_quota Maximum number of packets to receive
410 static void rtl_poll ( struct net_device *netdev, unsigned int rx_quota ) {
411 struct rtl8139_nic *rtl = netdev->priv;
414 unsigned int rx_status;
416 struct io_buffer *rx_iob;
420 /* Acknowledge interrupts */
421 status = inw ( rtl->ioaddr + IntrStatus );
424 outw ( status, rtl->ioaddr + IntrStatus );
426 /* Handle TX completions */
427 tsad = inw ( rtl->ioaddr + TxSummary );
428 for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
429 if ( ( rtl->tx.iobuf[i] != NULL ) && ( tsad & ( 1 << i ) ) ) {
430 DBG ( "TX id %d complete\n", i );
431 netdev_tx_complete ( netdev, rtl->tx.iobuf[i] );
432 rtl->tx.iobuf[i] = NULL;
436 /* Handle received packets */
437 while ( rx_quota && ! ( inw ( rtl->ioaddr + ChipCmd ) & RxBufEmpty ) ){
438 rx_status = * ( ( uint16_t * )
439 ( rtl->rx.ring + rtl->rx.offset ) );
440 rx_len = * ( ( uint16_t * )
441 ( rtl->rx.ring + rtl->rx.offset + 2 ) );
442 if ( rx_status & RxOK ) {
443 DBG ( "RX packet at offset %x+%x\n", rtl->rx.offset,
446 rx_iob = alloc_iob ( rx_len );
448 /* Leave packet for next call to poll() */
452 wrapped_len = ( ( rtl->rx.offset + 4 + rx_len )
454 if ( wrapped_len < 0 )
457 memcpy ( iob_put ( rx_iob, rx_len - wrapped_len ),
458 rtl->rx.ring + rtl->rx.offset + 4,
459 rx_len - wrapped_len );
460 memcpy ( iob_put ( rx_iob, wrapped_len ),
461 rtl->rx.ring, wrapped_len );
463 netdev_rx ( netdev, rx_iob );
466 DBG ( "RX bad packet (status %#04x len %d)\n",
469 rtl->rx.offset = ( ( ( rtl->rx.offset + 4 + rx_len + 3 ) & ~3 )
471 outw ( rtl->rx.offset - 16, rtl->ioaddr + RxBufPtr );
476 static void rtl_irq(struct nic *nic, irq_action_t action)
479 /* Bit of a guess as to which interrupts we should allow */
480 unsigned int interested = ROK | RER | RXOVW | FOVW | SERR;
485 mask = inw(rtl->ioaddr + IntrMask);
486 mask = mask & ~interested;
487 if ( action == ENABLE ) mask = mask | interested;
488 outw(mask, rtl->ioaddr + IntrMask);
491 /* Apparently writing a 1 to this read-only bit of a
492 * read-only and otherwise unrelated register will
493 * force an interrupt. If you ever want to see how
494 * not to write a datasheet, read the one for the
497 outb(EROK, rtl->ioaddr + RxEarlyStatus);
508 * @ret rc Return status code
510 static int rtl_probe ( struct pci_device *pci,
511 const struct pci_device_id *id __unused ) {
512 struct net_device *netdev;
513 struct rtl8139_nic *rtl;
516 /* Allocate net device */
517 netdev = alloc_etherdev ( sizeof ( *rtl ) );
521 pci_set_drvdata ( pci, netdev );
522 netdev->dev = &pci->dev;
523 memset ( rtl, 0, sizeof ( *rtl ) );
524 rtl->ioaddr = pci->ioaddr;
526 /* Fix up PCI device */
527 adjust_pci_device ( pci );
529 /* Reset the NIC, set up EEPROM access and read MAC address */
531 rtl_init_eeprom ( rtl );
532 nvs_read ( &rtl->eeprom.nvs, EE_MAC, netdev->ll_addr, ETH_ALEN );
534 /* Point to NIC specific routines */
535 netdev->open = rtl_open;
536 netdev->close = rtl_close;
537 netdev->transmit = rtl_transmit;
538 netdev->poll = rtl_poll;
540 /* Register network device */
541 if ( ( rc = register_netdev ( netdev ) ) != 0 )
542 goto err_register_netdev;
544 /* Register non-volatile storage */
545 if ( rtl->nvo.nvs ) {
546 if ( ( rc = nvo_register ( &rtl->nvo ) ) != 0 )
547 goto err_register_nvo;
553 unregister_netdev ( netdev );
556 netdev_put ( netdev );
565 static void rtl_remove ( struct pci_device *pci ) {
566 struct net_device *netdev = pci_get_drvdata ( pci );
567 struct rtl8139_nic *rtl = netdev->priv;
570 nvo_unregister ( &rtl->nvo );
571 unregister_netdev ( netdev );
573 netdev_put ( netdev );
576 static struct pci_device_id rtl8139_nics[] = {
577 PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129"),
578 PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139"),
579 PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B"),
580 PCI_ROM(0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX"),
581 PCI_ROM(0x1113, 0x1211, "smc1211-1", "SMC EZ10/100"),
582 PCI_ROM(0x1112, 0x1211, "smc1211", "SMC EZ10/100"),
583 PCI_ROM(0x1500, 0x1360, "delta8139", "Delta Electronics 8139"),
584 PCI_ROM(0x4033, 0x1360, "addtron8139", "Addtron Technology 8139"),
585 PCI_ROM(0x1186, 0x1340, "dfe690txd", "D-Link DFE690TXD"),
586 PCI_ROM(0x13d1, 0xab06, "fe2000vx", "AboCom FE2000VX"),
587 PCI_ROM(0x1259, 0xa117, "allied8139", "Allied Telesyn 8139"),
588 PCI_ROM(0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX"),
589 PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX"),
590 PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139"),
593 struct pci_driver rtl8139_driver __pci_driver = {
595 .id_count = ( sizeof ( rtl8139_nics ) / sizeof ( rtl8139_nics[0] ) ),
597 .remove = rtl_remove,