2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 Mellanox Technologies Ltd.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
30 #include <gpxe/malloc.h>
31 #include <gpxe/umalloc.h>
32 #include <gpxe/iobuf.h>
33 #include <gpxe/netdevice.h>
34 #include <gpxe/infiniband.h>
35 #include <gpxe/ib_smc.h>
41 * Mellanox Hermon Infiniband HCA
45 /***************************************************************************
47 * Queue number allocation
49 ***************************************************************************
53 * Allocate offsets within usage bitmask
55 * @v bits Usage bitmask
56 * @v bits_len Length of usage bitmask
57 * @v num_bits Number of contiguous bits to allocate within bitmask
58 * @ret bit First free bit within bitmask, or negative error
60 static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
61 unsigned int bits_len,
62 unsigned int num_bits ) {
64 hermon_bitmask_t mask = 1;
65 unsigned int found = 0;
67 /* Search bits for num_bits contiguous free bits */
68 while ( bit < bits_len ) {
69 if ( ( mask & *bits ) == 0 ) {
70 if ( ++found == num_bits )
76 mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
83 /* Mark bits as in-use */
88 mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
91 return ( bit - num_bits + 1 );
95 * Free offsets within usage bitmask
97 * @v bits Usage bitmask
98 * @v bit Starting bit within bitmask
99 * @v num_bits Number of contiguous bits to free within bitmask
101 static void hermon_bitmask_free ( hermon_bitmask_t *bits,
102 int bit, unsigned int num_bits ) {
103 hermon_bitmask_t mask;
105 for ( ; num_bits ; bit++, num_bits-- ) {
106 mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
107 bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
111 /***************************************************************************
115 ***************************************************************************
119 * Wait for Hermon command completion
121 * @v hermon Hermon device
122 * @v hcr HCA command registers
123 * @ret rc Return status code
125 static int hermon_cmd_wait ( struct hermon *hermon,
126 struct hermonprm_hca_command_register *hcr ) {
129 for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
131 readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
132 if ( ( MLX_GET ( hcr, go ) == 0 ) &&
133 ( MLX_GET ( hcr, t ) == hermon->toggle ) )
143 * @v hermon Hermon device
144 * @v command Command opcode, flags and input/output lengths
145 * @v op_mod Opcode modifier (0 if no modifier applicable)
146 * @v in Input parameters
147 * @v in_mod Input modifier (0 if no modifier applicable)
148 * @v out Output parameters
149 * @ret rc Return status code
151 static int hermon_cmd ( struct hermon *hermon, unsigned long command,
152 unsigned int op_mod, const void *in,
153 unsigned int in_mod, void *out ) {
154 struct hermonprm_hca_command_register hcr;
155 unsigned int opcode = HERMON_HCR_OPCODE ( command );
156 size_t in_len = HERMON_HCR_IN_LEN ( command );
157 size_t out_len = HERMON_HCR_OUT_LEN ( command );
164 assert ( in_len <= HERMON_MBOX_SIZE );
165 assert ( out_len <= HERMON_MBOX_SIZE );
167 DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
168 hermon, opcode, in_len,
169 ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
170 ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
172 /* Check that HCR is free */
173 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
174 DBGC ( hermon, "Hermon %p command interface locked\n",
179 /* Flip HCR toggle */
180 hermon->toggle = ( 1 - hermon->toggle );
183 memset ( &hcr, 0, sizeof ( hcr ) );
184 in_buffer = &hcr.u.dwords[0];
185 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
186 in_buffer = hermon->mailbox_in;
187 MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
189 memcpy ( in_buffer, in, in_len );
190 MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
191 out_buffer = &hcr.u.dwords[3];
192 if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
193 out_buffer = hermon->mailbox_out;
194 MLX_FILL_1 ( &hcr, 4, out_param_l,
195 virt_to_bus ( out_buffer ) );
197 MLX_FILL_4 ( &hcr, 6,
199 opcode_modifier, op_mod,
202 DBGC ( hermon, "Hermon %p issuing command:\n", hermon );
203 DBGC_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
204 &hcr, sizeof ( hcr ) );
205 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
206 DBGC2 ( hermon, "Input mailbox:\n" );
207 DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
208 ( ( in_len < 512 ) ? in_len : 512 ) );
212 for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
214 writel ( hcr.u.dwords[i],
215 hermon->config + HERMON_HCR_REG ( i ) );
219 /* Wait for command completion */
220 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
221 DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
224 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
225 &hcr, sizeof ( hcr ) );
229 /* Check command status */
230 status = MLX_GET ( &hcr, status );
232 DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
235 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
236 &hcr, sizeof ( hcr ) );
240 /* Read output parameters, if any */
241 hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
242 hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
243 memcpy ( out, out_buffer, out_len );
245 DBGC2 ( hermon, "Output%s:\n",
246 ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
247 DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
248 ( ( out_len < 512 ) ? out_len : 512 ) );
255 hermon_cmd_query_dev_cap ( struct hermon *hermon,
256 struct hermonprm_query_dev_cap *dev_cap ) {
257 return hermon_cmd ( hermon,
258 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
259 1, sizeof ( *dev_cap ) ),
260 0, NULL, 0, dev_cap );
264 hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
265 return hermon_cmd ( hermon,
266 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
272 hermon_cmd_init_hca ( struct hermon *hermon,
273 const struct hermonprm_init_hca *init_hca ) {
274 return hermon_cmd ( hermon,
275 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
276 1, sizeof ( *init_hca ) ),
277 0, init_hca, 0, NULL );
281 hermon_cmd_close_hca ( struct hermon *hermon ) {
282 return hermon_cmd ( hermon,
283 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
288 hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
289 const struct hermonprm_init_port *init_port ) {
290 return hermon_cmd ( hermon,
291 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
292 1, sizeof ( *init_port ) ),
293 0, init_port, port, NULL );
297 hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
298 return hermon_cmd ( hermon,
299 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
300 0, NULL, port, NULL );
304 hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
305 const struct hermonprm_mpt *mpt ) {
306 return hermon_cmd ( hermon,
307 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
308 1, sizeof ( *mpt ) ),
309 0, mpt, index, NULL );
313 hermon_cmd_write_mtt ( struct hermon *hermon,
314 const struct hermonprm_write_mtt *write_mtt ) {
315 return hermon_cmd ( hermon,
316 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
317 1, sizeof ( *write_mtt ) ),
318 0, write_mtt, 1, NULL );
322 hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
323 const struct hermonprm_event_mask *mask ) {
324 return hermon_cmd ( hermon,
325 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
326 0, sizeof ( *mask ) ),
327 0, mask, index_map, NULL );
331 hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
332 const struct hermonprm_eqc *eqctx ) {
333 return hermon_cmd ( hermon,
334 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
335 1, sizeof ( *eqctx ) ),
336 0, eqctx, index, NULL );
340 hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
341 struct hermonprm_eqc *eqctx ) {
342 return hermon_cmd ( hermon,
343 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
344 1, sizeof ( *eqctx ) ),
345 1, NULL, index, eqctx );
349 hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
350 struct hermonprm_eqc *eqctx ) {
351 return hermon_cmd ( hermon,
352 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
353 1, sizeof ( *eqctx ) ),
354 0, NULL, index, eqctx );
358 hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
359 const struct hermonprm_completion_queue_context *cqctx ){
360 return hermon_cmd ( hermon,
361 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
362 1, sizeof ( *cqctx ) ),
363 0, cqctx, cqn, NULL );
367 hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
368 struct hermonprm_completion_queue_context *cqctx) {
369 return hermon_cmd ( hermon,
370 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
371 1, sizeof ( *cqctx ) ),
372 0, NULL, cqn, cqctx );
376 hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
377 const struct hermonprm_qp_ee_state_transitions *ctx ){
378 return hermon_cmd ( hermon,
379 HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
380 1, sizeof ( *ctx ) ),
385 hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
386 const struct hermonprm_qp_ee_state_transitions *ctx ){
387 return hermon_cmd ( hermon,
388 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
389 1, sizeof ( *ctx ) ),
394 hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
395 const struct hermonprm_qp_ee_state_transitions *ctx ) {
396 return hermon_cmd ( hermon,
397 HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
398 1, sizeof ( *ctx ) ),
403 hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
404 const struct hermonprm_qp_ee_state_transitions *ctx ) {
405 return hermon_cmd ( hermon,
406 HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
407 1, sizeof ( *ctx ) ),
412 hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
413 return hermon_cmd ( hermon,
414 HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
415 0x03, NULL, qpn, NULL );
419 hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
420 union hermonprm_mad *mad ) {
421 return hermon_cmd ( hermon,
422 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
424 1, sizeof ( *mad ) ),
425 0x03, mad, port, mad );
429 hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
430 struct hermonprm_mcg_entry *mcg ) {
431 return hermon_cmd ( hermon,
432 HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
433 1, sizeof ( *mcg ) ),
434 0, NULL, index, mcg );
438 hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
439 const struct hermonprm_mcg_entry *mcg ) {
440 return hermon_cmd ( hermon,
441 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
442 1, sizeof ( *mcg ) ),
443 0, mcg, index, NULL );
447 hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
448 struct hermonprm_mgm_hash *hash ) {
449 return hermon_cmd ( hermon,
450 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
452 0, sizeof ( *hash ) ),
457 hermon_cmd_run_fw ( struct hermon *hermon ) {
458 return hermon_cmd ( hermon,
459 HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
464 hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
465 const struct hermonprm_scalar_parameter *offset ) {
466 return hermon_cmd ( hermon,
467 HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
468 0, sizeof ( *offset ) ),
469 0, offset, page_count, NULL );
473 hermon_cmd_map_icm ( struct hermon *hermon,
474 const struct hermonprm_virtual_physical_mapping *map ) {
475 return hermon_cmd ( hermon,
476 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
477 1, sizeof ( *map ) ),
482 hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
483 return hermon_cmd ( hermon,
484 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
489 hermon_cmd_map_icm_aux ( struct hermon *hermon,
490 const struct hermonprm_virtual_physical_mapping *map ) {
491 return hermon_cmd ( hermon,
492 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
493 1, sizeof ( *map ) ),
498 hermon_cmd_set_icm_size ( struct hermon *hermon,
499 const struct hermonprm_scalar_parameter *icm_size,
500 struct hermonprm_scalar_parameter *icm_aux_size ) {
501 return hermon_cmd ( hermon,
502 HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
503 0, sizeof ( *icm_size ),
504 0, sizeof (*icm_aux_size) ),
505 0, icm_size, 0, icm_aux_size );
509 hermon_cmd_unmap_fa ( struct hermon *hermon ) {
510 return hermon_cmd ( hermon,
511 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
516 hermon_cmd_map_fa ( struct hermon *hermon,
517 const struct hermonprm_virtual_physical_mapping *map ) {
518 return hermon_cmd ( hermon,
519 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
520 1, sizeof ( *map ) ),
524 /***************************************************************************
526 * Memory translation table operations
528 ***************************************************************************
532 * Allocate MTT entries
534 * @v hermon Hermon device
535 * @v memory Memory to map into MTT
536 * @v len Length of memory to map
537 * @v mtt MTT descriptor to fill in
538 * @ret rc Return status code
540 static int hermon_alloc_mtt ( struct hermon *hermon,
541 const void *memory, size_t len,
542 struct hermon_mtt *mtt ) {
543 struct hermonprm_write_mtt write_mtt;
545 unsigned int page_offset;
546 unsigned int num_pages;
548 unsigned int mtt_base_addr;
552 /* Find available MTT entries */
553 start = virt_to_phys ( memory );
554 page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
555 start -= page_offset;
557 num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
558 mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
560 if ( mtt_offset < 0 ) {
561 DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
566 mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
567 hermon->cap.mtt_entry_size );
569 /* Fill in MTT structure */
570 mtt->mtt_offset = mtt_offset;
571 mtt->num_pages = num_pages;
572 mtt->mtt_base_addr = mtt_base_addr;
573 mtt->page_offset = page_offset;
575 /* Construct and issue WRITE_MTT commands */
576 for ( i = 0 ; i < num_pages ; i++ ) {
577 memset ( &write_mtt, 0, sizeof ( write_mtt ) );
578 MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
579 value, mtt_base_addr );
580 MLX_FILL_2 ( &write_mtt.mtt, 1,
582 ptag_l, ( start >> 3 ) );
583 if ( ( rc = hermon_cmd_write_mtt ( hermon,
584 &write_mtt ) ) != 0 ) {
585 DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
586 hermon, mtt_base_addr );
589 start += HERMON_PAGE_SIZE;
590 mtt_base_addr += hermon->cap.mtt_entry_size;
596 hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
604 * @v hermon Hermon device
605 * @v mtt MTT descriptor
607 static void hermon_free_mtt ( struct hermon *hermon,
608 struct hermon_mtt *mtt ) {
609 hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
613 /***************************************************************************
617 ***************************************************************************
621 * Issue management datagram
623 * @v ibdev Infiniband device
624 * @v mad Management datagram
625 * @ret rc Return status code
627 static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
628 struct hermon *hermon = ib_get_drvdata ( ibdev );
629 union hermonprm_mad mad_ifc;
632 linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
635 /* Copy in request packet */
636 memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
639 if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
640 &mad_ifc ) ) != 0 ) {
641 DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
642 hermon, strerror ( rc ) );
646 /* Copy out reply packet */
647 memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
649 if ( mad->hdr.status != 0 ) {
650 DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
651 hermon, ntohs ( mad->hdr.status ) );
657 /***************************************************************************
659 * Completion queue operations
661 ***************************************************************************
665 * Create completion queue
667 * @v ibdev Infiniband device
668 * @v cq Completion queue
669 * @ret rc Return status code
671 static int hermon_create_cq ( struct ib_device *ibdev,
672 struct ib_completion_queue *cq ) {
673 struct hermon *hermon = ib_get_drvdata ( ibdev );
674 struct hermon_completion_queue *hermon_cq;
675 struct hermonprm_completion_queue_context cqctx;
680 /* Find a free completion queue number */
681 cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
683 if ( cqn_offset < 0 ) {
684 DBGC ( hermon, "Hermon %p out of completion queues\n",
689 cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
691 /* Allocate control structures */
692 hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
698 /* Allocate completion queue itself */
699 hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
700 hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
701 sizeof ( hermon_cq->cqe[0] ) );
702 if ( ! hermon_cq->cqe ) {
706 memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
707 for ( i = 0 ; i < cq->num_cqes ; i++ ) {
708 MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
712 /* Allocate MTT entries */
713 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
715 &hermon_cq->mtt ) ) != 0 )
718 /* Hand queue over to hardware */
719 memset ( &cqctx, 0, sizeof ( cqctx ) );
720 MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
721 MLX_FILL_1 ( &cqctx, 2,
722 page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
723 MLX_FILL_2 ( &cqctx, 3,
724 usr_page, HERMON_UAR_NON_EQ_PAGE,
725 log_cq_size, fls ( cq->num_cqes - 1 ) );
726 MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
727 ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
728 MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
729 ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
730 if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
731 DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
732 hermon, strerror ( rc ) );
736 DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
737 hermon, cq->cqn, hermon_cq->cqe,
738 ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
739 ib_cq_set_drvdata ( cq, hermon_cq );
743 hermon_free_mtt ( hermon, &hermon_cq->mtt );
745 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
749 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
755 * Destroy completion queue
757 * @v ibdev Infiniband device
758 * @v cq Completion queue
760 static void hermon_destroy_cq ( struct ib_device *ibdev,
761 struct ib_completion_queue *cq ) {
762 struct hermon *hermon = ib_get_drvdata ( ibdev );
763 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
764 struct hermonprm_completion_queue_context cqctx;
768 /* Take ownership back from hardware */
769 if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
770 DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
771 "%s\n", hermon, cq->cqn, strerror ( rc ) );
772 /* Leak memory and return; at least we avoid corruption */
776 /* Free MTT entries */
777 hermon_free_mtt ( hermon, &hermon_cq->mtt );
780 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
783 /* Mark queue number as free */
784 cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
785 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
787 ib_cq_set_drvdata ( cq, NULL );
790 /***************************************************************************
792 * Queue pair operations
794 ***************************************************************************
800 * @v ibdev Infiniband device
802 * @ret rc Return status code
804 static int hermon_create_qp ( struct ib_device *ibdev,
805 struct ib_queue_pair *qp ) {
806 struct hermon *hermon = ib_get_drvdata ( ibdev );
807 struct hermon_queue_pair *hermon_qp;
808 struct hermonprm_qp_ee_state_transitions qpctx;
812 /* Find a free queue pair number */
813 qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
815 if ( qpn_offset < 0 ) {
816 DBGC ( hermon, "Hermon %p out of queue pairs\n", hermon );
820 qp->qpn = ( HERMON_QPN_BASE + hermon->cap.reserved_qps +
823 /* Allocate control structures */
824 hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
830 /* Calculate doorbell address */
831 hermon_qp->send.doorbell =
832 ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
833 HERMON_DB_POST_SND_OFFSET );
835 /* Allocate work queue buffer */
836 hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
837 ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
838 hermon_qp->send.num_wqes =
839 ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
840 hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
841 sizeof ( hermon_qp->send.wqe[0] ) );
842 hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
843 sizeof ( hermon_qp->recv.wqe[0] ) );
844 hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
845 hermon_qp->recv.wqe_size );
846 hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
847 sizeof ( hermon_qp->send.wqe[0] ) );
848 if ( ! hermon_qp->wqe ) {
852 hermon_qp->send.wqe = hermon_qp->wqe;
853 memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
854 hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
855 memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
857 /* Allocate MTT entries */
858 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
860 &hermon_qp->mtt ) ) != 0 ) {
864 /* Transition queue to INIT state */
865 memset ( &qpctx, 0, sizeof ( qpctx ) );
866 MLX_FILL_2 ( &qpctx, 2,
867 qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
868 qpc_eec_data.st, HERMON_ST_UD );
869 MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
870 MLX_FILL_4 ( &qpctx, 4,
871 qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
872 qpc_eec_data.log_rq_stride,
873 ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
874 qpc_eec_data.log_sq_size,
875 fls ( hermon_qp->send.num_wqes - 1 ),
876 qpc_eec_data.log_sq_stride,
877 ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
878 MLX_FILL_1 ( &qpctx, 5,
879 qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
880 MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
881 MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.page_offset,
882 ( hermon_qp->mtt.page_offset >> 6 ) );
883 MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
884 MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
885 ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
886 MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
887 MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
888 ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
889 if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
891 DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
892 hermon, strerror ( rc ) );
893 goto err_rst2init_qp;
896 /* Transition queue to RTR state */
897 memset ( &qpctx, 0, sizeof ( qpctx ) );
898 MLX_FILL_2 ( &qpctx, 4,
899 qpc_eec_data.mtu, HERMON_MTU_2048,
900 qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
901 MLX_FILL_1 ( &qpctx, 16,
902 qpc_eec_data.primary_address_path.sched_queue,
903 ( 0x83 /* default policy */ |
904 ( ( ibdev->port - 1 ) << 6 ) ) );
905 if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
907 DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
908 hermon, strerror ( rc ) );
909 goto err_init2rtr_qp;
911 memset ( &qpctx, 0, sizeof ( qpctx ) );
912 if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
913 DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
914 hermon, strerror ( rc ) );
918 DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
919 hermon, qp->qpn, hermon_qp->send.wqe,
920 ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
921 DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
922 hermon, qp->qpn, hermon_qp->recv.wqe,
923 ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
924 ib_qp_set_drvdata ( qp, hermon_qp );
929 hermon_cmd_2rst_qp ( hermon, qp->qpn );
931 hermon_free_mtt ( hermon, &hermon_qp->mtt );
933 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
937 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
945 * @v ibdev Infiniband device
947 * @v mod_list Modification list
948 * @ret rc Return status code
950 static int hermon_modify_qp ( struct ib_device *ibdev,
951 struct ib_queue_pair *qp,
952 unsigned long mod_list ) {
953 struct hermon *hermon = ib_get_drvdata ( ibdev );
954 struct hermonprm_qp_ee_state_transitions qpctx;
955 unsigned long optparammask = 0;
958 /* Construct optparammask */
959 if ( mod_list & IB_MODIFY_QKEY )
960 optparammask |= HERMON_QP_OPT_PARAM_QKEY;
962 /* Issue RTS2RTS_QP */
963 memset ( &qpctx, 0, sizeof ( qpctx ) );
964 MLX_FILL_1 ( &qpctx, 0, opt_param_mask, optparammask );
965 MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
966 if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
967 DBGC ( hermon, "Hermon %p RTS2RTS_QP failed: %s\n",
968 hermon, strerror ( rc ) );
978 * @v ibdev Infiniband device
981 static void hermon_destroy_qp ( struct ib_device *ibdev,
982 struct ib_queue_pair *qp ) {
983 struct hermon *hermon = ib_get_drvdata ( ibdev );
984 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
988 /* Take ownership back from hardware */
989 if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
990 DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
991 "%s\n", hermon, qp->qpn, strerror ( rc ) );
992 /* Leak memory and return; at least we avoid corruption */
996 /* Free MTT entries */
997 hermon_free_mtt ( hermon, &hermon_qp->mtt );
1000 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
1003 /* Mark queue number as free */
1004 qpn_offset = ( qp->qpn - HERMON_QPN_BASE -
1005 hermon->cap.reserved_qps );
1006 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
1008 ib_qp_set_drvdata ( qp, NULL );
1011 /***************************************************************************
1013 * Work request operations
1015 ***************************************************************************
1018 /** GID used for GID-less send work queue entries */
1019 static const struct ib_gid hermon_no_gid = {
1020 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
1024 * Post send work queue entry
1026 * @v ibdev Infiniband device
1028 * @v av Address vector
1029 * @v iobuf I/O buffer
1030 * @ret rc Return status code
1032 static int hermon_post_send ( struct ib_device *ibdev,
1033 struct ib_queue_pair *qp,
1034 struct ib_address_vector *av,
1035 struct io_buffer *iobuf ) {
1036 struct hermon *hermon = ib_get_drvdata ( ibdev );
1037 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1038 struct ib_work_queue *wq = &qp->send;
1039 struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
1040 struct hermonprm_ud_send_wqe *wqe;
1041 const struct ib_gid *gid;
1042 union hermonprm_doorbell_register db_reg;
1043 unsigned int wqe_idx_mask;
1045 /* Allocate work queue entry */
1046 wqe_idx_mask = ( wq->num_wqes - 1 );
1047 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1048 DBGC ( hermon, "Hermon %p send queue full", hermon );
1051 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1052 wqe = &hermon_send_wq->wqe[ wq->next_idx &
1053 ( hermon_send_wq->num_wqes - 1 ) ].ud;
1055 /* Construct work queue entry */
1056 memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
1057 ( sizeof ( *wqe ) - 4 ) );
1058 MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( *wqe ) / 16 ) );
1059 MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
1060 MLX_FILL_2 ( &wqe->ud, 0,
1061 ud_address_vector.pd, HERMON_GLOBAL_PD,
1062 ud_address_vector.port_number, ibdev->port );
1063 MLX_FILL_2 ( &wqe->ud, 1,
1064 ud_address_vector.rlid, av->lid,
1065 ud_address_vector.g, av->gid_present );
1066 MLX_FILL_1 ( &wqe->ud, 2,
1067 ud_address_vector.max_stat_rate,
1068 ( ( ( av->rate < 2 ) || ( av->rate > 10 ) ) ?
1069 8 : ( av->rate + 5 ) ) );
1070 MLX_FILL_1 ( &wqe->ud, 3, ud_address_vector.sl, av->sl );
1071 gid = ( av->gid_present ? &av->gid : &hermon_no_gid );
1072 memcpy ( &wqe->ud.u.dwords[4], gid, sizeof ( *gid ) );
1073 MLX_FILL_1 ( &wqe->ud, 8, destination_qp, av->qpn );
1074 MLX_FILL_1 ( &wqe->ud, 9, q_key, av->qkey );
1075 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_len ( iobuf ) );
1076 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
1077 MLX_FILL_1 ( &wqe->data[0], 3,
1078 local_address_l, virt_to_bus ( iobuf->data ) );
1080 MLX_FILL_2 ( &wqe->ctrl, 0,
1081 opcode, HERMON_OPCODE_SEND,
1083 ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
1084 DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
1085 DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
1088 /* Ring doorbell register */
1089 MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
1090 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1091 virt_to_phys ( hermon_send_wq->doorbell ), db_reg.dword[0] );
1092 writel ( db_reg.dword[0], ( hermon_send_wq->doorbell ) );
1094 /* Update work queue's index */
1101 * Post receive work queue entry
1103 * @v ibdev Infiniband device
1105 * @v iobuf I/O buffer
1106 * @ret rc Return status code
1108 static int hermon_post_recv ( struct ib_device *ibdev,
1109 struct ib_queue_pair *qp,
1110 struct io_buffer *iobuf ) {
1111 struct hermon *hermon = ib_get_drvdata ( ibdev );
1112 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1113 struct ib_work_queue *wq = &qp->recv;
1114 struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
1115 struct hermonprm_recv_wqe *wqe;
1116 unsigned int wqe_idx_mask;
1118 /* Allocate work queue entry */
1119 wqe_idx_mask = ( wq->num_wqes - 1 );
1120 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1121 DBGC ( hermon, "Hermon %p receive queue full", hermon );
1124 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1125 wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
1127 /* Construct work queue entry */
1128 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
1129 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
1130 MLX_FILL_1 ( &wqe->data[0], 3,
1131 local_address_l, virt_to_bus ( iobuf->data ) );
1133 /* Update work queue's index */
1136 /* Update doorbell record */
1138 MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
1139 ( wq->next_idx & 0xffff ) );
1147 * @v ibdev Infiniband device
1148 * @v cq Completion queue
1149 * @v cqe Hardware completion queue entry
1150 * @ret rc Return status code
1152 static int hermon_complete ( struct ib_device *ibdev,
1153 struct ib_completion_queue *cq,
1154 union hermonprm_completion_entry *cqe ) {
1155 struct hermon *hermon = ib_get_drvdata ( ibdev );
1156 struct ib_work_queue *wq;
1157 struct ib_queue_pair *qp;
1158 struct hermon_queue_pair *hermon_qp;
1159 struct io_buffer *iobuf;
1160 struct ib_address_vector av;
1161 struct ib_global_route_header *grh;
1162 unsigned int opcode;
1165 unsigned int wqe_idx;
1169 /* Parse completion */
1170 qpn = MLX_GET ( &cqe->normal, qpn );
1171 is_send = MLX_GET ( &cqe->normal, s_r );
1172 opcode = MLX_GET ( &cqe->normal, opcode );
1173 if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
1174 /* "s" field is not valid for error opcodes */
1175 is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
1176 DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %x\n",
1177 hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
1178 MLX_GET ( &cqe->error, vendor_error_syndrome ) );
1180 /* Don't return immediately; propagate error to completer */
1183 /* Identify work queue */
1184 wq = ib_find_wq ( cq, qpn, is_send );
1186 DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
1187 hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
1191 hermon_qp = ib_qp_get_drvdata ( qp );
1193 /* Identify I/O buffer */
1194 wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
1195 ( wq->num_wqes - 1 ) );
1196 iobuf = wq->iobufs[wqe_idx];
1198 DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
1199 hermon, cq->cqn, qpn, wqe_idx );
1202 wq->iobufs[wqe_idx] = NULL;
1205 /* Hand off to completion handler */
1206 ib_complete_send ( ibdev, qp, iobuf, rc );
1208 /* Set received length */
1209 len = MLX_GET ( &cqe->normal, byte_cnt );
1210 assert ( len <= iob_tailroom ( iobuf ) );
1211 iob_put ( iobuf, len );
1212 assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
1214 iob_pull ( iobuf, sizeof ( *grh ) );
1215 /* Construct address vector */
1216 memset ( &av, 0, sizeof ( av ) );
1217 av.qpn = MLX_GET ( &cqe->normal, srq_rqpn );
1218 av.lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
1219 av.sl = MLX_GET ( &cqe->normal, sl );
1220 av.gid_present = MLX_GET ( &cqe->normal, g );
1221 memcpy ( &av.gid, &grh->sgid, sizeof ( av.gid ) );
1222 /* Hand off to completion handler */
1223 ib_complete_recv ( ibdev, qp, &av, iobuf, rc );
1230 * Poll completion queue
1232 * @v ibdev Infiniband device
1233 * @v cq Completion queue
1235 static void hermon_poll_cq ( struct ib_device *ibdev,
1236 struct ib_completion_queue *cq ) {
1237 struct hermon *hermon = ib_get_drvdata ( ibdev );
1238 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
1239 union hermonprm_completion_entry *cqe;
1240 unsigned int cqe_idx_mask;
1244 /* Look for completion entry */
1245 cqe_idx_mask = ( cq->num_cqes - 1 );
1246 cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
1247 if ( MLX_GET ( &cqe->normal, owner ) ^
1248 ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
1249 /* Entry still owned by hardware; end of poll */
1252 DBGCP ( hermon, "Hermon %p completion:\n", hermon );
1253 DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
1255 /* Handle completion */
1256 if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
1257 DBGC ( hermon, "Hermon %p failed to complete: %s\n",
1258 hermon, strerror ( rc ) );
1259 DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
1262 /* Update completion queue's index */
1265 /* Update doorbell record */
1266 MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
1267 ( cq->next_idx & 0x00ffffffUL ) );
1271 /***************************************************************************
1275 ***************************************************************************
1279 * Create event queue
1281 * @v hermon Hermon device
1282 * @ret rc Return status code
1284 static int hermon_create_eq ( struct hermon *hermon ) {
1285 struct hermon_event_queue *hermon_eq = &hermon->eq;
1286 struct hermonprm_eqc eqctx;
1287 struct hermonprm_event_mask mask;
1291 /* Select event queue number */
1292 hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
1293 if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
1294 hermon_eq->eqn = hermon->cap.reserved_eqs;
1296 /* Calculate doorbell address */
1297 hermon_eq->doorbell =
1298 ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
1300 /* Allocate event queue itself */
1301 hermon_eq->eqe_size =
1302 ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
1303 hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
1304 sizeof ( hermon_eq->eqe[0] ) );
1305 if ( ! hermon_eq->eqe ) {
1309 memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
1310 for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
1311 MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
1315 /* Allocate MTT entries */
1316 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
1317 hermon_eq->eqe_size,
1318 &hermon_eq->mtt ) ) != 0 )
1321 /* Hand queue over to hardware */
1322 memset ( &eqctx, 0, sizeof ( eqctx ) );
1323 MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
1324 MLX_FILL_1 ( &eqctx, 2,
1325 page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
1326 MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
1327 MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
1328 ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
1329 if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
1331 DBGC ( hermon, "Hermon %p SW2HW_EQ failed: %s\n",
1332 hermon, strerror ( rc ) );
1336 /* Map events to this event queue */
1337 memset ( &mask, 0, sizeof ( mask ) );
1338 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1339 if ( ( rc = hermon_cmd_map_eq ( hermon,
1340 ( HERMON_MAP_EQ | hermon_eq->eqn ),
1342 DBGC ( hermon, "Hermon %p MAP_EQ failed: %s\n",
1343 hermon, strerror ( rc ) );
1347 DBGC ( hermon, "Hermon %p EQN %#lx ring at [%p,%p])\n",
1348 hermon, hermon_eq->eqn, hermon_eq->eqe,
1349 ( ( ( void * ) hermon_eq->eqe ) + hermon_eq->eqe_size ) );
1353 hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
1355 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1357 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1359 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1364 * Destroy event queue
1366 * @v hermon Hermon device
1368 static void hermon_destroy_eq ( struct hermon *hermon ) {
1369 struct hermon_event_queue *hermon_eq = &hermon->eq;
1370 struct hermonprm_eqc eqctx;
1371 struct hermonprm_event_mask mask;
1374 /* Unmap events from event queue */
1375 memset ( &mask, 0, sizeof ( mask ) );
1376 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1377 if ( ( rc = hermon_cmd_map_eq ( hermon,
1378 ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
1380 DBGC ( hermon, "Hermon %p FATAL MAP_EQ failed to unmap: %s\n",
1381 hermon, strerror ( rc ) );
1382 /* Continue; HCA may die but system should survive */
1385 /* Take ownership back from hardware */
1386 if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
1388 DBGC ( hermon, "Hermon %p FATAL HW2SW_EQ failed: %s\n",
1389 hermon, strerror ( rc ) );
1390 /* Leak memory and return; at least we avoid corruption */
1394 /* Free MTT entries */
1395 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1398 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1399 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1403 * Handle port state event
1405 * @v hermon Hermon device
1406 * @v eqe Port state change event queue entry
1408 static void hermon_event_port_state_change ( struct hermon *hermon,
1409 union hermonprm_event_entry *eqe){
1413 /* Get port and link status */
1414 port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
1415 link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
1416 DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
1417 ( link_up ? "up" : "down" ) );
1420 if ( port >= HERMON_NUM_PORTS ) {
1421 DBGC ( hermon, "Hermon %p port %d does not exist!\n",
1422 hermon, ( port + 1 ) );
1426 /* Update MAD parameters */
1427 ib_smc_update ( hermon->ibdev[port], hermon_mad );
1429 /* Notify Infiniband core of link state change */
1430 ib_link_state_changed ( hermon->ibdev[port] );
1436 * @v ibdev Infiniband device
1438 static void hermon_poll_eq ( struct ib_device *ibdev ) {
1439 struct hermon *hermon = ib_get_drvdata ( ibdev );
1440 struct hermon_event_queue *hermon_eq = &hermon->eq;
1441 union hermonprm_event_entry *eqe;
1442 union hermonprm_doorbell_register db_reg;
1443 unsigned int eqe_idx_mask;
1444 unsigned int event_type;
1447 /* Look for event entry */
1448 eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
1449 eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
1450 if ( MLX_GET ( &eqe->generic, owner ) ^
1451 ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
1452 /* Entry still owned by hardware; end of poll */
1455 DBGCP ( hermon, "Hermon %p event:\n", hermon );
1456 DBGCP_HD ( hermon, eqe, sizeof ( *eqe ) );
1459 event_type = MLX_GET ( &eqe->generic, event_type );
1460 switch ( event_type ) {
1461 case HERMON_EV_PORT_STATE_CHANGE:
1462 hermon_event_port_state_change ( hermon, eqe );
1465 DBGC ( hermon, "Hermon %p unrecognised event type "
1466 "%#x:\n", hermon, event_type );
1467 DBGC_HD ( hermon, eqe, sizeof ( *eqe ) );
1471 /* Update event queue's index */
1472 hermon_eq->next_idx++;
1475 MLX_FILL_1 ( &db_reg.event, 0,
1476 ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
1477 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1478 virt_to_phys ( hermon_eq->doorbell ),
1480 writel ( db_reg.dword[0], hermon_eq->doorbell );
1484 /***************************************************************************
1486 * Infiniband link-layer operations
1488 ***************************************************************************
1492 * Initialise Infiniband link
1494 * @v ibdev Infiniband device
1495 * @ret rc Return status code
1497 static int hermon_open ( struct ib_device *ibdev ) {
1498 struct hermon *hermon = ib_get_drvdata ( ibdev );
1499 struct hermonprm_init_port init_port;
1502 memset ( &init_port, 0, sizeof ( init_port ) );
1503 MLX_FILL_2 ( &init_port, 0,
1506 MLX_FILL_2 ( &init_port, 1,
1507 mtu, HERMON_MTU_2048,
1509 MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
1510 if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
1511 &init_port ) ) != 0 ) {
1512 DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
1513 hermon, strerror ( rc ) );
1517 /* Update MAD parameters */
1518 ib_smc_update ( ibdev, hermon_mad );
1524 * Close Infiniband link
1526 * @v ibdev Infiniband device
1528 static void hermon_close ( struct ib_device *ibdev ) {
1529 struct hermon *hermon = ib_get_drvdata ( ibdev );
1532 if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
1533 DBGC ( hermon, "Hermon %p could not close port: %s\n",
1534 hermon, strerror ( rc ) );
1535 /* Nothing we can do about this */
1539 /***************************************************************************
1541 * Multicast group operations
1543 ***************************************************************************
1547 * Attach to multicast group
1549 * @v ibdev Infiniband device
1551 * @v gid Multicast GID
1552 * @ret rc Return status code
1554 static int hermon_mcast_attach ( struct ib_device *ibdev,
1555 struct ib_queue_pair *qp,
1556 struct ib_gid *gid ) {
1557 struct hermon *hermon = ib_get_drvdata ( ibdev );
1558 struct hermonprm_mgm_hash hash;
1559 struct hermonprm_mcg_entry mcg;
1563 /* Generate hash table index */
1564 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1565 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1566 hermon, strerror ( rc ) );
1569 index = MLX_GET ( &hash, hash );
1571 /* Check for existing hash table entry */
1572 if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
1573 DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
1574 hermon, index, strerror ( rc ) );
1577 if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
1578 /* FIXME: this implementation allows only a single QP
1579 * per multicast group, and doesn't handle hash
1580 * collisions. Sufficient for IPoIB but may need to
1581 * be extended in future.
1583 DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
1588 /* Update hash table entry */
1589 MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
1590 MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
1591 memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
1592 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1593 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1594 hermon, index, strerror ( rc ) );
1602 * Detach from multicast group
1604 * @v ibdev Infiniband device
1606 * @v gid Multicast GID
1608 static void hermon_mcast_detach ( struct ib_device *ibdev,
1609 struct ib_queue_pair *qp __unused,
1610 struct ib_gid *gid ) {
1611 struct hermon *hermon = ib_get_drvdata ( ibdev );
1612 struct hermonprm_mgm_hash hash;
1613 struct hermonprm_mcg_entry mcg;
1617 /* Generate hash table index */
1618 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1619 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1620 hermon, strerror ( rc ) );
1623 index = MLX_GET ( &hash, hash );
1625 /* Clear hash table entry */
1626 memset ( &mcg, 0, sizeof ( mcg ) );
1627 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1628 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1629 hermon, index, strerror ( rc ) );
1634 /** Hermon Infiniband operations */
1635 static struct ib_device_operations hermon_ib_operations = {
1636 .create_cq = hermon_create_cq,
1637 .destroy_cq = hermon_destroy_cq,
1638 .create_qp = hermon_create_qp,
1639 .modify_qp = hermon_modify_qp,
1640 .destroy_qp = hermon_destroy_qp,
1641 .post_send = hermon_post_send,
1642 .post_recv = hermon_post_recv,
1643 .poll_cq = hermon_poll_cq,
1644 .poll_eq = hermon_poll_eq,
1645 .open = hermon_open,
1646 .close = hermon_close,
1647 .mcast_attach = hermon_mcast_attach,
1648 .mcast_detach = hermon_mcast_detach,
1651 /***************************************************************************
1655 ***************************************************************************
1659 * Map virtual to physical address for firmware usage
1661 * @v hermon Hermon device
1662 * @v map Mapping function
1663 * @v va Virtual address
1664 * @v pa Physical address
1665 * @v len Length of region
1666 * @ret rc Return status code
1668 static int hermon_map_vpm ( struct hermon *hermon,
1669 int ( *map ) ( struct hermon *hermon,
1670 const struct hermonprm_virtual_physical_mapping* ),
1671 uint64_t va, physaddr_t pa, size_t len ) {
1672 struct hermonprm_virtual_physical_mapping mapping;
1675 assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1676 assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1677 assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1680 memset ( &mapping, 0, sizeof ( mapping ) );
1681 MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
1682 MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
1683 MLX_FILL_2 ( &mapping, 3,
1685 pa_l, ( pa >> 12 ) );
1686 if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
1687 DBGC ( hermon, "Hermon %p could not map %llx => %lx: "
1688 "%s\n", hermon, va, pa, strerror ( rc ) );
1691 pa += HERMON_PAGE_SIZE;
1692 va += HERMON_PAGE_SIZE;
1693 len -= HERMON_PAGE_SIZE;
1700 * Start firmware running
1702 * @v hermon Hermon device
1703 * @ret rc Return status code
1705 static int hermon_start_firmware ( struct hermon *hermon ) {
1706 struct hermonprm_query_fw fw;
1707 unsigned int fw_pages;
1712 /* Get firmware parameters */
1713 if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
1714 DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
1715 hermon, strerror ( rc ) );
1718 DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
1719 MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
1720 MLX_GET ( &fw, fw_rev_subminor ) );
1721 fw_pages = MLX_GET ( &fw, fw_pages );
1722 DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
1723 hermon, fw_pages, ( fw_pages * ( HERMON_PAGE_SIZE / 1024 ) ) );
1725 /* Allocate firmware pages and map firmware area */
1726 fw_size = ( fw_pages * HERMON_PAGE_SIZE );
1727 hermon->firmware_area = umalloc ( fw_size );
1728 if ( ! hermon->firmware_area ) {
1732 fw_base = user_to_phys ( hermon->firmware_area, 0 );
1733 DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
1734 hermon, fw_base, ( fw_base + fw_size ) );
1735 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
1736 0, fw_base, fw_size ) ) != 0 ) {
1737 DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
1738 hermon, strerror ( rc ) );
1742 /* Start firmware */
1743 if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
1744 DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
1745 hermon, strerror ( rc ) );
1749 DBGC ( hermon, "Hermon %p firmware started\n", hermon );
1754 hermon_cmd_unmap_fa ( hermon );
1755 ufree ( hermon->firmware_area );
1756 hermon->firmware_area = UNULL;
1763 * Stop firmware running
1765 * @v hermon Hermon device
1767 static void hermon_stop_firmware ( struct hermon *hermon ) {
1770 if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
1771 DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
1772 hermon, strerror ( rc ) );
1773 /* Leak memory and return; at least we avoid corruption */
1776 ufree ( hermon->firmware_area );
1777 hermon->firmware_area = UNULL;
1780 /***************************************************************************
1782 * Infinihost Context Memory management
1784 ***************************************************************************
1790 * @v hermon Hermon device
1791 * @ret rc Return status code
1793 static int hermon_get_cap ( struct hermon *hermon ) {
1794 struct hermonprm_query_dev_cap dev_cap;
1797 if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
1798 DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
1799 hermon, strerror ( rc ) );
1803 hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
1804 hermon->cap.reserved_qps =
1805 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
1806 hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
1807 hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
1808 hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
1809 hermon->cap.reserved_srqs =
1810 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
1811 hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
1812 hermon->cap.reserved_cqs =
1813 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
1814 hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
1815 hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
1816 hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
1817 hermon->cap.reserved_mtts =
1818 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
1819 hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
1820 hermon->cap.reserved_mrws =
1821 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
1822 hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
1823 hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
1831 * @v log_num_entries Log2 of the number of entries
1832 * @v entry_size Entry size
1833 * @ret usage Usage size in ICM
1835 static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
1838 usage = ( ( 1 << log_num_entries ) * entry_size );
1839 usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
1840 ~( HERMON_PAGE_SIZE - 1 ) );
1847 * @v hermon Hermon device
1848 * @v init_hca INIT_HCA structure to fill in
1849 * @ret rc Return status code
1851 static int hermon_alloc_icm ( struct hermon *hermon,
1852 struct hermonprm_init_hca *init_hca ) {
1853 struct hermonprm_scalar_parameter icm_size;
1854 struct hermonprm_scalar_parameter icm_aux_size;
1855 uint64_t icm_offset = 0;
1856 unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
1857 unsigned int log_num_mtts, log_num_mpts;
1858 size_t cmpt_max_len;
1859 size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
1860 size_t icm_len, icm_aux_len;
1861 physaddr_t icm_phys;
1866 * Start by carving up the ICM virtual address space
1870 /* Calculate number of each object type within ICM */
1871 log_num_qps = fls ( hermon->cap.reserved_qps + HERMON_MAX_QPS - 1 );
1872 log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
1873 log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
1874 log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
1875 log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
1877 /* ICM starts with the cMPT tables, which are sparse */
1878 cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
1879 ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
1880 qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
1881 hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
1882 hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
1883 icm_offset += cmpt_max_len;
1884 srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
1885 hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
1886 hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
1887 icm_offset += cmpt_max_len;
1888 cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
1889 hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
1890 hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
1891 icm_offset += cmpt_max_len;
1892 eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
1893 hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
1894 hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
1895 icm_offset += cmpt_max_len;
1897 hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
1899 /* Queue pair contexts */
1900 MLX_FILL_1 ( init_hca, 12,
1901 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
1902 ( icm_offset >> 32 ) );
1903 MLX_FILL_2 ( init_hca, 13,
1904 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
1905 ( icm_offset >> 5 ),
1906 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
1908 DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
1909 icm_offset += icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
1911 /* Extended alternate path contexts */
1912 MLX_FILL_1 ( init_hca, 24,
1913 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
1914 ( icm_offset >> 32 ) );
1915 MLX_FILL_1 ( init_hca, 25,
1916 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
1918 DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
1919 icm_offset += icm_usage ( log_num_qps,
1920 hermon->cap.altc_entry_size );
1922 /* Extended auxiliary contexts */
1923 MLX_FILL_1 ( init_hca, 28,
1924 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
1925 ( icm_offset >> 32 ) );
1926 MLX_FILL_1 ( init_hca, 29,
1927 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
1929 DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
1930 icm_offset += icm_usage ( log_num_qps,
1931 hermon->cap.auxc_entry_size );
1933 /* Shared receive queue contexts */
1934 MLX_FILL_1 ( init_hca, 18,
1935 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
1936 ( icm_offset >> 32 ) );
1937 MLX_FILL_2 ( init_hca, 19,
1938 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
1939 ( icm_offset >> 5 ),
1940 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
1942 DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
1943 icm_offset += icm_usage ( log_num_srqs,
1944 hermon->cap.srqc_entry_size );
1946 /* Completion queue contexts */
1947 MLX_FILL_1 ( init_hca, 20,
1948 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
1949 ( icm_offset >> 32 ) );
1950 MLX_FILL_2 ( init_hca, 21,
1951 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
1952 ( icm_offset >> 5 ),
1953 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
1955 DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
1956 icm_offset += icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
1958 /* Event queue contexts */
1959 MLX_FILL_1 ( init_hca, 32,
1960 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
1961 ( icm_offset >> 32 ) );
1962 MLX_FILL_2 ( init_hca, 33,
1963 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
1964 ( icm_offset >> 5 ),
1965 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
1967 DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
1968 icm_offset += icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
1970 /* Memory translation table */
1971 MLX_FILL_1 ( init_hca, 64,
1972 tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
1973 MLX_FILL_1 ( init_hca, 65,
1974 tpt_parameters.mtt_base_addr_l, icm_offset );
1975 DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
1976 icm_offset += icm_usage ( log_num_mtts,
1977 hermon->cap.mtt_entry_size );
1979 /* Memory protection table */
1980 log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
1981 MLX_FILL_1 ( init_hca, 60,
1982 tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
1983 MLX_FILL_1 ( init_hca, 61,
1984 tpt_parameters.dmpt_base_adr_l, icm_offset );
1985 MLX_FILL_1 ( init_hca, 62,
1986 tpt_parameters.log_dmpt_sz, log_num_mpts );
1987 DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
1988 icm_offset += icm_usage ( log_num_mpts,
1989 hermon->cap.dmpt_entry_size );
1991 /* Multicast table */
1992 MLX_FILL_1 ( init_hca, 48,
1993 multicast_parameters.mc_base_addr_h,
1994 ( icm_offset >> 32 ) );
1995 MLX_FILL_1 ( init_hca, 49,
1996 multicast_parameters.mc_base_addr_l, icm_offset );
1997 MLX_FILL_1 ( init_hca, 52,
1998 multicast_parameters.log_mc_table_entry_sz,
1999 fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
2000 MLX_FILL_1 ( init_hca, 53,
2001 multicast_parameters.log_mc_table_hash_sz, 3 );
2002 MLX_FILL_1 ( init_hca, 54,
2003 multicast_parameters.log_mc_table_sz, 3 );
2004 DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
2005 icm_offset += ( ( 8 * sizeof ( struct hermonprm_mcg_entry ) +
2006 HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
2008 hermon->icm_map[HERMON_ICM_OTHER].len =
2009 ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
2012 * Allocate and map physical memory for (portions of) ICM
2015 * ICM AUX area (aligned to its own size)
2020 /* Calculate physical memory required for ICM */
2022 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2023 icm_len += hermon->icm_map[i].len;
2026 /* Get ICM auxiliary area size */
2027 memset ( &icm_size, 0, sizeof ( icm_size ) );
2028 MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
2029 MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
2030 if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
2031 &icm_aux_size ) ) != 0 ) {
2032 DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
2033 hermon, strerror ( rc ) );
2034 goto err_set_icm_size;
2036 icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
2038 /* Allocate ICM data and auxiliary area */
2039 DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
2040 hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
2041 hermon->icm = umalloc ( icm_aux_len + icm_len );
2042 if ( ! hermon->icm ) {
2046 icm_phys = user_to_phys ( hermon->icm, 0 );
2048 /* Map ICM auxiliary area */
2049 DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
2051 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
2052 0, icm_phys, icm_aux_len ) ) != 0 ) {
2053 DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
2054 hermon, strerror ( rc ) );
2055 goto err_map_icm_aux;
2057 icm_phys += icm_aux_len;
2060 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2061 DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
2062 hermon, hermon->icm_map[i].offset,
2063 hermon->icm_map[i].len, icm_phys );
2064 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
2065 hermon->icm_map[i].offset,
2067 hermon->icm_map[i].len ) ) != 0 ){
2068 DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
2069 hermon, strerror ( rc ) );
2072 icm_phys += hermon->icm_map[i].len;
2078 assert ( i == 0 ); /* We don't handle partial failure at present */
2080 hermon_cmd_unmap_icm_aux ( hermon );
2081 ufree ( hermon->icm );
2082 hermon->icm = UNULL;
2091 * @v hermon Hermon device
2093 static void hermon_free_icm ( struct hermon *hermon ) {
2094 struct hermonprm_scalar_parameter unmap_icm;
2097 for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
2098 memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
2099 MLX_FILL_1 ( &unmap_icm, 0, value_hi,
2100 ( hermon->icm_map[i].offset >> 32 ) );
2101 MLX_FILL_1 ( &unmap_icm, 1, value,
2102 hermon->icm_map[i].offset );
2103 hermon_cmd_unmap_icm ( hermon,
2104 ( 1 << fls ( ( hermon->icm_map[i].len /
2105 HERMON_PAGE_SIZE ) - 1)),
2108 hermon_cmd_unmap_icm_aux ( hermon );
2109 ufree ( hermon->icm );
2110 hermon->icm = UNULL;
2113 /***************************************************************************
2117 ***************************************************************************
2121 * Set up memory protection table
2123 * @v hermon Hermon device
2124 * @ret rc Return status code
2126 static int hermon_setup_mpt ( struct hermon *hermon ) {
2127 struct hermonprm_mpt mpt;
2132 key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
2133 hermon->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
2135 /* Initialise memory protection table */
2136 memset ( &mpt, 0, sizeof ( mpt ) );
2137 MLX_FILL_4 ( &mpt, 0,
2142 MLX_FILL_1 ( &mpt, 2, mem_key, key );
2143 MLX_FILL_1 ( &mpt, 3, pd, HERMON_GLOBAL_PD );
2144 MLX_FILL_1 ( &mpt, 10, len64, 1 );
2145 if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
2146 hermon->cap.reserved_mrws,
2148 DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
2149 hermon, strerror ( rc ) );
2161 * @ret rc Return status code
2163 static int hermon_probe ( struct pci_device *pci,
2164 const struct pci_device_id *id __unused ) {
2165 struct hermon *hermon;
2166 struct ib_device *ibdev;
2167 struct hermonprm_init_hca init_hca;
2171 /* Allocate Hermon device */
2172 hermon = zalloc ( sizeof ( *hermon ) );
2175 goto err_alloc_hermon;
2177 pci_set_drvdata ( pci, hermon );
2179 /* Allocate Infiniband devices */
2180 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ ) {
2181 ibdev = alloc_ibdev ( 0 );
2184 goto err_alloc_ibdev;
2186 hermon->ibdev[i] = ibdev;
2187 ibdev->op = &hermon_ib_operations;
2188 ibdev->dev = &pci->dev;
2189 ibdev->port = ( HERMON_PORT_BASE + i );
2190 ib_set_drvdata ( ibdev, hermon );
2193 /* Fix up PCI device */
2194 adjust_pci_device ( pci );
2197 hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
2198 HERMON_PCI_CONFIG_BAR_SIZE );
2199 hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
2200 HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
2202 /* Allocate space for mailboxes */
2203 hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
2204 HERMON_MBOX_ALIGN );
2205 if ( ! hermon->mailbox_in ) {
2207 goto err_mailbox_in;
2209 hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
2210 HERMON_MBOX_ALIGN );
2211 if ( ! hermon->mailbox_out ) {
2213 goto err_mailbox_out;
2216 /* Start firmware */
2217 if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
2218 goto err_start_firmware;
2220 /* Get device limits */
2221 if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
2225 memset ( &init_hca, 0, sizeof ( init_hca ) );
2226 if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
2229 /* Initialise HCA */
2230 MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
2231 MLX_FILL_1 ( &init_hca, 5, udp, 1 );
2232 MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
2233 if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
2234 DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
2235 hermon, strerror ( rc ) );
2239 /* Set up memory protection */
2240 if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
2243 /* Set up event queue */
2244 if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
2247 /* Update MAD parameters */
2248 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ )
2249 ib_smc_update ( hermon->ibdev[i], hermon_mad );
2251 /* Register Infiniband devices */
2252 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ ) {
2253 if ( ( rc = register_ibdev ( hermon->ibdev[i] ) ) != 0 ) {
2254 DBGC ( hermon, "Hermon %p could not register IB "
2255 "device: %s\n", hermon, strerror ( rc ) );
2256 goto err_register_ibdev;
2262 i = HERMON_NUM_PORTS;
2264 for ( i-- ; i >= 0 ; i-- )
2265 unregister_ibdev ( hermon->ibdev[i] );
2266 hermon_destroy_eq ( hermon );
2269 hermon_cmd_close_hca ( hermon );
2271 hermon_free_icm ( hermon );
2274 hermon_stop_firmware ( hermon );
2276 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2278 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2280 i = HERMON_NUM_PORTS;
2282 for ( i-- ; i >= 0 ; i-- )
2283 ibdev_put ( hermon->ibdev[i] );
2294 static void hermon_remove ( struct pci_device *pci ) {
2295 struct hermon *hermon = pci_get_drvdata ( pci );
2298 for ( i = ( HERMON_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
2299 unregister_ibdev ( hermon->ibdev[i] );
2300 hermon_destroy_eq ( hermon );
2301 hermon_cmd_close_hca ( hermon );
2302 hermon_free_icm ( hermon );
2303 hermon_stop_firmware ( hermon );
2304 hermon_stop_firmware ( hermon );
2305 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2306 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2307 for ( i = ( HERMON_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
2308 ibdev_put ( hermon->ibdev[i] );
2312 static struct pci_device_id hermon_nics[] = {
2313 PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
2314 PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
2315 PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
2316 PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
2319 struct pci_driver hermon_driver __pci_driver = {
2321 .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
2322 .probe = hermon_probe,
2323 .remove = hermon_remove,