2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 Mellanox Technologies Ltd.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 FILE_LICENCE ( GPL2_OR_LATER );
32 #include <gpxe/malloc.h>
33 #include <gpxe/umalloc.h>
34 #include <gpxe/iobuf.h>
35 #include <gpxe/netdevice.h>
36 #include <gpxe/infiniband.h>
37 #include <gpxe/ib_smc.h>
43 * Mellanox Hermon Infiniband HCA
47 /***************************************************************************
49 * Queue number allocation
51 ***************************************************************************
55 * Allocate offsets within usage bitmask
57 * @v bits Usage bitmask
58 * @v bits_len Length of usage bitmask
59 * @v num_bits Number of contiguous bits to allocate within bitmask
60 * @ret bit First free bit within bitmask, or negative error
62 static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
63 unsigned int bits_len,
64 unsigned int num_bits ) {
66 hermon_bitmask_t mask = 1;
67 unsigned int found = 0;
69 /* Search bits for num_bits contiguous free bits */
70 while ( bit < bits_len ) {
71 if ( ( mask & *bits ) == 0 ) {
72 if ( ++found == num_bits )
78 mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
85 /* Mark bits as in-use */
90 mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
93 return ( bit - num_bits + 1 );
97 * Free offsets within usage bitmask
99 * @v bits Usage bitmask
100 * @v bit Starting bit within bitmask
101 * @v num_bits Number of contiguous bits to free within bitmask
103 static void hermon_bitmask_free ( hermon_bitmask_t *bits,
104 int bit, unsigned int num_bits ) {
105 hermon_bitmask_t mask;
107 for ( ; num_bits ; bit++, num_bits-- ) {
108 mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
109 bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
113 /***************************************************************************
117 ***************************************************************************
121 * Wait for Hermon command completion
123 * @v hermon Hermon device
124 * @v hcr HCA command registers
125 * @ret rc Return status code
127 static int hermon_cmd_wait ( struct hermon *hermon,
128 struct hermonprm_hca_command_register *hcr ) {
131 for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
133 readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
134 if ( ( MLX_GET ( hcr, go ) == 0 ) &&
135 ( MLX_GET ( hcr, t ) == hermon->toggle ) )
145 * @v hermon Hermon device
146 * @v command Command opcode, flags and input/output lengths
147 * @v op_mod Opcode modifier (0 if no modifier applicable)
148 * @v in Input parameters
149 * @v in_mod Input modifier (0 if no modifier applicable)
150 * @v out Output parameters
151 * @ret rc Return status code
153 static int hermon_cmd ( struct hermon *hermon, unsigned long command,
154 unsigned int op_mod, const void *in,
155 unsigned int in_mod, void *out ) {
156 struct hermonprm_hca_command_register hcr;
157 unsigned int opcode = HERMON_HCR_OPCODE ( command );
158 size_t in_len = HERMON_HCR_IN_LEN ( command );
159 size_t out_len = HERMON_HCR_OUT_LEN ( command );
166 assert ( in_len <= HERMON_MBOX_SIZE );
167 assert ( out_len <= HERMON_MBOX_SIZE );
169 DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
170 hermon, opcode, in_len,
171 ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
172 ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
174 /* Check that HCR is free */
175 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
176 DBGC ( hermon, "Hermon %p command interface locked\n",
181 /* Flip HCR toggle */
182 hermon->toggle = ( 1 - hermon->toggle );
185 memset ( &hcr, 0, sizeof ( hcr ) );
186 in_buffer = &hcr.u.dwords[0];
187 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
188 in_buffer = hermon->mailbox_in;
189 MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
191 memcpy ( in_buffer, in, in_len );
192 MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
193 out_buffer = &hcr.u.dwords[3];
194 if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
195 out_buffer = hermon->mailbox_out;
196 MLX_FILL_1 ( &hcr, 4, out_param_l,
197 virt_to_bus ( out_buffer ) );
199 MLX_FILL_4 ( &hcr, 6,
201 opcode_modifier, op_mod,
204 DBGC ( hermon, "Hermon %p issuing command %04x\n",
206 DBGC2_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
207 &hcr, sizeof ( hcr ) );
208 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
209 DBGC2 ( hermon, "Input mailbox:\n" );
210 DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
211 ( ( in_len < 512 ) ? in_len : 512 ) );
215 for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
217 writel ( hcr.u.dwords[i],
218 hermon->config + HERMON_HCR_REG ( i ) );
222 /* Wait for command completion */
223 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
224 DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
227 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
228 &hcr, sizeof ( hcr ) );
232 /* Check command status */
233 status = MLX_GET ( &hcr, status );
235 DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
238 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
239 &hcr, sizeof ( hcr ) );
243 /* Read output parameters, if any */
244 hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
245 hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
246 memcpy ( out, out_buffer, out_len );
248 DBGC2 ( hermon, "Output%s:\n",
249 ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
250 DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
251 ( ( out_len < 512 ) ? out_len : 512 ) );
258 hermon_cmd_query_dev_cap ( struct hermon *hermon,
259 struct hermonprm_query_dev_cap *dev_cap ) {
260 return hermon_cmd ( hermon,
261 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
262 1, sizeof ( *dev_cap ) ),
263 0, NULL, 0, dev_cap );
267 hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
268 return hermon_cmd ( hermon,
269 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
275 hermon_cmd_init_hca ( struct hermon *hermon,
276 const struct hermonprm_init_hca *init_hca ) {
277 return hermon_cmd ( hermon,
278 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
279 1, sizeof ( *init_hca ) ),
280 0, init_hca, 0, NULL );
284 hermon_cmd_close_hca ( struct hermon *hermon ) {
285 return hermon_cmd ( hermon,
286 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
291 hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
292 const struct hermonprm_init_port *init_port ) {
293 return hermon_cmd ( hermon,
294 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
295 1, sizeof ( *init_port ) ),
296 0, init_port, port, NULL );
300 hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
301 return hermon_cmd ( hermon,
302 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
303 0, NULL, port, NULL );
307 hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
308 const struct hermonprm_mpt *mpt ) {
309 return hermon_cmd ( hermon,
310 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
311 1, sizeof ( *mpt ) ),
312 0, mpt, index, NULL );
316 hermon_cmd_write_mtt ( struct hermon *hermon,
317 const struct hermonprm_write_mtt *write_mtt ) {
318 return hermon_cmd ( hermon,
319 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
320 1, sizeof ( *write_mtt ) ),
321 0, write_mtt, 1, NULL );
325 hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
326 const struct hermonprm_event_mask *mask ) {
327 return hermon_cmd ( hermon,
328 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
329 0, sizeof ( *mask ) ),
330 0, mask, index_map, NULL );
334 hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
335 const struct hermonprm_eqc *eqctx ) {
336 return hermon_cmd ( hermon,
337 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
338 1, sizeof ( *eqctx ) ),
339 0, eqctx, index, NULL );
343 hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
344 struct hermonprm_eqc *eqctx ) {
345 return hermon_cmd ( hermon,
346 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
347 1, sizeof ( *eqctx ) ),
348 1, NULL, index, eqctx );
352 hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
353 struct hermonprm_eqc *eqctx ) {
354 return hermon_cmd ( hermon,
355 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
356 1, sizeof ( *eqctx ) ),
357 0, NULL, index, eqctx );
361 hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
362 const struct hermonprm_completion_queue_context *cqctx ){
363 return hermon_cmd ( hermon,
364 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
365 1, sizeof ( *cqctx ) ),
366 0, cqctx, cqn, NULL );
370 hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
371 struct hermonprm_completion_queue_context *cqctx) {
372 return hermon_cmd ( hermon,
373 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
374 1, sizeof ( *cqctx ) ),
375 0, NULL, cqn, cqctx );
379 hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
380 const struct hermonprm_qp_ee_state_transitions *ctx ){
381 return hermon_cmd ( hermon,
382 HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
383 1, sizeof ( *ctx ) ),
388 hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
389 const struct hermonprm_qp_ee_state_transitions *ctx ){
390 return hermon_cmd ( hermon,
391 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
392 1, sizeof ( *ctx ) ),
397 hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
398 const struct hermonprm_qp_ee_state_transitions *ctx ) {
399 return hermon_cmd ( hermon,
400 HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
401 1, sizeof ( *ctx ) ),
406 hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
407 const struct hermonprm_qp_ee_state_transitions *ctx ) {
408 return hermon_cmd ( hermon,
409 HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
410 1, sizeof ( *ctx ) ),
415 hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
416 return hermon_cmd ( hermon,
417 HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
418 0x03, NULL, qpn, NULL );
422 hermon_cmd_query_qp ( struct hermon *hermon, unsigned long qpn,
423 struct hermonprm_qp_ee_state_transitions *ctx ) {
424 return hermon_cmd ( hermon,
425 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_QP,
426 1, sizeof ( *ctx ) ),
431 hermon_cmd_conf_special_qp ( struct hermon *hermon, unsigned int internal_qps,
432 unsigned long base_qpn ) {
433 return hermon_cmd ( hermon,
434 HERMON_HCR_VOID_CMD ( HERMON_HCR_CONF_SPECIAL_QP ),
435 internal_qps, NULL, base_qpn, NULL );
439 hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
440 union hermonprm_mad *mad ) {
441 return hermon_cmd ( hermon,
442 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
444 1, sizeof ( *mad ) ),
445 0x03, mad, port, mad );
449 hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
450 struct hermonprm_mcg_entry *mcg ) {
451 return hermon_cmd ( hermon,
452 HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
453 1, sizeof ( *mcg ) ),
454 0, NULL, index, mcg );
458 hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
459 const struct hermonprm_mcg_entry *mcg ) {
460 return hermon_cmd ( hermon,
461 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
462 1, sizeof ( *mcg ) ),
463 0, mcg, index, NULL );
467 hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
468 struct hermonprm_mgm_hash *hash ) {
469 return hermon_cmd ( hermon,
470 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
472 0, sizeof ( *hash ) ),
477 hermon_cmd_run_fw ( struct hermon *hermon ) {
478 return hermon_cmd ( hermon,
479 HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
484 hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
485 const struct hermonprm_scalar_parameter *offset ) {
486 return hermon_cmd ( hermon,
487 HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
488 0, sizeof ( *offset ) ),
489 0, offset, page_count, NULL );
493 hermon_cmd_map_icm ( struct hermon *hermon,
494 const struct hermonprm_virtual_physical_mapping *map ) {
495 return hermon_cmd ( hermon,
496 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
497 1, sizeof ( *map ) ),
502 hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
503 return hermon_cmd ( hermon,
504 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
509 hermon_cmd_map_icm_aux ( struct hermon *hermon,
510 const struct hermonprm_virtual_physical_mapping *map ) {
511 return hermon_cmd ( hermon,
512 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
513 1, sizeof ( *map ) ),
518 hermon_cmd_set_icm_size ( struct hermon *hermon,
519 const struct hermonprm_scalar_parameter *icm_size,
520 struct hermonprm_scalar_parameter *icm_aux_size ) {
521 return hermon_cmd ( hermon,
522 HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
523 0, sizeof ( *icm_size ),
524 0, sizeof (*icm_aux_size) ),
525 0, icm_size, 0, icm_aux_size );
529 hermon_cmd_unmap_fa ( struct hermon *hermon ) {
530 return hermon_cmd ( hermon,
531 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
536 hermon_cmd_map_fa ( struct hermon *hermon,
537 const struct hermonprm_virtual_physical_mapping *map ) {
538 return hermon_cmd ( hermon,
539 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
540 1, sizeof ( *map ) ),
545 hermon_cmd_sense_port ( struct hermon *hermon, unsigned int port,
546 struct hermonprm_sense_port *port_type ) {
547 return hermon_cmd ( hermon,
548 HERMON_HCR_OUT_CMD ( HERMON_HCR_SENSE_PORT,
549 1, sizeof ( *port_type ) ),
550 0, NULL, port, port_type );
554 /***************************************************************************
556 * Memory translation table operations
558 ***************************************************************************
562 * Allocate MTT entries
564 * @v hermon Hermon device
565 * @v memory Memory to map into MTT
566 * @v len Length of memory to map
567 * @v mtt MTT descriptor to fill in
568 * @ret rc Return status code
570 static int hermon_alloc_mtt ( struct hermon *hermon,
571 const void *memory, size_t len,
572 struct hermon_mtt *mtt ) {
573 struct hermonprm_write_mtt write_mtt;
575 unsigned int page_offset;
576 unsigned int num_pages;
578 unsigned int mtt_base_addr;
582 /* Find available MTT entries */
583 start = virt_to_phys ( memory );
584 page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
585 start -= page_offset;
587 num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
588 mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
590 if ( mtt_offset < 0 ) {
591 DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
596 mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
597 hermon->cap.mtt_entry_size );
599 /* Fill in MTT structure */
600 mtt->mtt_offset = mtt_offset;
601 mtt->num_pages = num_pages;
602 mtt->mtt_base_addr = mtt_base_addr;
603 mtt->page_offset = page_offset;
605 /* Construct and issue WRITE_MTT commands */
606 for ( i = 0 ; i < num_pages ; i++ ) {
607 memset ( &write_mtt, 0, sizeof ( write_mtt ) );
608 MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
609 value, mtt_base_addr );
610 MLX_FILL_2 ( &write_mtt.mtt, 1,
612 ptag_l, ( start >> 3 ) );
613 if ( ( rc = hermon_cmd_write_mtt ( hermon,
614 &write_mtt ) ) != 0 ) {
615 DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
616 hermon, mtt_base_addr );
619 start += HERMON_PAGE_SIZE;
620 mtt_base_addr += hermon->cap.mtt_entry_size;
626 hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
634 * @v hermon Hermon device
635 * @v mtt MTT descriptor
637 static void hermon_free_mtt ( struct hermon *hermon,
638 struct hermon_mtt *mtt ) {
639 hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
643 /***************************************************************************
647 ***************************************************************************
651 * Issue management datagram
653 * @v ibdev Infiniband device
654 * @v mad Management datagram
655 * @ret rc Return status code
657 static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
658 struct hermon *hermon = ib_get_drvdata ( ibdev );
659 union hermonprm_mad mad_ifc;
662 linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
665 /* Copy in request packet */
666 memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
669 if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
670 &mad_ifc ) ) != 0 ) {
671 DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
672 hermon, strerror ( rc ) );
676 /* Copy out reply packet */
677 memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
679 if ( mad->hdr.status != 0 ) {
680 DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
681 hermon, ntohs ( mad->hdr.status ) );
687 /***************************************************************************
689 * Completion queue operations
691 ***************************************************************************
695 * Create completion queue
697 * @v ibdev Infiniband device
698 * @v cq Completion queue
699 * @ret rc Return status code
701 static int hermon_create_cq ( struct ib_device *ibdev,
702 struct ib_completion_queue *cq ) {
703 struct hermon *hermon = ib_get_drvdata ( ibdev );
704 struct hermon_completion_queue *hermon_cq;
705 struct hermonprm_completion_queue_context cqctx;
710 /* Find a free completion queue number */
711 cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
713 if ( cqn_offset < 0 ) {
714 DBGC ( hermon, "Hermon %p out of completion queues\n",
719 cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
721 /* Allocate control structures */
722 hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
728 /* Allocate completion queue itself */
729 hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
730 hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
731 sizeof ( hermon_cq->cqe[0] ) );
732 if ( ! hermon_cq->cqe ) {
736 memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
737 for ( i = 0 ; i < cq->num_cqes ; i++ ) {
738 MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
742 /* Allocate MTT entries */
743 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
745 &hermon_cq->mtt ) ) != 0 )
748 /* Hand queue over to hardware */
749 memset ( &cqctx, 0, sizeof ( cqctx ) );
750 MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
751 MLX_FILL_1 ( &cqctx, 2,
752 page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
753 MLX_FILL_2 ( &cqctx, 3,
754 usr_page, HERMON_UAR_NON_EQ_PAGE,
755 log_cq_size, fls ( cq->num_cqes - 1 ) );
756 MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
757 ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
758 MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
759 ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
760 if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
761 DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
762 hermon, strerror ( rc ) );
766 DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
767 hermon, cq->cqn, hermon_cq->cqe,
768 ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
769 ib_cq_set_drvdata ( cq, hermon_cq );
773 hermon_free_mtt ( hermon, &hermon_cq->mtt );
775 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
779 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
785 * Destroy completion queue
787 * @v ibdev Infiniband device
788 * @v cq Completion queue
790 static void hermon_destroy_cq ( struct ib_device *ibdev,
791 struct ib_completion_queue *cq ) {
792 struct hermon *hermon = ib_get_drvdata ( ibdev );
793 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
794 struct hermonprm_completion_queue_context cqctx;
798 /* Take ownership back from hardware */
799 if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
800 DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
801 "%s\n", hermon, cq->cqn, strerror ( rc ) );
802 /* Leak memory and return; at least we avoid corruption */
806 /* Free MTT entries */
807 hermon_free_mtt ( hermon, &hermon_cq->mtt );
810 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
813 /* Mark queue number as free */
814 cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
815 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
817 ib_cq_set_drvdata ( cq, NULL );
820 /***************************************************************************
822 * Queue pair operations
824 ***************************************************************************
828 * Assign queue pair number
830 * @v ibdev Infiniband device
832 * @ret rc Return status code
834 static int hermon_alloc_qpn ( struct ib_device *ibdev,
835 struct ib_queue_pair *qp ) {
836 struct hermon *hermon = ib_get_drvdata ( ibdev );
837 unsigned int port_offset;
840 /* Calculate queue pair number */
841 port_offset = ( ibdev->port - HERMON_PORT_BASE );
843 switch ( qp->type ) {
845 qp->qpn = ( hermon->special_qpn_base + port_offset );
848 qp->qpn = ( hermon->special_qpn_base + 2 + port_offset );
852 /* Find a free queue pair number */
853 qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
855 if ( qpn_offset < 0 ) {
856 DBGC ( hermon, "Hermon %p out of queue pairs\n",
860 qp->qpn = ( hermon->qpn_base + qpn_offset );
863 DBGC ( hermon, "Hermon %p unsupported QP type %d\n",
870 * Free queue pair number
872 * @v ibdev Infiniband device
875 static void hermon_free_qpn ( struct ib_device *ibdev,
876 struct ib_queue_pair *qp ) {
877 struct hermon *hermon = ib_get_drvdata ( ibdev );
880 qpn_offset = ( qp->qpn - hermon->qpn_base );
881 if ( qpn_offset >= 0 )
882 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
886 * Calculate transmission rate
888 * @v av Address vector
889 * @ret hermon_rate Hermon rate
891 static unsigned int hermon_rate ( struct ib_address_vector *av ) {
892 return ( ( ( av->rate >= IB_RATE_2_5 ) && ( av->rate <= IB_RATE_120 ) )
893 ? ( av->rate + 5 ) : 0 );
897 * Calculate schedule queue
899 * @v ibdev Infiniband device
901 * @ret sched_queue Schedule queue
903 static unsigned int hermon_sched_queue ( struct ib_device *ibdev,
904 struct ib_queue_pair *qp ) {
905 return ( ( ( qp->type == IB_QPT_SMI ) ?
906 HERMON_SCHED_QP0 : HERMON_SCHED_DEFAULT ) |
907 ( ( ibdev->port - 1 ) << 6 ) );
910 /** Queue pair transport service type map */
911 static uint8_t hermon_qp_st[] = {
912 [IB_QPT_SMI] = HERMON_ST_MLX,
913 [IB_QPT_GSI] = HERMON_ST_MLX,
914 [IB_QPT_UD] = HERMON_ST_UD,
915 [IB_QPT_RC] = HERMON_ST_RC,
919 * Dump queue pair context (for debugging only)
921 * @v hermon Hermon device
923 * @ret rc Return status code
925 static inline int hermon_dump_qpctx ( struct hermon *hermon,
926 struct ib_queue_pair *qp ) {
927 struct hermonprm_qp_ee_state_transitions qpctx;
930 memset ( &qpctx, 0, sizeof ( qpctx ) );
931 if ( ( rc = hermon_cmd_query_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ) {
932 DBGC ( hermon, "Hermon %p QUERY_QP failed: %s\n",
933 hermon, strerror ( rc ) );
936 DBGC ( hermon, "Hermon %p QPN %lx context:\n", hermon, qp->qpn );
937 DBGC_HDA ( hermon, 0, &qpctx.u.dwords[2],
938 ( sizeof ( qpctx ) - 8 ) );
946 * @v ibdev Infiniband device
948 * @ret rc Return status code
950 static int hermon_create_qp ( struct ib_device *ibdev,
951 struct ib_queue_pair *qp ) {
952 struct hermon *hermon = ib_get_drvdata ( ibdev );
953 struct hermon_queue_pair *hermon_qp;
954 struct hermonprm_qp_ee_state_transitions qpctx;
957 /* Calculate queue pair number */
958 if ( ( rc = hermon_alloc_qpn ( ibdev, qp ) ) != 0 )
961 /* Allocate control structures */
962 hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
968 /* Calculate doorbell address */
969 hermon_qp->send.doorbell =
970 ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
971 HERMON_DB_POST_SND_OFFSET );
973 /* Allocate work queue buffer */
974 hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
975 ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
976 hermon_qp->send.num_wqes =
977 ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
978 hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
979 sizeof ( hermon_qp->send.wqe[0] ) );
980 hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
981 sizeof ( hermon_qp->recv.wqe[0] ) );
982 hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
983 hermon_qp->recv.wqe_size );
984 hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
985 sizeof ( hermon_qp->send.wqe[0] ) );
986 if ( ! hermon_qp->wqe ) {
990 hermon_qp->send.wqe = hermon_qp->wqe;
991 memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
992 hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
993 memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
995 /* Allocate MTT entries */
996 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
998 &hermon_qp->mtt ) ) != 0 ) {
1002 /* Transition queue to INIT state */
1003 memset ( &qpctx, 0, sizeof ( qpctx ) );
1004 MLX_FILL_2 ( &qpctx, 2,
1005 qpc_eec_data.pm_state, HERMON_PM_STATE_MIGRATED,
1006 qpc_eec_data.st, hermon_qp_st[qp->type] );
1007 MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
1008 MLX_FILL_4 ( &qpctx, 4,
1009 qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
1010 qpc_eec_data.log_rq_stride,
1011 ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
1012 qpc_eec_data.log_sq_size,
1013 fls ( hermon_qp->send.num_wqes - 1 ),
1014 qpc_eec_data.log_sq_stride,
1015 ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
1016 MLX_FILL_1 ( &qpctx, 5,
1017 qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
1018 MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
1019 MLX_FILL_4 ( &qpctx, 38,
1020 qpc_eec_data.rre, 1,
1021 qpc_eec_data.rwe, 1,
1022 qpc_eec_data.rae, 1,
1023 qpc_eec_data.page_offset,
1024 ( hermon_qp->mtt.page_offset >> 6 ) );
1025 MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
1026 MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
1027 ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
1028 MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
1029 ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
1030 if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
1032 DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
1033 hermon, strerror ( rc ) );
1034 goto err_rst2init_qp;
1037 DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
1038 hermon, qp->qpn, hermon_qp->send.wqe,
1039 ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
1040 DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
1041 hermon, qp->qpn, hermon_qp->recv.wqe,
1042 ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
1043 ib_qp_set_drvdata ( qp, hermon_qp );
1046 hermon_cmd_2rst_qp ( hermon, qp->qpn );
1048 hermon_free_mtt ( hermon, &hermon_qp->mtt );
1050 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
1054 hermon_free_qpn ( ibdev, qp );
1062 * @v ibdev Infiniband device
1064 * @ret rc Return status code
1066 static int hermon_modify_qp ( struct ib_device *ibdev,
1067 struct ib_queue_pair *qp ) {
1068 struct hermon *hermon = ib_get_drvdata ( ibdev );
1069 struct hermonprm_qp_ee_state_transitions qpctx;
1072 /* Transition queue to RTR state */
1073 memset ( &qpctx, 0, sizeof ( qpctx ) );
1074 MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
1075 MLX_FILL_2 ( &qpctx, 4,
1076 qpc_eec_data.mtu, HERMON_MTU_2048,
1077 qpc_eec_data.msg_max, 31 );// 11 /* 2^11 = 2048 */ );
1078 MLX_FILL_1 ( &qpctx, 7, qpc_eec_data.remote_qpn_een, qp->av.qpn );
1079 MLX_FILL_1 ( &qpctx, 9,
1080 qpc_eec_data.primary_address_path.rlid, qp->av.lid );
1081 MLX_FILL_1 ( &qpctx, 10,
1082 qpc_eec_data.primary_address_path.max_stat_rate,
1083 hermon_rate ( &qp->av ) );
1084 memcpy ( &qpctx.u.dwords[12], &qp->av.gid, sizeof ( qp->av.gid ) );
1085 MLX_FILL_1 ( &qpctx, 16,
1086 qpc_eec_data.primary_address_path.sched_queue,
1087 hermon_sched_queue ( ibdev, qp ) );
1088 MLX_FILL_1 ( &qpctx, 39, qpc_eec_data.next_rcv_psn, qp->recv.psn );
1089 MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
1090 if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
1092 DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
1093 hermon, strerror ( rc ) );
1097 /* Transition queue to RTS state */
1098 memset ( &qpctx, 0, sizeof ( qpctx ) );
1099 MLX_FILL_1 ( &qpctx, 10,
1100 qpc_eec_data.primary_address_path.ack_timeout, 0x13 );
1101 MLX_FILL_2 ( &qpctx, 30,
1102 qpc_eec_data.retry_count, HERMON_RETRY_MAX,
1103 qpc_eec_data.rnr_retry, HERMON_RETRY_MAX );
1104 MLX_FILL_1 ( &qpctx, 32, qpc_eec_data.next_send_psn, qp->send.psn );
1105 if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
1106 DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
1107 hermon, strerror ( rc ) );
1115 * Destroy queue pair
1117 * @v ibdev Infiniband device
1120 static void hermon_destroy_qp ( struct ib_device *ibdev,
1121 struct ib_queue_pair *qp ) {
1122 struct hermon *hermon = ib_get_drvdata ( ibdev );
1123 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1126 /* Take ownership back from hardware */
1127 if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
1128 DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
1129 "%s\n", hermon, qp->qpn, strerror ( rc ) );
1130 /* Leak memory and return; at least we avoid corruption */
1134 /* Free MTT entries */
1135 hermon_free_mtt ( hermon, &hermon_qp->mtt );
1138 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
1141 /* Mark queue number as free */
1142 hermon_free_qpn ( ibdev, qp );
1144 ib_qp_set_drvdata ( qp, NULL );
1147 /***************************************************************************
1149 * Work request operations
1151 ***************************************************************************
1155 * Construct UD send work queue entry
1157 * @v ibdev Infiniband device
1159 * @v av Address vector
1160 * @v iobuf I/O buffer
1161 * @v wqe Send work queue entry
1162 * @ret opcode Control opcode
1165 hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
1166 struct ib_queue_pair *qp __unused,
1167 struct ib_address_vector *av,
1168 struct io_buffer *iobuf,
1169 union hermon_send_wqe *wqe ) {
1170 struct hermon *hermon = ib_get_drvdata ( ibdev );
1172 MLX_FILL_1 ( &wqe->ud.ctrl, 1, ds,
1173 ( ( offsetof ( typeof ( wqe->ud ), data[1] ) / 16 ) ) );
1174 MLX_FILL_1 ( &wqe->ud.ctrl, 2, c, 0x03 /* generate completion */ );
1175 MLX_FILL_2 ( &wqe->ud.ud, 0,
1176 ud_address_vector.pd, HERMON_GLOBAL_PD,
1177 ud_address_vector.port_number, ibdev->port );
1178 MLX_FILL_2 ( &wqe->ud.ud, 1,
1179 ud_address_vector.rlid, av->lid,
1180 ud_address_vector.g, av->gid_present );
1181 MLX_FILL_1 ( &wqe->ud.ud, 2,
1182 ud_address_vector.max_stat_rate, hermon_rate ( av ) );
1183 MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
1184 memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
1185 MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
1186 MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
1187 MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
1188 MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
1189 MLX_FILL_1 ( &wqe->ud.data[0], 3,
1190 local_address_l, virt_to_bus ( iobuf->data ) );
1191 return HERMON_OPCODE_SEND;
1195 * Construct MLX send work queue entry
1197 * @v ibdev Infiniband device
1199 * @v av Address vector
1200 * @v iobuf I/O buffer
1201 * @v wqe Send work queue entry
1202 * @ret opcode Control opcode
1205 hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
1206 struct ib_queue_pair *qp,
1207 struct ib_address_vector *av,
1208 struct io_buffer *iobuf,
1209 union hermon_send_wqe *wqe ) {
1210 struct hermon *hermon = ib_get_drvdata ( ibdev );
1211 struct io_buffer headers;
1213 /* Construct IB headers */
1214 iob_populate ( &headers, &wqe->mlx.headers, 0,
1215 sizeof ( wqe->mlx.headers ) );
1216 iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
1217 ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
1219 /* Fill work queue entry */
1220 MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
1221 ( ( offsetof ( typeof ( wqe->mlx ), data[2] ) / 16 ) ) );
1222 MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
1223 c, 0x03 /* generate completion */,
1224 icrc, 0 /* generate ICRC */,
1225 max_statrate, hermon_rate ( av ),
1227 v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
1228 MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
1229 MLX_FILL_1 ( &wqe->mlx.data[0], 0,
1230 byte_count, iob_len ( &headers ) );
1231 MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
1232 MLX_FILL_1 ( &wqe->mlx.data[0], 3,
1233 local_address_l, virt_to_bus ( headers.data ) );
1234 MLX_FILL_1 ( &wqe->mlx.data[1], 0,
1235 byte_count, ( iob_len ( iobuf ) + 4 /* ICRC */ ) );
1236 MLX_FILL_1 ( &wqe->mlx.data[1], 1, l_key, hermon->lkey );
1237 MLX_FILL_1 ( &wqe->mlx.data[1], 3,
1238 local_address_l, virt_to_bus ( iobuf->data ) );
1239 return HERMON_OPCODE_SEND;
1243 * Construct RC send work queue entry
1245 * @v ibdev Infiniband device
1247 * @v av Address vector
1248 * @v iobuf I/O buffer
1249 * @v wqe Send work queue entry
1250 * @ret opcode Control opcode
1253 hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
1254 struct ib_queue_pair *qp __unused,
1255 struct ib_address_vector *av __unused,
1256 struct io_buffer *iobuf,
1257 union hermon_send_wqe *wqe ) {
1258 struct hermon *hermon = ib_get_drvdata ( ibdev );
1260 MLX_FILL_1 ( &wqe->rc.ctrl, 1, ds,
1261 ( ( offsetof ( typeof ( wqe->rc ), data[1] ) / 16 ) ) );
1262 MLX_FILL_1 ( &wqe->rc.ctrl, 2, c, 0x03 /* generate completion */ );
1263 MLX_FILL_1 ( &wqe->rc.data[0], 0, byte_count, iob_len ( iobuf ) );
1264 MLX_FILL_1 ( &wqe->rc.data[0], 1, l_key, hermon->lkey );
1265 MLX_FILL_1 ( &wqe->rc.data[0], 3,
1266 local_address_l, virt_to_bus ( iobuf->data ) );
1267 return HERMON_OPCODE_SEND;
1270 /** Work queue entry constructors */
1272 ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
1273 struct ib_queue_pair *qp,
1274 struct ib_address_vector *av,
1275 struct io_buffer *iobuf,
1276 union hermon_send_wqe *wqe ) = {
1277 [IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
1278 [IB_QPT_GSI] = hermon_fill_mlx_send_wqe,
1279 [IB_QPT_UD] = hermon_fill_ud_send_wqe,
1280 [IB_QPT_RC] = hermon_fill_rc_send_wqe,
1284 * Post send work queue entry
1286 * @v ibdev Infiniband device
1288 * @v av Address vector
1289 * @v iobuf I/O buffer
1290 * @ret rc Return status code
1292 static int hermon_post_send ( struct ib_device *ibdev,
1293 struct ib_queue_pair *qp,
1294 struct ib_address_vector *av,
1295 struct io_buffer *iobuf ) {
1296 struct hermon *hermon = ib_get_drvdata ( ibdev );
1297 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1298 struct ib_work_queue *wq = &qp->send;
1299 struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
1300 union hermon_send_wqe *wqe;
1301 union hermonprm_doorbell_register db_reg;
1302 unsigned int wqe_idx_mask;
1303 unsigned int opcode;
1305 /* Allocate work queue entry */
1306 wqe_idx_mask = ( wq->num_wqes - 1 );
1307 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1308 DBGC ( hermon, "Hermon %p send queue full", hermon );
1311 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1312 wqe = &hermon_send_wq->wqe[ wq->next_idx &
1313 ( hermon_send_wq->num_wqes - 1 ) ];
1315 /* Construct work queue entry */
1316 memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
1317 ( sizeof ( *wqe ) - 4 ) );
1318 assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
1319 sizeof ( hermon_fill_send_wqe[0] ) ) );
1320 assert ( hermon_fill_send_wqe[qp->type] != NULL );
1321 opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
1323 MLX_FILL_2 ( &wqe->ctrl, 0,
1326 ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
1327 DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
1328 DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
1331 /* Ring doorbell register */
1332 MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
1333 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1334 virt_to_phys ( hermon_send_wq->doorbell ), db_reg.dword[0] );
1335 writel ( db_reg.dword[0], ( hermon_send_wq->doorbell ) );
1337 /* Update work queue's index */
1344 * Post receive work queue entry
1346 * @v ibdev Infiniband device
1348 * @v iobuf I/O buffer
1349 * @ret rc Return status code
1351 static int hermon_post_recv ( struct ib_device *ibdev,
1352 struct ib_queue_pair *qp,
1353 struct io_buffer *iobuf ) {
1354 struct hermon *hermon = ib_get_drvdata ( ibdev );
1355 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1356 struct ib_work_queue *wq = &qp->recv;
1357 struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
1358 struct hermonprm_recv_wqe *wqe;
1359 unsigned int wqe_idx_mask;
1361 /* Allocate work queue entry */
1362 wqe_idx_mask = ( wq->num_wqes - 1 );
1363 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1364 DBGC ( hermon, "Hermon %p receive queue full", hermon );
1367 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1368 wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
1370 /* Construct work queue entry */
1371 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
1372 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->lkey );
1373 MLX_FILL_1 ( &wqe->data[0], 3,
1374 local_address_l, virt_to_bus ( iobuf->data ) );
1376 /* Update work queue's index */
1379 /* Update doorbell record */
1381 MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
1382 ( wq->next_idx & 0xffff ) );
1390 * @v ibdev Infiniband device
1391 * @v cq Completion queue
1392 * @v cqe Hardware completion queue entry
1393 * @ret rc Return status code
1395 static int hermon_complete ( struct ib_device *ibdev,
1396 struct ib_completion_queue *cq,
1397 union hermonprm_completion_entry *cqe ) {
1398 struct hermon *hermon = ib_get_drvdata ( ibdev );
1399 struct ib_work_queue *wq;
1400 struct ib_queue_pair *qp;
1401 struct hermon_queue_pair *hermon_qp;
1402 struct io_buffer *iobuf;
1403 struct ib_address_vector recv_av;
1404 struct ib_global_route_header *grh;
1405 struct ib_address_vector *av;
1406 unsigned int opcode;
1409 unsigned int wqe_idx;
1413 /* Parse completion */
1414 qpn = MLX_GET ( &cqe->normal, qpn );
1415 is_send = MLX_GET ( &cqe->normal, s_r );
1416 opcode = MLX_GET ( &cqe->normal, opcode );
1417 if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
1418 /* "s" field is not valid for error opcodes */
1419 is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
1420 DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %x\n",
1421 hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
1422 MLX_GET ( &cqe->error, vendor_error_syndrome ) );
1424 /* Don't return immediately; propagate error to completer */
1427 /* Identify work queue */
1428 wq = ib_find_wq ( cq, qpn, is_send );
1430 DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
1431 hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
1435 hermon_qp = ib_qp_get_drvdata ( qp );
1437 /* Identify I/O buffer */
1438 wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
1439 ( wq->num_wqes - 1 ) );
1440 iobuf = wq->iobufs[wqe_idx];
1442 DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
1443 hermon, cq->cqn, qp->qpn, wqe_idx );
1446 wq->iobufs[wqe_idx] = NULL;
1449 /* Hand off to completion handler */
1450 ib_complete_send ( ibdev, qp, iobuf, rc );
1452 /* Set received length */
1453 len = MLX_GET ( &cqe->normal, byte_cnt );
1454 assert ( len <= iob_tailroom ( iobuf ) );
1455 iob_put ( iobuf, len );
1456 switch ( qp->type ) {
1460 assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
1462 iob_pull ( iobuf, sizeof ( *grh ) );
1463 /* Construct address vector */
1465 memset ( av, 0, sizeof ( *av ) );
1466 av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
1467 av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
1468 av->sl = MLX_GET ( &cqe->normal, sl );
1469 av->gid_present = MLX_GET ( &cqe->normal, g );
1470 memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
1479 /* Hand off to completion handler */
1480 ib_complete_recv ( ibdev, qp, av, iobuf, rc );
1487 * Poll completion queue
1489 * @v ibdev Infiniband device
1490 * @v cq Completion queue
1492 static void hermon_poll_cq ( struct ib_device *ibdev,
1493 struct ib_completion_queue *cq ) {
1494 struct hermon *hermon = ib_get_drvdata ( ibdev );
1495 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
1496 union hermonprm_completion_entry *cqe;
1497 unsigned int cqe_idx_mask;
1501 /* Look for completion entry */
1502 cqe_idx_mask = ( cq->num_cqes - 1 );
1503 cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
1504 if ( MLX_GET ( &cqe->normal, owner ) ^
1505 ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
1506 /* Entry still owned by hardware; end of poll */
1509 DBGCP ( hermon, "Hermon %p completion:\n", hermon );
1510 DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
1512 /* Handle completion */
1513 if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
1514 DBGC ( hermon, "Hermon %p failed to complete: %s\n",
1515 hermon, strerror ( rc ) );
1516 DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
1519 /* Update completion queue's index */
1522 /* Update doorbell record */
1523 MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
1524 ( cq->next_idx & 0x00ffffffUL ) );
1528 /***************************************************************************
1532 ***************************************************************************
1536 * Create event queue
1538 * @v hermon Hermon device
1539 * @ret rc Return status code
1541 static int hermon_create_eq ( struct hermon *hermon ) {
1542 struct hermon_event_queue *hermon_eq = &hermon->eq;
1543 struct hermonprm_eqc eqctx;
1544 struct hermonprm_event_mask mask;
1548 /* Select event queue number */
1549 hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
1550 if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
1551 hermon_eq->eqn = hermon->cap.reserved_eqs;
1553 /* Calculate doorbell address */
1554 hermon_eq->doorbell =
1555 ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
1557 /* Allocate event queue itself */
1558 hermon_eq->eqe_size =
1559 ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
1560 hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
1561 sizeof ( hermon_eq->eqe[0] ) );
1562 if ( ! hermon_eq->eqe ) {
1566 memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
1567 for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
1568 MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
1572 /* Allocate MTT entries */
1573 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
1574 hermon_eq->eqe_size,
1575 &hermon_eq->mtt ) ) != 0 )
1578 /* Hand queue over to hardware */
1579 memset ( &eqctx, 0, sizeof ( eqctx ) );
1580 MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
1581 MLX_FILL_1 ( &eqctx, 2,
1582 page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
1583 MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
1584 MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
1585 ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
1586 if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
1588 DBGC ( hermon, "Hermon %p SW2HW_EQ failed: %s\n",
1589 hermon, strerror ( rc ) );
1593 /* Map events to this event queue */
1594 memset ( &mask, 0, sizeof ( mask ) );
1595 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1596 if ( ( rc = hermon_cmd_map_eq ( hermon,
1597 ( HERMON_MAP_EQ | hermon_eq->eqn ),
1599 DBGC ( hermon, "Hermon %p MAP_EQ failed: %s\n",
1600 hermon, strerror ( rc ) );
1604 DBGC ( hermon, "Hermon %p EQN %#lx ring at [%p,%p])\n",
1605 hermon, hermon_eq->eqn, hermon_eq->eqe,
1606 ( ( ( void * ) hermon_eq->eqe ) + hermon_eq->eqe_size ) );
1610 hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
1612 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1614 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1616 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1621 * Destroy event queue
1623 * @v hermon Hermon device
1625 static void hermon_destroy_eq ( struct hermon *hermon ) {
1626 struct hermon_event_queue *hermon_eq = &hermon->eq;
1627 struct hermonprm_eqc eqctx;
1628 struct hermonprm_event_mask mask;
1631 /* Unmap events from event queue */
1632 memset ( &mask, 0, sizeof ( mask ) );
1633 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1634 if ( ( rc = hermon_cmd_map_eq ( hermon,
1635 ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
1637 DBGC ( hermon, "Hermon %p FATAL MAP_EQ failed to unmap: %s\n",
1638 hermon, strerror ( rc ) );
1639 /* Continue; HCA may die but system should survive */
1642 /* Take ownership back from hardware */
1643 if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
1645 DBGC ( hermon, "Hermon %p FATAL HW2SW_EQ failed: %s\n",
1646 hermon, strerror ( rc ) );
1647 /* Leak memory and return; at least we avoid corruption */
1651 /* Free MTT entries */
1652 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1655 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1656 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1660 * Handle port state event
1662 * @v hermon Hermon device
1663 * @v eqe Port state change event queue entry
1665 static void hermon_event_port_state_change ( struct hermon *hermon,
1666 union hermonprm_event_entry *eqe){
1670 /* Get port and link status */
1671 port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
1672 link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
1673 DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
1674 ( link_up ? "up" : "down" ) );
1677 if ( port >= hermon->cap.num_ports ) {
1678 DBGC ( hermon, "Hermon %p port %d does not exist!\n",
1679 hermon, ( port + 1 ) );
1683 /* Update MAD parameters */
1684 ib_smc_update ( hermon->ibdev[port], hermon_mad );
1686 /* Notify Infiniband core of link state change */
1687 ib_link_state_changed ( hermon->ibdev[port] );
1693 * @v ibdev Infiniband device
1695 static void hermon_poll_eq ( struct ib_device *ibdev ) {
1696 struct hermon *hermon = ib_get_drvdata ( ibdev );
1697 struct hermon_event_queue *hermon_eq = &hermon->eq;
1698 union hermonprm_event_entry *eqe;
1699 union hermonprm_doorbell_register db_reg;
1700 unsigned int eqe_idx_mask;
1701 unsigned int event_type;
1704 /* Look for event entry */
1705 eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
1706 eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
1707 if ( MLX_GET ( &eqe->generic, owner ) ^
1708 ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
1709 /* Entry still owned by hardware; end of poll */
1712 DBGCP ( hermon, "Hermon %p event:\n", hermon );
1713 DBGCP_HD ( hermon, eqe, sizeof ( *eqe ) );
1716 event_type = MLX_GET ( &eqe->generic, event_type );
1717 switch ( event_type ) {
1718 case HERMON_EV_PORT_STATE_CHANGE:
1719 hermon_event_port_state_change ( hermon, eqe );
1722 DBGC ( hermon, "Hermon %p unrecognised event type "
1723 "%#x:\n", hermon, event_type );
1724 DBGC_HD ( hermon, eqe, sizeof ( *eqe ) );
1728 /* Update event queue's index */
1729 hermon_eq->next_idx++;
1732 MLX_FILL_1 ( &db_reg.event, 0,
1733 ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
1734 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1735 virt_to_phys ( hermon_eq->doorbell ),
1737 writel ( db_reg.dword[0], hermon_eq->doorbell );
1741 /***************************************************************************
1743 * Infiniband link-layer operations
1745 ***************************************************************************
1751 * @v ibdev Infiniband device
1752 * @ret port_type Port type, or negative error
1754 static int hermon_sense_port_type ( struct ib_device *ibdev ) {
1755 struct hermon *hermon = ib_get_drvdata ( ibdev );
1756 struct hermonprm_sense_port sense_port;
1760 /* If DPDP is not supported, always assume Infiniband */
1761 if ( ! hermon->cap.dpdp )
1762 return HERMON_PORT_TYPE_IB;
1764 /* Sense the port type */
1765 if ( ( rc = hermon_cmd_sense_port ( hermon, ibdev->port,
1766 &sense_port ) ) != 0 ) {
1767 DBGC ( hermon, "Hermon %p port %d sense failed: %s\n",
1768 hermon, ibdev->port, strerror ( rc ) );
1771 port_type = MLX_GET ( &sense_port, port_type );
1773 DBGC ( hermon, "Hermon %p port %d type %d\n",
1774 hermon, ibdev->port, port_type );
1779 * Initialise Infiniband link
1781 * @v ibdev Infiniband device
1782 * @ret rc Return status code
1784 static int hermon_open ( struct ib_device *ibdev ) {
1785 struct hermon *hermon = ib_get_drvdata ( ibdev );
1786 struct hermonprm_init_port init_port;
1790 /* Check we are connected to an Infiniband network */
1791 if ( ( rc = port_type = hermon_sense_port_type ( ibdev ) ) < 0 )
1793 if ( port_type != HERMON_PORT_TYPE_IB ) {
1794 DBGC ( hermon, "Hermon %p port %d not connected to an "
1795 "Infiniband network", hermon, ibdev->port );
1800 memset ( &init_port, 0, sizeof ( init_port ) );
1801 MLX_FILL_2 ( &init_port, 0,
1804 MLX_FILL_2 ( &init_port, 1,
1805 mtu, HERMON_MTU_2048,
1807 MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
1808 if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
1809 &init_port ) ) != 0 ) {
1810 DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
1811 hermon, strerror ( rc ) );
1815 /* Update MAD parameters */
1816 ib_smc_update ( ibdev, hermon_mad );
1822 * Close Infiniband link
1824 * @v ibdev Infiniband device
1826 static void hermon_close ( struct ib_device *ibdev ) {
1827 struct hermon *hermon = ib_get_drvdata ( ibdev );
1830 if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
1831 DBGC ( hermon, "Hermon %p could not close port: %s\n",
1832 hermon, strerror ( rc ) );
1833 /* Nothing we can do about this */
1838 * Inform embedded subnet management agent of a received MAD
1840 * @v ibdev Infiniband device
1842 * @ret rc Return status code
1844 static int hermon_inform_sma ( struct ib_device *ibdev,
1845 union ib_mad *mad ) {
1848 /* Send the MAD to the embedded SMA */
1849 if ( ( rc = hermon_mad ( ibdev, mad ) ) != 0 )
1852 /* Update parameters held in software */
1853 ib_smc_update ( ibdev, hermon_mad );
1858 /***************************************************************************
1860 * Multicast group operations
1862 ***************************************************************************
1866 * Attach to multicast group
1868 * @v ibdev Infiniband device
1870 * @v gid Multicast GID
1871 * @ret rc Return status code
1873 static int hermon_mcast_attach ( struct ib_device *ibdev,
1874 struct ib_queue_pair *qp,
1875 struct ib_gid *gid ) {
1876 struct hermon *hermon = ib_get_drvdata ( ibdev );
1877 struct hermonprm_mgm_hash hash;
1878 struct hermonprm_mcg_entry mcg;
1882 /* Generate hash table index */
1883 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1884 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1885 hermon, strerror ( rc ) );
1888 index = MLX_GET ( &hash, hash );
1890 /* Check for existing hash table entry */
1891 if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
1892 DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
1893 hermon, index, strerror ( rc ) );
1896 if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
1897 /* FIXME: this implementation allows only a single QP
1898 * per multicast group, and doesn't handle hash
1899 * collisions. Sufficient for IPoIB but may need to
1900 * be extended in future.
1902 DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
1907 /* Update hash table entry */
1908 MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
1909 MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
1910 memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
1911 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1912 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1913 hermon, index, strerror ( rc ) );
1921 * Detach from multicast group
1923 * @v ibdev Infiniband device
1925 * @v gid Multicast GID
1927 static void hermon_mcast_detach ( struct ib_device *ibdev,
1928 struct ib_queue_pair *qp __unused,
1929 struct ib_gid *gid ) {
1930 struct hermon *hermon = ib_get_drvdata ( ibdev );
1931 struct hermonprm_mgm_hash hash;
1932 struct hermonprm_mcg_entry mcg;
1936 /* Generate hash table index */
1937 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1938 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1939 hermon, strerror ( rc ) );
1942 index = MLX_GET ( &hash, hash );
1944 /* Clear hash table entry */
1945 memset ( &mcg, 0, sizeof ( mcg ) );
1946 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1947 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1948 hermon, index, strerror ( rc ) );
1953 /** Hermon Infiniband operations */
1954 static struct ib_device_operations hermon_ib_operations = {
1955 .create_cq = hermon_create_cq,
1956 .destroy_cq = hermon_destroy_cq,
1957 .create_qp = hermon_create_qp,
1958 .modify_qp = hermon_modify_qp,
1959 .destroy_qp = hermon_destroy_qp,
1960 .post_send = hermon_post_send,
1961 .post_recv = hermon_post_recv,
1962 .poll_cq = hermon_poll_cq,
1963 .poll_eq = hermon_poll_eq,
1964 .open = hermon_open,
1965 .close = hermon_close,
1966 .mcast_attach = hermon_mcast_attach,
1967 .mcast_detach = hermon_mcast_detach,
1968 .set_port_info = hermon_inform_sma,
1969 .set_pkey_table = hermon_inform_sma,
1972 /***************************************************************************
1976 ***************************************************************************
1980 * Map virtual to physical address for firmware usage
1982 * @v hermon Hermon device
1983 * @v map Mapping function
1984 * @v va Virtual address
1985 * @v pa Physical address
1986 * @v len Length of region
1987 * @ret rc Return status code
1989 static int hermon_map_vpm ( struct hermon *hermon,
1990 int ( *map ) ( struct hermon *hermon,
1991 const struct hermonprm_virtual_physical_mapping* ),
1992 uint64_t va, physaddr_t pa, size_t len ) {
1993 struct hermonprm_virtual_physical_mapping mapping;
1996 assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1997 assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1998 assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
2000 /* These mappings tend to generate huge volumes of
2001 * uninteresting debug data, which basically makes it
2002 * impossible to use debugging otherwise.
2004 DBG_DISABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
2007 memset ( &mapping, 0, sizeof ( mapping ) );
2008 MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
2009 MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
2010 MLX_FILL_2 ( &mapping, 3,
2012 pa_l, ( pa >> 12 ) );
2013 if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
2014 DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
2015 DBGC ( hermon, "Hermon %p could not map %llx => %lx: "
2016 "%s\n", hermon, va, pa, strerror ( rc ) );
2019 pa += HERMON_PAGE_SIZE;
2020 va += HERMON_PAGE_SIZE;
2021 len -= HERMON_PAGE_SIZE;
2024 DBG_ENABLE ( DBGLVL_LOG | DBGLVL_EXTRA );
2029 * Start firmware running
2031 * @v hermon Hermon device
2032 * @ret rc Return status code
2034 static int hermon_start_firmware ( struct hermon *hermon ) {
2035 struct hermonprm_query_fw fw;
2036 unsigned int fw_pages;
2041 /* Get firmware parameters */
2042 if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
2043 DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
2044 hermon, strerror ( rc ) );
2047 DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
2048 MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
2049 MLX_GET ( &fw, fw_rev_subminor ) );
2050 fw_pages = MLX_GET ( &fw, fw_pages );
2051 DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
2052 hermon, fw_pages, ( fw_pages * ( HERMON_PAGE_SIZE / 1024 ) ) );
2054 /* Allocate firmware pages and map firmware area */
2055 fw_size = ( fw_pages * HERMON_PAGE_SIZE );
2056 hermon->firmware_area = umalloc ( fw_size );
2057 if ( ! hermon->firmware_area ) {
2061 fw_base = user_to_phys ( hermon->firmware_area, 0 );
2062 DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
2063 hermon, fw_base, ( fw_base + fw_size ) );
2064 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
2065 0, fw_base, fw_size ) ) != 0 ) {
2066 DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
2067 hermon, strerror ( rc ) );
2071 /* Start firmware */
2072 if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
2073 DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
2074 hermon, strerror ( rc ) );
2078 DBGC ( hermon, "Hermon %p firmware started\n", hermon );
2083 hermon_cmd_unmap_fa ( hermon );
2084 ufree ( hermon->firmware_area );
2085 hermon->firmware_area = UNULL;
2092 * Stop firmware running
2094 * @v hermon Hermon device
2096 static void hermon_stop_firmware ( struct hermon *hermon ) {
2099 if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
2100 DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
2101 hermon, strerror ( rc ) );
2102 /* Leak memory and return; at least we avoid corruption */
2105 ufree ( hermon->firmware_area );
2106 hermon->firmware_area = UNULL;
2109 /***************************************************************************
2111 * Infinihost Context Memory management
2113 ***************************************************************************
2119 * @v hermon Hermon device
2120 * @ret rc Return status code
2122 static int hermon_get_cap ( struct hermon *hermon ) {
2123 struct hermonprm_query_dev_cap dev_cap;
2126 if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
2127 DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
2128 hermon, strerror ( rc ) );
2132 hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
2133 hermon->cap.reserved_qps =
2134 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
2135 hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
2136 hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
2137 hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
2138 hermon->cap.reserved_srqs =
2139 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
2140 hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
2141 hermon->cap.reserved_cqs =
2142 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
2143 hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
2144 hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
2145 hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
2146 hermon->cap.reserved_mtts =
2147 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
2148 hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
2149 hermon->cap.reserved_mrws =
2150 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
2151 hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
2152 hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
2153 hermon->cap.num_ports = MLX_GET ( &dev_cap, num_ports );
2154 hermon->cap.dpdp = MLX_GET ( &dev_cap, dpdp );
2157 if ( hermon->cap.num_ports > HERMON_MAX_PORTS ) {
2158 DBGC ( hermon, "Hermon %p has %d ports (only %d supported)\n",
2159 hermon, hermon->cap.num_ports, HERMON_MAX_PORTS );
2160 hermon->cap.num_ports = HERMON_MAX_PORTS;
2169 * @v log_num_entries Log2 of the number of entries
2170 * @v entry_size Entry size
2171 * @ret usage Usage size in ICM
2173 static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
2176 usage = ( ( 1 << log_num_entries ) * entry_size );
2177 usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
2178 ~( HERMON_PAGE_SIZE - 1 ) );
2185 * @v hermon Hermon device
2186 * @v init_hca INIT_HCA structure to fill in
2187 * @ret rc Return status code
2189 static int hermon_alloc_icm ( struct hermon *hermon,
2190 struct hermonprm_init_hca *init_hca ) {
2191 struct hermonprm_scalar_parameter icm_size;
2192 struct hermonprm_scalar_parameter icm_aux_size;
2193 uint64_t icm_offset = 0;
2194 unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
2195 unsigned int log_num_mtts, log_num_mpts;
2196 size_t cmpt_max_len;
2197 size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
2198 size_t icm_len, icm_aux_len;
2199 physaddr_t icm_phys;
2204 * Start by carving up the ICM virtual address space
2208 /* Calculate number of each object type within ICM */
2209 log_num_qps = fls ( hermon->cap.reserved_qps +
2210 HERMON_RSVD_SPECIAL_QPS + HERMON_MAX_QPS - 1 );
2211 log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
2212 log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
2213 log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
2214 log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
2216 /* ICM starts with the cMPT tables, which are sparse */
2217 cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
2218 ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
2219 qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
2220 hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
2221 hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
2222 icm_offset += cmpt_max_len;
2223 srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
2224 hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
2225 hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
2226 icm_offset += cmpt_max_len;
2227 cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
2228 hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
2229 hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
2230 icm_offset += cmpt_max_len;
2231 eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
2232 hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
2233 hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
2234 icm_offset += cmpt_max_len;
2236 hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
2238 /* Queue pair contexts */
2239 MLX_FILL_1 ( init_hca, 12,
2240 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
2241 ( icm_offset >> 32 ) );
2242 MLX_FILL_2 ( init_hca, 13,
2243 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
2244 ( icm_offset >> 5 ),
2245 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
2247 DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
2248 icm_offset += icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
2250 /* Extended alternate path contexts */
2251 MLX_FILL_1 ( init_hca, 24,
2252 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
2253 ( icm_offset >> 32 ) );
2254 MLX_FILL_1 ( init_hca, 25,
2255 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
2257 DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
2258 icm_offset += icm_usage ( log_num_qps,
2259 hermon->cap.altc_entry_size );
2261 /* Extended auxiliary contexts */
2262 MLX_FILL_1 ( init_hca, 28,
2263 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
2264 ( icm_offset >> 32 ) );
2265 MLX_FILL_1 ( init_hca, 29,
2266 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
2268 DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
2269 icm_offset += icm_usage ( log_num_qps,
2270 hermon->cap.auxc_entry_size );
2272 /* Shared receive queue contexts */
2273 MLX_FILL_1 ( init_hca, 18,
2274 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
2275 ( icm_offset >> 32 ) );
2276 MLX_FILL_2 ( init_hca, 19,
2277 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
2278 ( icm_offset >> 5 ),
2279 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
2281 DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
2282 icm_offset += icm_usage ( log_num_srqs,
2283 hermon->cap.srqc_entry_size );
2285 /* Completion queue contexts */
2286 MLX_FILL_1 ( init_hca, 20,
2287 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
2288 ( icm_offset >> 32 ) );
2289 MLX_FILL_2 ( init_hca, 21,
2290 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
2291 ( icm_offset >> 5 ),
2292 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
2294 DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
2295 icm_offset += icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
2297 /* Event queue contexts */
2298 MLX_FILL_1 ( init_hca, 32,
2299 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
2300 ( icm_offset >> 32 ) );
2301 MLX_FILL_2 ( init_hca, 33,
2302 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
2303 ( icm_offset >> 5 ),
2304 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
2306 DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
2307 icm_offset += icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
2309 /* Memory translation table */
2310 MLX_FILL_1 ( init_hca, 64,
2311 tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
2312 MLX_FILL_1 ( init_hca, 65,
2313 tpt_parameters.mtt_base_addr_l, icm_offset );
2314 DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
2315 icm_offset += icm_usage ( log_num_mtts,
2316 hermon->cap.mtt_entry_size );
2318 /* Memory protection table */
2319 log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
2320 MLX_FILL_1 ( init_hca, 60,
2321 tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
2322 MLX_FILL_1 ( init_hca, 61,
2323 tpt_parameters.dmpt_base_adr_l, icm_offset );
2324 MLX_FILL_1 ( init_hca, 62,
2325 tpt_parameters.log_dmpt_sz, log_num_mpts );
2326 DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
2327 icm_offset += icm_usage ( log_num_mpts,
2328 hermon->cap.dmpt_entry_size );
2330 /* Multicast table */
2331 MLX_FILL_1 ( init_hca, 48,
2332 multicast_parameters.mc_base_addr_h,
2333 ( icm_offset >> 32 ) );
2334 MLX_FILL_1 ( init_hca, 49,
2335 multicast_parameters.mc_base_addr_l, icm_offset );
2336 MLX_FILL_1 ( init_hca, 52,
2337 multicast_parameters.log_mc_table_entry_sz,
2338 fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
2339 MLX_FILL_1 ( init_hca, 53,
2340 multicast_parameters.log_mc_table_hash_sz, 3 );
2341 MLX_FILL_1 ( init_hca, 54,
2342 multicast_parameters.log_mc_table_sz, 3 );
2343 DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
2344 icm_offset += ( ( 8 * sizeof ( struct hermonprm_mcg_entry ) +
2345 HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
2347 hermon->icm_map[HERMON_ICM_OTHER].len =
2348 ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
2351 * Allocate and map physical memory for (portions of) ICM
2354 * ICM AUX area (aligned to its own size)
2359 /* Calculate physical memory required for ICM */
2361 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2362 icm_len += hermon->icm_map[i].len;
2365 /* Get ICM auxiliary area size */
2366 memset ( &icm_size, 0, sizeof ( icm_size ) );
2367 MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
2368 MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
2369 if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
2370 &icm_aux_size ) ) != 0 ) {
2371 DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
2372 hermon, strerror ( rc ) );
2373 goto err_set_icm_size;
2375 icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
2377 /* Allocate ICM data and auxiliary area */
2378 DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
2379 hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
2380 hermon->icm = umalloc ( icm_aux_len + icm_len );
2381 if ( ! hermon->icm ) {
2385 icm_phys = user_to_phys ( hermon->icm, 0 );
2387 /* Map ICM auxiliary area */
2388 DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
2390 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
2391 0, icm_phys, icm_aux_len ) ) != 0 ) {
2392 DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
2393 hermon, strerror ( rc ) );
2394 goto err_map_icm_aux;
2396 icm_phys += icm_aux_len;
2399 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2400 DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
2401 hermon, hermon->icm_map[i].offset,
2402 hermon->icm_map[i].len, icm_phys );
2403 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
2404 hermon->icm_map[i].offset,
2406 hermon->icm_map[i].len ) ) != 0 ){
2407 DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
2408 hermon, strerror ( rc ) );
2411 icm_phys += hermon->icm_map[i].len;
2417 assert ( i == 0 ); /* We don't handle partial failure at present */
2419 hermon_cmd_unmap_icm_aux ( hermon );
2420 ufree ( hermon->icm );
2421 hermon->icm = UNULL;
2430 * @v hermon Hermon device
2432 static void hermon_free_icm ( struct hermon *hermon ) {
2433 struct hermonprm_scalar_parameter unmap_icm;
2436 for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
2437 memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
2438 MLX_FILL_1 ( &unmap_icm, 0, value_hi,
2439 ( hermon->icm_map[i].offset >> 32 ) );
2440 MLX_FILL_1 ( &unmap_icm, 1, value,
2441 hermon->icm_map[i].offset );
2442 hermon_cmd_unmap_icm ( hermon,
2443 ( 1 << fls ( ( hermon->icm_map[i].len /
2444 HERMON_PAGE_SIZE ) - 1)),
2447 hermon_cmd_unmap_icm_aux ( hermon );
2448 ufree ( hermon->icm );
2449 hermon->icm = UNULL;
2452 /***************************************************************************
2456 ***************************************************************************
2460 * Set up memory protection table
2462 * @v hermon Hermon device
2463 * @ret rc Return status code
2465 static int hermon_setup_mpt ( struct hermon *hermon ) {
2466 struct hermonprm_mpt mpt;
2471 key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
2472 hermon->lkey = ( ( key << 8 ) | ( key >> 24 ) );
2474 /* Initialise memory protection table */
2475 memset ( &mpt, 0, sizeof ( mpt ) );
2476 MLX_FILL_7 ( &mpt, 0,
2484 MLX_FILL_1 ( &mpt, 2, mem_key, key );
2485 MLX_FILL_1 ( &mpt, 3,
2486 pd, HERMON_GLOBAL_PD );
2487 MLX_FILL_1 ( &mpt, 10, len64, 1 );
2488 if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
2489 hermon->cap.reserved_mrws,
2491 DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
2492 hermon, strerror ( rc ) );
2500 * Configure special queue pairs
2502 * @v hermon Hermon device
2503 * @ret rc Return status code
2505 static int hermon_configure_special_qps ( struct hermon *hermon ) {
2508 /* Special QP block must be aligned on its own size */
2509 hermon->special_qpn_base = ( ( HERMON_QPN_BASE +
2510 hermon->cap.reserved_qps +
2511 HERMON_NUM_SPECIAL_QPS - 1 )
2512 & ~( HERMON_NUM_SPECIAL_QPS - 1 ) );
2513 hermon->qpn_base = ( hermon->special_qpn_base +
2514 HERMON_NUM_SPECIAL_QPS );
2515 DBGC ( hermon, "Hermon %p special QPs at [%lx,%lx]\n", hermon,
2516 hermon->special_qpn_base, ( hermon->qpn_base - 1 ) );
2518 /* Issue command to configure special QPs */
2519 if ( ( rc = hermon_cmd_conf_special_qp ( hermon, 0x00,
2520 hermon->special_qpn_base ) ) != 0 ) {
2521 DBGC ( hermon, "Hermon %p could not configure special QPs: "
2522 "%s\n", hermon, strerror ( rc ) );
2534 * @ret rc Return status code
2536 static int hermon_probe ( struct pci_device *pci,
2537 const struct pci_device_id *id __unused ) {
2538 struct hermon *hermon;
2539 struct ib_device *ibdev;
2540 struct hermonprm_init_hca init_hca;
2544 /* Allocate Hermon device */
2545 hermon = zalloc ( sizeof ( *hermon ) );
2548 goto err_alloc_hermon;
2550 pci_set_drvdata ( pci, hermon );
2552 /* Fix up PCI device */
2553 adjust_pci_device ( pci );
2556 hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
2557 HERMON_PCI_CONFIG_BAR_SIZE );
2558 hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
2559 HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
2561 /* Allocate space for mailboxes */
2562 hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
2563 HERMON_MBOX_ALIGN );
2564 if ( ! hermon->mailbox_in ) {
2566 goto err_mailbox_in;
2568 hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
2569 HERMON_MBOX_ALIGN );
2570 if ( ! hermon->mailbox_out ) {
2572 goto err_mailbox_out;
2575 /* Start firmware */
2576 if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
2577 goto err_start_firmware;
2579 /* Get device limits */
2580 if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
2583 /* Allocate Infiniband devices */
2584 for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
2585 ibdev = alloc_ibdev ( 0 );
2588 goto err_alloc_ibdev;
2590 hermon->ibdev[i] = ibdev;
2591 ibdev->op = &hermon_ib_operations;
2592 ibdev->dev = &pci->dev;
2593 ibdev->port = ( HERMON_PORT_BASE + i );
2594 ib_set_drvdata ( ibdev, hermon );
2598 memset ( &init_hca, 0, sizeof ( init_hca ) );
2599 if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
2602 /* Initialise HCA */
2603 MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
2604 MLX_FILL_1 ( &init_hca, 5, udp, 1 );
2605 MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
2606 if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
2607 DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
2608 hermon, strerror ( rc ) );
2612 /* Set up memory protection */
2613 if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
2615 for ( i = 0 ; i < hermon->cap.num_ports ; i++ )
2616 hermon->ibdev[i]->rdma_key = hermon->lkey;
2618 /* Set up event queue */
2619 if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
2622 /* Configure special QPs */
2623 if ( ( rc = hermon_configure_special_qps ( hermon ) ) != 0 )
2624 goto err_conf_special_qps;
2626 /* Update IPoIB MAC address */
2627 for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
2628 ib_smc_update ( hermon->ibdev[i], hermon_mad );
2631 /* Register Infiniband devices */
2632 for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
2633 if ( ( rc = register_ibdev ( hermon->ibdev[i] ) ) != 0 ) {
2634 DBGC ( hermon, "Hermon %p could not register IB "
2635 "device: %s\n", hermon, strerror ( rc ) );
2636 goto err_register_ibdev;
2642 i = hermon->cap.num_ports;
2644 for ( i-- ; ( signed int ) i >= 0 ; i-- )
2645 unregister_ibdev ( hermon->ibdev[i] );
2646 err_conf_special_qps:
2647 hermon_destroy_eq ( hermon );
2650 hermon_cmd_close_hca ( hermon );
2652 hermon_free_icm ( hermon );
2654 i = hermon->cap.num_ports;
2656 for ( i-- ; ( signed int ) i >= 0 ; i-- )
2657 ibdev_put ( hermon->ibdev[i] );
2659 hermon_stop_firmware ( hermon );
2661 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2663 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2675 static void hermon_remove ( struct pci_device *pci ) {
2676 struct hermon *hermon = pci_get_drvdata ( pci );
2679 for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
2680 unregister_ibdev ( hermon->ibdev[i] );
2681 hermon_destroy_eq ( hermon );
2682 hermon_cmd_close_hca ( hermon );
2683 hermon_free_icm ( hermon );
2684 hermon_stop_firmware ( hermon );
2685 hermon_stop_firmware ( hermon );
2686 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2687 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2688 for ( i = ( hermon->cap.num_ports - 1 ) ; i >= 0 ; i-- )
2689 ibdev_put ( hermon->ibdev[i] );
2693 static struct pci_device_id hermon_nics[] = {
2694 PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
2695 PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
2696 PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
2697 PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
2700 struct pci_driver hermon_driver __pci_driver = {
2702 .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
2703 .probe = hermon_probe,
2704 .remove = hermon_remove,