[drivers rtl8180] Provide retry information with TX completion
[people/oremanj/gpxe.git] / src / drivers / net / rtl818x / rtl8180.c
1
2 /*
3  * Linux device driver for RTL8180 / RTL8185
4  *
5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7  *
8  * Modified for gPXE, June 2009, by Joshua Oreman <oremanj@rwcr.net>
9  *
10  * Based on the r8180 driver, which is:
11  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
12  *
13  * Thanks to Realtek for their support!
14  *
15  * This program is free software; you can redistribute it and/or modify
16  * it under the terms of the GNU General Public License version 2 as
17  * published by the Free Software Foundation.
18  */
19
20 FILE_LICENCE(GPL2_ONLY);
21
22 #include <stdint.h>
23 #include <errno.h>
24 #include <stdio.h>
25 #include <unistd.h>
26 #include <byteswap.h>
27 #include <gpxe/iobuf.h>
28 #include <gpxe/malloc.h>
29 #include <gpxe/pci.h>
30 #include <gpxe/net80211.h>
31 #include <gpxe/netdevice.h>
32 #include <gpxe/threewire.h>
33
34 #include "rtl8180.h"
35
36 /* rtl818x_rates[hw rate number] = rate in 100kbps units */
37 static const u16 rtl818x_rates[] = {
38         10, 20, 55, 110, /* 802.11b */
39         60, 90, 120, 180, 240, 360, 480, 540, /* 802.11g */
40 };
41 #define RTL818X_NR_B_RATES  4
42 #define RTL818X_NR_RATES    12
43
44 /* used by RF drivers */
45 void rtl8180_write_phy(struct net80211_device *dev, u8 addr, u32 data)
46 {
47         struct rtl8180_priv *priv = dev->priv;
48         int i = 10;
49         u32 buf;
50
51         buf = (data << 8) | addr;
52
53         rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf | 0x80);
54         while (i--) {
55                 rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf);
56                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
57                         return;
58         }
59 }
60
61 static void rtl8180_handle_rx(struct net80211_device *dev)
62 {
63         struct rtl8180_priv *priv = dev->priv;
64         unsigned int count = RTL8180_RX_RING_SIZE;
65
66         while (count--) {
67                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
68                 struct io_buffer *iob = priv->rx_buf[priv->rx_idx];
69                 u32 flags = le32_to_cpu(entry->flags);
70
71                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
72                         return;
73
74                 if (flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
75                              RTL818X_RX_DESC_FLAG_FOF |
76                              RTL818X_RX_DESC_FLAG_RX_ERR)) {
77                         /* This is crappy hardware. The Linux driver
78                            doesn't even log these. */
79                         goto done;
80                 } else if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) {
81                         /* This is actually a corrupt packet. */
82                         DBG2("rtl8180 RX:%d CRC fail: flags %08x\n",
83                              priv->rx_idx, flags);                      
84                         net80211_rx_err(dev, NULL, EIO);
85                 } else {
86                         u32 flags2 = le32_to_cpu(entry->flags2);
87                         struct io_buffer *new_iob = alloc_iob(MAX_RX_SIZE);
88                         if (!new_iob) {
89                                 net80211_rx_err(dev, NULL, ENOMEM);
90                                 goto done;
91                         }
92
93                         DBGP("rtl8180 RX:%d success: flags %08x %08x\n",
94                              priv->rx_idx, flags, flags2);
95
96                         iob_put(iob, flags & 0xFFF);
97
98                         net80211_rx(dev, iob, (flags2 >> 8) & 0x7f);
99
100                         iob = new_iob;
101                         priv->rx_buf[priv->rx_idx] = iob;
102                 }
103
104         done:
105                 entry->rx_buf = cpu_to_le32(virt_to_bus(iob->data));
106                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN | MAX_RX_SIZE);
107
108                 if (priv->rx_idx == RTL8180_RX_RING_SIZE - 1)
109                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
110
111                 priv->rx_idx = (priv->rx_idx + 1) % RTL8180_RX_RING_SIZE;
112         }
113 }
114
115 static void rtl8180_handle_tx(struct net80211_device *dev)
116 {
117         struct rtl8180_priv *priv = dev->priv;
118         unsigned int count = RTL8180_TX_RING_SIZE;
119         
120         while (count--) {
121                 struct rtl8180_tx_desc *entry = &priv->tx_ring[priv->tx_cons];
122                 struct io_buffer *iob = priv->tx_buf[priv->tx_cons];
123                 u32 flags = le32_to_cpu(entry->flags);
124                 int rc;
125
126                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
127                         return;
128
129                 rc = 0;
130                 if (!(flags & RTL818X_TX_DESC_FLAG_TX_OK)) {
131                         /* our packet was not ACKed properly */
132                         rc = EIO;
133                 }
134
135                 net80211_tx_complete(dev, iob, flags & 0xFF, rc);
136
137                 priv->tx_buf[priv->tx_cons] = NULL;
138                 priv->tx_cons = (priv->tx_cons + 1) % RTL8180_TX_RING_SIZE;
139         }
140 }
141
142 static void rtl8180_poll(struct net80211_device *dev)
143 {
144         struct rtl8180_priv *priv = dev->priv;
145         u16 reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
146
147         if (reg == 0xFFFF)
148                 return;
149
150         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
151
152         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
153                 rtl8180_handle_tx(dev);
154
155         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
156                 rtl8180_handle_rx(dev);
157 }
158
159 #define DIV_ROUND_UP(n,d) (((n)+(d)-1)/(d))
160
161 static int rtl8180_tx(struct net80211_device *dev, struct io_buffer *iob)
162 {
163         struct rtl8180_priv *priv = dev->priv;
164         struct rtl8180_tx_desc *entry;
165         u32 tx_flags;
166         u16 plcp_len = 0;
167         int len = iob_len(iob);
168         
169         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
170                 RTL818X_TX_DESC_FLAG_LS | (priv->hw_rate << 24) | len;
171
172         if (priv->r8185) {
173                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
174                             RTL818X_TX_DESC_FLAG_NO_ENC;
175         } else {
176                 unsigned int remainder;
177
178                 plcp_len = DIV_ROUND_UP(16 * (len + 4),
179                                         (dev->rates[dev->rate] * 2) / 10);
180                 remainder = (16 * (len + 4)) %
181                             ((dev->rates[dev->rate] * 2) / 10);
182
183                 if (remainder > 0 && remainder <= 6)
184                         plcp_len |= 1 << 15;
185         }
186
187         if (dev->phy_flags & NET80211_PHY_USE_PROTECTION) {
188                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
189                 tx_flags |= priv->hw_rtscts_rate << 19;
190         }
191
192         entry = &priv->tx_ring[priv->tx_prod];
193
194         if (entry->flags & RTL818X_TX_DESC_FLAG_OWN) {
195                 /* card hasn't processed the old packet yet! */
196                 return -EBUSY;
197         }
198
199         priv->tx_buf[priv->tx_prod] = iob;
200         priv->tx_prod = (priv->tx_prod + 1) % RTL8180_TX_RING_SIZE;
201
202         entry->rts_duration = 0;
203         entry->plcp_len = cpu_to_le16(plcp_len);
204         entry->tx_buf = cpu_to_le32(virt_to_bus(iob->data));
205         entry->frame_len = cpu_to_le32(len);
206         entry->flags2 = /* alternate retry rate in 100kbps << 4 */ 0;
207         entry->retry_limit = RTL8180_MAX_RETRIES;
208         entry->flags = cpu_to_le32(tx_flags);
209
210         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << 5));
211
212         return 0;
213 }
214
215 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
216 {
217         u8 reg;
218
219         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
220         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
221         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
222                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
223         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
224         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
225                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
226         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
227 }
228
229 static int rtl8180_init_hw(struct net80211_device *dev)
230 {
231         struct rtl8180_priv *priv = dev->priv;
232         u16 reg;
233
234         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
235         rtl818x_ioread8(priv, &priv->map->CMD);
236         mdelay(10);
237
238         /* reset */
239         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
240         rtl818x_ioread8(priv, &priv->map->CMD);
241
242         reg = rtl818x_ioread8(priv, &priv->map->CMD);
243         reg &= (1 << 1);
244         reg |= RTL818X_CMD_RESET;
245         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
246         rtl818x_ioread8(priv, &priv->map->CMD);
247         mdelay(200);
248
249         /* check success of reset */
250         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
251                 DBG("rtl8180 %s: reset timeout!\n", dev->netdev->name);
252                 return -ETIMEDOUT;
253         }
254
255         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
256         rtl818x_ioread8(priv, &priv->map->CMD);
257         mdelay(200);
258
259         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
260                 /* For cardbus */
261                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
262                 reg |= 1 << 1;
263                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
264                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
265                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
266                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
267         }
268
269         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
270
271         if (!priv->r8185)
272                 rtl8180_set_anaparam(priv, priv->anaparam);
273
274         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
275         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring_dma);
276
277         /* TODO: necessary? specs indicate not */
278         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
279         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
280         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
281         if (priv->r8185) {
282                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
283                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
284         }
285         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
286
287         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
288
289         /* TODO: turn off hw wep on rtl8180 */
290
291         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
292
293         if (priv->r8185) {
294                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
295                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
296                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
297
298                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
299
300                 /* TODO: set ClkRun enable? necessary? */
301                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
302                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
303                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
304                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
305                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
306                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
307         } else {
308                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
309                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
310
311                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
312                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
313         }
314
315         priv->rf->init(dev);
316         if (priv->r8185)
317                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
318         return 0;
319 }
320
321 static int rtl8180_init_rx_ring(struct net80211_device *dev)
322 {
323         struct rtl8180_priv *priv = dev->priv;
324         struct rtl8180_rx_desc *entry;
325         int i;
326
327         priv->rx_ring = malloc_dma(sizeof(*priv->rx_ring) * RTL8180_RX_RING_SIZE,
328                                    RTL8180_RING_ALIGN);
329         priv->rx_ring_dma = virt_to_bus(priv->rx_ring);
330         if (!priv->rx_ring) {
331                 DBG("rtl8180 %s: cannot allocate RX ring\n", dev->netdev->name);
332                 return -ENOMEM;
333         }
334
335         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * RTL8180_RX_RING_SIZE);
336         priv->rx_idx = 0;
337
338         for (i = 0; i < RTL8180_RX_RING_SIZE; i++) {
339                 struct io_buffer *iob = alloc_iob(MAX_RX_SIZE);
340                 entry = &priv->rx_ring[i];
341                 if (!iob)
342                         return -ENOMEM;
343
344                 priv->rx_buf[i] = iob;
345                 entry->rx_buf = cpu_to_le32(virt_to_bus(iob->data));
346                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
347                                            MAX_RX_SIZE);
348         }
349         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
350         return 0;
351 }
352
353 static void rtl8180_free_rx_ring(struct net80211_device *dev)
354 {
355         struct rtl8180_priv *priv = dev->priv;
356         int i;
357
358         for (i = 0; i < RTL8180_RX_RING_SIZE; i++) {
359                 free_iob(priv->rx_buf[i]);
360                 priv->rx_buf[i] = NULL;
361         }
362
363         free_dma(priv->rx_ring, sizeof(*priv->rx_ring) * RTL8180_RX_RING_SIZE);
364         priv->rx_ring = NULL;
365 }
366
367 static int rtl8180_init_tx_ring(struct net80211_device *dev)
368 {
369         struct rtl8180_priv *priv = dev->priv;
370         int i;
371
372         priv->tx_ring = malloc_dma(sizeof(*priv->tx_ring) * RTL8180_TX_RING_SIZE,
373                                    RTL8180_RING_ALIGN);
374         priv->tx_ring_dma = virt_to_bus(priv->tx_ring);
375         if (!priv->tx_ring) {
376                 DBG("rtl8180 %s: cannot allocate TX ring\n", dev->netdev->name);
377                 return -ENOMEM;
378         }
379
380         memset(priv->tx_ring, 0, sizeof(*priv->tx_ring) * RTL8180_TX_RING_SIZE);
381         priv->tx_prod = priv->tx_cons = 0;
382
383         for (i = 0; i < RTL8180_TX_RING_SIZE; i++)
384                 priv->tx_ring[i].next_tx_desc = cpu_to_le32(priv->tx_ring_dma +
385                                 ((i + 1) % RTL8180_TX_RING_SIZE) * sizeof(*priv->tx_ring));
386
387         return 0;
388 }
389
390 static void rtl8180_free_tx_ring(struct net80211_device *dev)
391 {
392         struct rtl8180_priv *priv = dev->priv;
393         int i;
394
395         for (i = 0; i < RTL8180_TX_RING_SIZE; i++) {
396                 if (priv->tx_buf[i])
397                         net80211_tx_complete(dev, priv->tx_buf[i], 0, ECANCELED);
398                 priv->tx_buf[i] = NULL;
399         }
400
401         free_dma(priv->tx_ring, sizeof(*priv->tx_ring) * RTL8180_TX_RING_SIZE);
402         priv->tx_ring = NULL;
403 }
404
405 static void rtl8180_irq(struct net80211_device *dev, int enable) 
406 {
407         struct rtl8180_priv *priv = dev->priv;
408         rtl818x_iowrite16(priv, &priv->map->INT_MASK, enable? 0xFFFF : 0);
409 }
410
411 /* Sets the MAC address of the card. */
412 static void rtl8180_set_hwaddr(struct net80211_device *dev, u8 *hwaddr)
413 {
414         struct rtl8180_priv *priv = dev->priv;
415         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
416         rtl818x_iowrite32(priv, (u32 *)&priv->map->MAC[0],
417                           le32_to_cpu(*(u32 *)hwaddr));
418         rtl818x_iowrite16(priv, (u16 *)&priv->map->MAC[4],
419                           le16_to_cpu(*(u16 *)(hwaddr + 4)));
420         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
421 }
422
423 static int rtl8180_start(struct net80211_device *dev)
424 {
425         struct rtl8180_priv *priv = dev->priv;
426         int ret;
427         u32 reg;
428
429         ret = rtl8180_init_rx_ring(dev);
430         if (ret)
431                 return ret;
432
433         ret = rtl8180_init_tx_ring(dev);
434         if (ret)
435                 goto err_free_rings;
436
437         ret = rtl8180_init_hw(dev);
438         if (ret)
439                 goto err_free_rings;
440
441         rtl8180_set_hwaddr(dev, dev->netdev->ll_addr);
442
443         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
444         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring_dma);
445
446         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
447
448         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
449         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
450
451         reg = RTL818X_RX_CONF_ONLYERLPKT |
452               RTL818X_RX_CONF_RX_AUTORESETPHY |
453               RTL818X_RX_CONF_MGMT |
454               RTL818X_RX_CONF_DATA |
455               (7 << 8 /* MAX RX DMA */) |
456               RTL818X_RX_CONF_BROADCAST |
457               RTL818X_RX_CONF_NICMAC;
458
459         if (priv->r8185)
460                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
461         else {
462                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
463                         ? RTL818X_RX_CONF_CSDM1 : 0;
464                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
465                         ? RTL818X_RX_CONF_CSDM2 : 0;
466         }
467
468         priv->rx_conf = reg;
469         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
470
471         if (priv->r8185) {
472                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
473                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
474                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
475                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
476
477                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
478                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
479                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
480                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
481                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
482
483                 /* disable early TX */
484                 rtl818x_iowrite8(priv, (u8 *)priv->map + 0xec, 0x3f);
485         }
486
487         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
488         reg |= (6 << 21 /* MAX TX DMA */) |
489                RTL818X_TX_CONF_NO_ICV;
490
491         if (priv->r8185)
492                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
493         else
494                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
495
496         /* different meaning, same value on both rtl8185 and rtl8180 */
497         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
498
499         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
500
501         reg = rtl818x_ioread8(priv, &priv->map->CMD);
502         reg |= RTL818X_CMD_RX_ENABLE;
503         reg |= RTL818X_CMD_TX_ENABLE;
504         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
505
506         DBG("%s rtl8180: started\n", dev->netdev->name);
507
508         return 0;
509
510  err_free_rings:
511         rtl8180_free_rx_ring(dev);
512         if (priv->tx_ring)
513                 rtl8180_free_tx_ring(dev);
514
515         DBG("%s rtl8180: failed to start\n", dev->netdev->name);
516
517         return ret;
518 }
519
520 static void rtl8180_stop(struct net80211_device *dev)
521 {
522         struct rtl8180_priv *priv = dev->priv;
523         u8 reg;
524
525         rtl8180_irq(dev, 0);
526
527         reg = rtl818x_ioread8(priv, &priv->map->CMD);
528         reg &= ~RTL818X_CMD_TX_ENABLE;
529         reg &= ~RTL818X_CMD_RX_ENABLE;
530         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
531
532         priv->rf->stop(dev);
533
534         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
535         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
536         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
537         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
538
539         rtl8180_free_rx_ring(dev);
540         rtl8180_free_tx_ring(dev);
541 }
542
543 static int rtl8180_config(struct net80211_device *dev, int changed)
544 {
545         struct rtl8180_priv *priv = dev->priv;
546         int i;
547
548         if (changed & NET80211_CFG_CHANNEL)
549                 priv->rf->set_chan(dev, &dev->channels[dev->channel]);
550
551         if (changed & NET80211_CFG_ASSOC) {
552                 for (i = 0; i < ETH_ALEN; i++)
553                         rtl818x_iowrite8(priv, &priv->map->BSSID[i], dev->bssid[i]);
554                 rtl818x_iowrite8(priv, &priv->map->MSR,
555                                  dev->state & NET80211_ASSOCIATED?
556                                         RTL818X_MSR_INFRA : RTL818X_MSR_NO_LINK);
557         }
558
559         if (changed & NET80211_CFG_PHY_PARAMS)
560                 priv->rf->conf_erp(dev);
561
562         if (changed & NET80211_CFG_RATE) {
563                 /* figure out the hardware rate number for the new
564                    logical rate */
565                 int hw_rate;
566                 for (hw_rate = 0; hw_rate < RTL818X_NR_RATES &&
567                              rtl818x_rates[hw_rate] !=
568                              NET80211_RATE_VALUE ( dev->rates[dev->rate] );
569                      hw_rate++)
570                         ;
571                 if (hw_rate >= RTL818X_NR_RATES)
572                         return -EINVAL;
573
574                 priv->hw_rate = hw_rate;
575
576                 /* and the RTS/CTS rate */
577                 for (hw_rate = 0; hw_rate < RTL818X_NR_RATES &&
578                              rtl818x_rates[hw_rate] !=
579                            NET80211_RATE_VALUE ( dev->rates[dev->rtscts_rate] );
580                      hw_rate++)
581                         ;
582                 if (hw_rate >= RTL818X_NR_RATES)
583                         hw_rate = priv->hw_rate;
584
585                 priv->hw_rtscts_rate = hw_rate;
586         }
587
588         return 0;
589 }
590
591 static const u8 rtl8180_eeprom_bits[] = {
592         [SPI_BIT_SCLK] = RTL818X_EEPROM_CMD_CK,
593         [SPI_BIT_MISO] = RTL818X_EEPROM_CMD_READ,
594         [SPI_BIT_MOSI] = RTL818X_EEPROM_CMD_WRITE,
595         [SPI_BIT_SS(0)] = RTL818X_EEPROM_CMD_CS,
596 };
597
598 static int rtl8180_spi_read_bit(struct bit_basher *basher, unsigned int bit_id)
599 {
600         struct rtl8180_priv *priv = container_of(basher, struct rtl8180_priv,
601                                                  spibit.basher);
602         
603         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
604         return reg & rtl8180_eeprom_bits[bit_id];
605 }
606
607 static void rtl8180_spi_write_bit(struct bit_basher *basher,
608                                   unsigned int bit_id, unsigned long data) 
609 {
610         struct rtl8180_priv *priv = container_of(basher, struct rtl8180_priv,
611                                                  spibit.basher);
612
613         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
614         u8 mask = rtl8180_eeprom_bits[bit_id];
615         reg = (reg & ~mask) | (data & mask);
616
617         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
618
619         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
620         udelay(10);
621 }
622
623 static struct bit_basher_operations rtl8180_basher_ops = {
624         .read = rtl8180_spi_read_bit,
625         .write = rtl8180_spi_write_bit,
626 };
627
628 /* The net80211 code makes a copy of this, so we're OK modifying the
629    static version as we initialize the card, as long as we don't
630    depend on possibly-modified values in case there are multiple cards. */
631 static struct net80211_hw_info rtl8180_hwinfo = {
632         /* MAC address filled in at runtime */
633         /* modes filled in at runtime */
634         .bands = NET80211_BAND_2GHZ,
635         .flags = NET80211_HW_RX_HAS_FCS,
636         .signal_type = NET80211_SIGNAL_ARBITRARY,
637         /* supported rates filled in at runtime */
638         .signal_max = 65,
639         .channel_change_time = 1000, /* no idea what the actual value is */
640 };
641
642 static const char *rtl8180_rf_names[] = {
643         NULL,                   /* no 0 */
644         "Intersil", "RFMD",     /* unsupported 1-2 */
645         "SA2400", "max2820", "GRF5101", /* supported 3-5 */
646         NULL, NULL, NULL,       /* no 6-8 */
647         "RTL8225",              /* supported 9 */
648         "RTL8255",              /* unsupported 10 */
649 };
650 #define RTL8180_NR_RF_NAMES 11
651
652 struct net80211_device_operations rtl8180_operations = {
653         .open = rtl8180_start,
654         .close = rtl8180_stop,
655         .transmit = rtl8180_tx,
656         .poll = rtl8180_poll,
657         .irq = rtl8180_irq,
658         .config = rtl8180_config,
659 };
660
661 static int rtl8180_probe(struct pci_device *pdev,
662                          const struct pci_device_id *id __unused)
663 {
664         struct net80211_device *dev;
665         struct rtl8180_priv *priv;
666         struct rtl818x_rf_ops *rf;
667         int err, i;
668         const char *chip_name;
669         u32 reg;
670         u16 eeprom_val;
671
672         adjust_pci_device(pdev);
673
674         dev = net80211_alloc(sizeof(*priv));
675         if (!dev) {
676                 DBG("rtl8180: net80211 alloc failed\n");
677                 return -ENOMEM;
678         }
679
680         priv = dev->priv;
681         priv->pdev = pdev;
682         dev->netdev->dev = &pdev->dev;
683
684         priv->map = (struct rtl818x_csr *)pdev->ioaddr;
685         if (!priv->map)
686                 priv->map = (struct rtl818x_csr *)pdev->membase;
687
688         if (!priv->map) {
689                 DBG("rtl8180: cannot find device memory\n");
690                 err = -ENXIO;
691                 goto err_free_dev;
692         }
693
694         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
695         reg &= RTL818X_TX_CONF_HWVER_MASK;
696         switch (reg) {
697         case RTL818X_TX_CONF_R8180_ABCD:
698                 chip_name = "0";
699                 break;
700         case RTL818X_TX_CONF_R8180_F:
701                 chip_name = "0vF";
702                 break;
703         case RTL818X_TX_CONF_R8185_ABC:
704                 chip_name = "5";
705                 break;
706         case RTL818X_TX_CONF_R8185_D:
707                 chip_name = "5vD";
708                 break;
709         default:
710                 DBG("rtl8180: Unknown chip! (0x%x)\n", reg >> 25);
711                 err = -ENOSYS;
712                 goto err_free_dev;
713         }
714
715         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
716
717         memcpy(rtl8180_hwinfo.supported_rates, rtl818x_rates,
718                sizeof(*rtl818x_rates) * RTL818X_NR_RATES);
719
720         if (priv->r8185) {
721                 rtl8180_hwinfo.modes = NET80211_MODE_B | NET80211_MODE_G;
722                 rtl8180_hwinfo.nr_supported_rates = RTL818X_NR_RATES;
723         } else {
724                 rtl8180_hwinfo.modes = NET80211_MODE_B;
725                 rtl8180_hwinfo.nr_supported_rates = RTL818X_NR_B_RATES;
726         }
727
728         priv->spibit.basher.op = &rtl8180_basher_ops;
729         priv->spibit.bus.mode = SPI_MODE_THREEWIRE;
730         init_spi_bit_basher(&priv->spibit);
731
732         DBG2("rtl8180 RX_CONF: %08x\n", rtl818x_ioread32(priv, &priv->map->RX_CONF));
733
734         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
735                 init_at93c66(&priv->eeprom, 16);
736         else
737                 init_at93c46(&priv->eeprom, 16);
738         priv->eeprom.bus = &priv->spibit.bus;
739
740         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
741         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
742         udelay(10);
743
744         nvs_read(&priv->eeprom.nvs, 0x06, &eeprom_val, 2);
745         DBG2("rtl8180 eeprom val = %04x\n", eeprom_val);
746         eeprom_val &= 0xFF;
747
748         priv->rf = NULL;
749         for_each_table_entry(rf, RTL818X_RF_DRIVERS) {
750                 if (rf->id == eeprom_val) {
751                         priv->rf = rf;
752                         break;
753                 }
754         }
755
756         if (!priv->rf) {
757                 if (eeprom_val < RTL8180_NR_RF_NAMES &&
758                     rtl8180_rf_names[eeprom_val] != NULL)
759                         DBG("rtl8180: %s RF frontend not supported!\n",
760                             rtl8180_rf_names[eeprom_val]);
761                 else
762                         DBG("rtl8180: RF frontend #%d not recognized!\n",
763                             eeprom_val);
764
765                 err = -ENOSYS;
766                 goto err_free_dev;
767         }
768
769         nvs_read(&priv->eeprom.nvs, 0x17, &eeprom_val, 2);
770         priv->csthreshold = eeprom_val >> 8;
771         if (!priv->r8185) {
772                 nvs_read(&priv->eeprom.nvs, 0xD, &priv->anaparam, 4);
773                 nvs_read(&priv->eeprom.nvs, 0x19, &priv->rfparam, 2);
774                 priv->anaparam = le32_to_cpu(priv->anaparam);
775                 priv->rfparam = le16_to_cpu(priv->rfparam);
776         }
777
778         /* read the MAC address */
779         nvs_read(&priv->eeprom.nvs, 0x7, rtl8180_hwinfo.hwaddr, 6);
780
781         /* CCK TX power */
782         for (i = 0; i < 14; i += 2) {
783                 u16 txpwr;
784                 nvs_read(&priv->eeprom.nvs, 0x10 + (i >> 1), &txpwr, 2);
785                 priv->txpower[i] = txpwr & 0xFF;
786                 priv->txpower[i + 1] = txpwr >> 8;
787         }
788
789         /* OFDM TX power */
790         if (priv->r8185) {
791                 for (i = 0; i < 14; i += 2) {
792                         u16 txpwr;
793                         nvs_read(&priv->eeprom.nvs, 0x20 + (i >> 1), &txpwr, 2);
794                         priv->txpower[i] |= (txpwr & 0xFF) << 8;
795                         priv->txpower[i + 1] |= txpwr & 0xFF00;
796                 }
797         }
798
799         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
800
801         err = net80211_register(dev, &rtl8180_operations, &rtl8180_hwinfo);
802         if (err) {
803                 DBG("rtl8180: cannot register device\n");
804                 goto err_free_dev;
805         }
806
807         DBG("rtl8180: Realtek RTL818%s (RF chip %s) with address %s\n",
808             chip_name, priv->rf->name, netdev_hwaddr(dev->netdev));
809
810         return 0;
811
812  err_free_dev:
813         pci_set_drvdata(pdev, NULL);
814         net80211_free(dev);
815         return err;
816 }
817
818 static void rtl8180_remove(struct pci_device *pdev)
819 {
820         struct net80211_device *dev = pci_get_drvdata(pdev);
821
822         if (!dev)
823                 return;
824
825         net80211_unregister(dev);
826         net80211_free(dev);
827 }
828
829 static struct pci_device_id rtl8180_nics[] = {
830         PCI_ROM(0x10ec, 0x8185, "rtl8185", "Realtek 8185", 0),
831         PCI_ROM(0x1799, 0x700f, "f5d7000", "Belkin F5D7000", 0),
832         PCI_ROM(0x1799, 0x701f, "f5d7010", "Belkin F5D7010", 0),
833         
834         PCI_ROM(0x10ec, 0x8180, "rtl8180", "Realtek 8180", 0),
835         PCI_ROM(0x1799, 0x6001, "f5d6001", "Belkin F5D6001", 0),
836         PCI_ROM(0x1799, 0x6020, "f5d6020", "Belkin F5D6020", 0),
837         PCI_ROM(0x1186, 0x3300, "dwl510",  "D-Link DWL-510", 0),
838 };
839
840 struct pci_driver rtl8180_driver __pci_driver = {
841         .ids            = rtl8180_nics,
842         .id_count       = sizeof(rtl8180_nics) / sizeof(rtl8180_nics[0]),
843         .probe          = rtl8180_probe,
844         .remove         = rtl8180_remove,
845 };