Add Cpu.S for X64 GCC tool-chain.
authorqwang12 <qwang12@de2fecce-e211-0410-80a6-f3fac2684e05>
Wed, 27 Aug 2008 13:49:54 +0000 (13:49 +0000)
committerqwang12 <qwang12@de2fecce-e211-0410-80a6-f3fac2684e05>
Wed, 27 Aug 2008 13:49:54 +0000 (13:49 +0000)
git-svn-id: https://edk2.tianocore.org/svn/edk2/trunk@5739 de2fecce-e211-0410-80a6-f3fac2684e05

edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/CpuIA32Lib_Edk2.inf
edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.S [new file with mode: 0644]

index 3f40822..fd95fa7 100644 (file)
@@ -34,6 +34,7 @@ COMPONENT_TYPE  = LIBRARY
 [sources.x64]\r
   x64/Cpu.asm       | MSFT\r
   x64/Cpu.asm       | INTEL\r
+  x64/Cpu.S         | GCC\r
 \r
 [includes.common]\r
   $(EDK_SOURCE)/Foundation/Efi\r
diff --git a/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.S b/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.S
new file mode 100644 (file)
index 0000000..3920804
--- /dev/null
@@ -0,0 +1,208 @@
+#------------------------------------------------------------------------------
+#*
+#*   Copyright (c) 2008, Intel Corporation                                                         
+#*   All rights reserved. This program and the accompanying materials                          
+#*   are licensed and made available under the terms and conditions of the BSD License         
+#*   which accompanies this distribution.  The full text of the license may be found at        
+#*   http://opensource.org/licenses/bsd-license.php                                            
+#*                                                                                             
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#*   
+#*   Module Name:
+#*
+#*    Cpu.asm
+#*  
+#*   Abstract:
+#*  
+#------------------------------------------------------------------------------
+#include <EfiBind.h>
+
+.globl ASM_PFX(EfiHalt)
+.globl ASM_PFX(EfiWbinvd)
+.globl ASM_PFX(EfiInvd)
+.globl ASM_PFX(EfiCpuid)
+.globl ASM_PFX(EfiReadTsc)
+.globl ASM_PFX(EfiDisableCache)
+.globl ASM_PFX(EfiEnableCache)
+.globl ASM_PFX(EfiReadMsr)
+.globl ASM_PFX(EfiGetEflags)
+.globl ASM_PFX(EfiDisableInterrupts)
+.globl ASM_PFX(EfiEnableInterrupts)
+.globl ASM_PFX(EfiCpuidExt)
+
+.text
+
+
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiHalt (
+#    VOID
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiHalt):
+    hlt
+    retq
+
+
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiWbinvd (
+#    VOID
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiWbinvd):
+    wbinvd
+    retq
+
+
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiInvd (
+#    VOID
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiInvd):
+    invd
+    retq
+
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiCpuid (
+#    IN   UINT32              RegisterInEax,          // rcx   
+#    OUT  EFI_CPUID_REGISTER  *Reg           OPTIONAL // rdx  
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiCpuid):
+      push   %rbx\r
+      mov    %rdx,%r8\r
+      mov    %rcx,%rax\r
+      cpuid  \r
+      cmp    $0x0,%r8\r
+      je     _Exit\r
+      mov    %eax,(%r8)\r
+      mov    %ebx,0x4(%r8)\r
+      mov    %ecx,0x8(%r8)\r
+      mov    %edx,0xc(%r8)
+_Exit:      
+      pop    %rbx
+      retq
+
+#------------------------------------------------------------------------------
+#  UINT64
+#  EfiReadMsr (
+#    IN   UINT32  Index,  // rcx
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiReadMsr):
+      rdmsr  \r
+      shl    $0x20,%rdx\r
+      or     %rdx,%rax\r
+      retq   \r
+      
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiWriteMsr (
+#    IN   UINT32  Index,  // rcx
+#    IN   UINT64  Value   // rdx
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiWriteMsr):
+      mov    %rdx,%rax\r
+      sar    $0x20,%rdx\r
+      wrmsr  \r
+      retq 
+
+#------------------------------------------------------------------------------
+# UINT64
+# EfiReadTsc (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiReadTsc):
+      rdtsc  \r
+      shl    $0x20,%rax\r
+      shrd   $0x20,%rdx,%rax\r
+      retq   \r
+
+#------------------------------------------------------------------------------
+# VOID
+# EfiDisableCache (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiDisableCache):
+# added a check to see if cache is already disabled. If it is, then skip.
+      mov    %cr0,%rax\r
+      and    $0x60000000,%rax\r
+      cmp    $0x0,%rax\r
+      jne    1f\r
+      mov    %cr0,%rax\r
+      or     $0x60000000,%rax\r
+      mov    %rax,%cr0\r
+      wbinvd \r
+1:
+      retq   \r
+
+#------------------------------------------------------------------------------
+# VOID
+# EfiEnableCache (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiEnableCache):
+      invd   \r
+      mov    %cr0,%rax\r
+      and    $0xffffffff9fffffff,%rax\r
+      mov    %rax,%cr0\r
+      retq   \r
+
+#------------------------------------------------------------------------------
+# UINTN
+# EfiGetEflags (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiGetEflags):
+      pushfq \r
+      pop    %rax\r
+      retq   \r
+
+#------------------------------------------------------------------------------
+# VOID
+# EfiDisableInterrupts (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiDisableInterrupts):
+    cli
+    ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EfiEnableInterrupts (
+#   VOID
+#   );
+#------------------------------------------------------------------------------
+ASM_PFX(EfiEnableInterrupts):
+    sti
+    ret
+#------------------------------------------------------------------------------
+#  VOID
+#  EfiCpuidExt (
+#    IN   UINT32              RegisterInEax,
+#    IN   UINT32              CacheLevel,
+#    OUT  EFI_CPUID_REGISTER  *Regs              
+#    )
+#------------------------------------------------------------------------------
+ASM_PFX(EfiCpuidExt):
+      push   %rbx\r
+      mov    %rcx,%rax\r
+      mov    %rdx,%rcx\r
+      cpuid  \r
+      mov    %eax,(%r8)\r
+      mov    %ebx,0x4(%r8)\r
+      mov    %ecx,0x8(%r8)\r
+      mov    %edx,0xc(%r8)\r
+      pop    %rbx\r
+      retq   \r