Add checking code for GenAcpiTable tools.
[people/mcb30/edk2.git] / edk2 / Tools / CCode / Source / Include / IndustryStandard / Acpi2_0.h
1 /*++\r
2 \r
3 Copyright (c) 2006, Intel Corporation. All rights reserved. \r
4 This software and associated documentation (if any) is furnished\r
5 under a license and may only be used or copied in accordance\r
6 with the terms of the license. Except as permitted by such\r
7 license, no part of this software or documentation may be\r
8 reproduced, stored in a retrieval system, or transmitted in any\r
9 form or by any means without the express written consent of\r
10 Intel Corporation.\r
11 \r
12 \r
13 Module Name:\r
14 \r
15   Acpi2_0.h\r
16 \r
17 Abstract:\r
18 \r
19   ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
20 \r
21 --*/\r
22 \r
23 #ifndef _ACPI_2_0_H_\r
24 #define _ACPI_2_0_H_\r
25 \r
26 #include <IndustryStandard\Acpi.h>\r
27 \r
28 //\r
29 // Ensure proper structure formats\r
30 //\r
31 #pragma pack(1)\r
32 //\r
33 // ACPI Specification Revision\r
34 //\r
35 #define EFI_ACPI_2_0_REVISION 0x02\r
36 \r
37 //\r
38 // BUGBUG: OEM values need to be moved somewhere else, probably read from data hub\r
39 // and produced by a platform specific driver.\r
40 //\r
41 //\r
42 // ACPI OEM ID\r
43 //\r
44 #define EFI_ACPI_2_0_OEM_ID       "INTEL "\r
45 #define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245  // "E2T8704P"\r
46 //\r
47 // ACPI OEM Revision\r
48 //\r
49 #define EFI_ACPI_2_0_OEM_REVISION 0x00000002\r
50 \r
51 //\r
52 // ACPI table creator ID\r
53 //\r
54 #define EFI_ACPI_2_0_CREATOR_ID 0x5446534D  // TBD "MSFT"\r
55 //\r
56 // ACPI table creator revision\r
57 //\r
58 #define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013  // TBD\r
59 //\r
60 // ACPI 2.0 Generic Address Space definition\r
61 //\r
62 typedef struct {\r
63   UINT8   AddressSpaceId;\r
64   UINT8   RegisterBitWidth;\r
65   UINT8   RegisterBitOffset;\r
66   UINT8   Reserved;\r
67   UINT64  Address;\r
68 } EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
69 \r
70 //\r
71 // Generic Address Space Address IDs\r
72 //\r
73 #define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
74 #define EFI_ACPI_2_0_SYSTEM_IO                  1\r
75 #define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
76 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
77 #define EFI_ACPI_2_0_SMBUS                      4\r
78 #define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
79 \r
80 //\r
81 // ACPI 2.0 table structures\r
82 //\r
83 //\r
84 // Root System Description Pointer Structure\r
85 //\r
86 typedef struct {\r
87   UINT64  Signature;\r
88   UINT8   Checksum;\r
89   UINT8   OemId[6];\r
90   UINT8   Revision;\r
91   UINT32  RsdtAddress;\r
92   UINT32  Length;\r
93   UINT64  XsdtAddress;\r
94   UINT8   ExtendedChecksum;\r
95   UINT8   Reserved[3];\r
96 } EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
97 \r
98 //\r
99 // RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
100 //\r
101 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
102 \r
103 //\r
104 // Common table header, this prefaces all ACPI tables, including FACS, but\r
105 // excluding the RSD PTR structure\r
106 //\r
107 typedef struct {\r
108   UINT32  Signature;\r
109   UINT32  Length;\r
110 } EFI_ACPI_2_0_COMMON_HEADER;\r
111 \r
112 //\r
113 // Root System Description Table\r
114 // No definition needed as it is a common description table header followed by a\r
115 // variable number of UINT32 table pointers.\r
116 //\r
117 //\r
118 // RSDT Revision (as defined in ACPI 2.0 spec.)\r
119 //\r
120 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
121 \r
122 //\r
123 // Extended System Description Table\r
124 // No definition needed as it is a common description table header followed by a\r
125 // variable number of UINT64 table pointers.\r
126 //\r
127 //\r
128 // XSDT Revision (as defined in ACPI 2.0 spec.)\r
129 //\r
130 #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
131 \r
132 //\r
133 // Fixed ACPI Description Table Structure (FADT)\r
134 //\r
135 typedef struct {\r
136   EFI_ACPI_DESCRIPTION_HEADER             Header;\r
137   UINT32                                  FirmwareCtrl;\r
138   UINT32                                  Dsdt;\r
139   UINT8                                   Reserved0;\r
140   UINT8                                   PreferredPmProfile;\r
141   UINT16                                  SciInt;\r
142   UINT32                                  SmiCmd;\r
143   UINT8                                   AcpiEnable;\r
144   UINT8                                   AcpiDisable;\r
145   UINT8                                   S4BiosReq;\r
146   UINT8                                   PstateCnt;\r
147   UINT32                                  Pm1aEvtBlk;\r
148   UINT32                                  Pm1bEvtBlk;\r
149   UINT32                                  Pm1aCntBlk;\r
150   UINT32                                  Pm1bCntBlk;\r
151   UINT32                                  Pm2CntBlk;\r
152   UINT32                                  PmTmrBlk;\r
153   UINT32                                  Gpe0Blk;\r
154   UINT32                                  Gpe1Blk;\r
155   UINT8                                   Pm1EvtLen;\r
156   UINT8                                   Pm1CntLen;\r
157   UINT8                                   Pm2CntLen;\r
158   UINT8                                   PmTmrLen;\r
159   UINT8                                   Gpe0BlkLen;\r
160   UINT8                                   Gpe1BlkLen;\r
161   UINT8                                   Gpe1Base;\r
162   UINT8                                   CstCnt;\r
163   UINT16                                  PLvl2Lat;\r
164   UINT16                                  PLvl3Lat;\r
165   UINT16                                  FlushSize;\r
166   UINT16                                  FlushStride;\r
167   UINT8                                   DutyOffset;\r
168   UINT8                                   DutyWidth;\r
169   UINT8                                   DayAlrm;\r
170   UINT8                                   MonAlrm;\r
171   UINT8                                   Century;\r
172   UINT16                                  IaPcBootArch;\r
173   UINT8                                   Reserved1;\r
174   UINT32                                  Flags;\r
175   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
176   UINT8                                   ResetValue;\r
177   UINT8                                   Reserved2[3];\r
178   UINT64                                  XFirmwareCtrl;\r
179   UINT64                                  XDsdt;\r
180   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
181   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
182   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
183   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
184   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
185   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
186   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
187   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
188 } EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
189 \r
190 //\r
191 // FADT Version (as defined in ACPI 2.0 spec.)\r
192 //\r
193 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
194 \r
195 //\r
196 // Fixed ACPI Description Table Boot Architecture Flags\r
197 // All other bits are reserved and must be set to 0.\r
198 //\r
199 #define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
200 #define EFI_ACPI_2_0_8042           (1 << 1)\r
201 \r
202 //\r
203 // Fixed ACPI Description Table Fixed Feature Flags\r
204 // All other bits are reserved and must be set to 0.\r
205 //\r
206 #define EFI_ACPI_2_0_WBINVD         (1 << 0)\r
207 #define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)\r
208 #define EFI_ACPI_2_0_PROC_C1        (1 << 2)\r
209 #define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)\r
210 #define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)\r
211 #define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)\r
212 #define EFI_ACPI_2_0_FIX_RTC        (1 << 6)\r
213 #define EFI_ACPI_2_0_RTC_S4         (1 << 7)\r
214 #define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)\r
215 #define EFI_ACPI_2_0_DCK_CAP        (1 << 9)\r
216 #define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)\r
217 #define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)\r
218 #define EFI_ACPI_2_0_HEADLESS       (1 << 12)\r
219 #define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)\r
220 \r
221 //\r
222 // Firmware ACPI Control Structure\r
223 //\r
224 typedef struct {\r
225   UINT32  Signature;\r
226   UINT32  Length;\r
227   UINT32  HardwareSignature;\r
228   UINT32  FirmwareWakingVector;\r
229   UINT32  GlobalLock;\r
230   UINT32  Flags;\r
231   UINT64  XFirmwareWakingVector;\r
232   UINT8   Version;\r
233   UINT8   Reserved[31];\r
234 } EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
235 \r
236 //\r
237 // FACS Version (as defined in ACPI 2.0 spec.)\r
238 //\r
239 #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
240 \r
241 //\r
242 // Firmware Control Structure Feature Flags\r
243 // All other bits are reserved and must be set to 0.\r
244 //\r
245 #define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
246 \r
247 //\r
248 // Multiple APIC Description Table header definition.  The rest of the table\r
249 // must be defined in a platform specific manner.\r
250 //\r
251 typedef struct {\r
252   EFI_ACPI_DESCRIPTION_HEADER Header;\r
253   UINT32                      LocalApicAddress;\r
254   UINT32                      Flags;\r
255 } EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
256 \r
257 //\r
258 // MADT Revision (as defined in ACPI 2.0 spec.)\r
259 //\r
260 #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
261 \r
262 //\r
263 // Multiple APIC Flags\r
264 // All other bits are reserved and must be set to 0.\r
265 //\r
266 #define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)\r
267 \r
268 //\r
269 // Multiple APIC Description Table APIC structure types\r
270 // All other values between 0x09 an 0xFF are reserved and\r
271 // will be ignored by OSPM.\r
272 //\r
273 #define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
274 #define EFI_ACPI_2_0_IO_APIC                        0x01\r
275 #define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
276 #define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
277 #define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
278 #define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
279 #define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
280 #define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
281 #define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
282 \r
283 //\r
284 // APIC Structure Definitions\r
285 //\r
286 //\r
287 // Processor Local APIC Structure Definition\r
288 //\r
289 typedef struct {\r
290   UINT8   Type;\r
291   UINT8   Length;\r
292   UINT8   AcpiProcessorId;\r
293   UINT8   ApicId;\r
294   UINT32  Flags;\r
295 } EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
296 \r
297 //\r
298 // Local APIC Flags.  All other bits are reserved and must be 0.\r
299 //\r
300 #define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
301 \r
302 //\r
303 // IO APIC Structure\r
304 //\r
305 typedef struct {\r
306   UINT8   Type;\r
307   UINT8   Length;\r
308   UINT8   IoApicId;\r
309   UINT8   Reserved;\r
310   UINT32  IoApicAddress;\r
311   UINT32  GlobalSystemInterruptBase;\r
312 } EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
313 \r
314 //\r
315 // Interrupt Source Override Structure\r
316 //\r
317 typedef struct {\r
318   UINT8   Type;\r
319   UINT8   Length;\r
320   UINT8   Bus;\r
321   UINT8   Source;\r
322   UINT32  GlobalSystemInterrupt;\r
323   UINT16  Flags;\r
324 } EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
325 \r
326 //\r
327 // Non-Maskable Interrupt Source Structure\r
328 //\r
329 typedef struct {\r
330   UINT8   Type;\r
331   UINT8   Length;\r
332   UINT16  Flags;\r
333   UINT32  GlobalSystemInterrupt;\r
334 } EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
335 \r
336 //\r
337 // Local APIC NMI Structure\r
338 //\r
339 typedef struct {\r
340   UINT8   Type;\r
341   UINT8   Length;\r
342   UINT8   AcpiProcessorId;\r
343   UINT16  Flags;\r
344   UINT8   LocalApicLint;\r
345 } EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
346 \r
347 //\r
348 // Local APIC Address Override Structure\r
349 //\r
350 typedef struct {\r
351   UINT8   Type;\r
352   UINT8   Length;\r
353   UINT16  Reserved;\r
354   UINT64  LocalApicAddress;\r
355 } EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
356 \r
357 //\r
358 // IO SAPIC Structure\r
359 //\r
360 typedef struct {\r
361   UINT8   Type;\r
362   UINT8   Length;\r
363   UINT8   IoApicId;\r
364   UINT8   Reserved;\r
365   UINT32  GlobalSystemInterruptBase;\r
366   UINT64  IoSapicAddress;\r
367 } EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
368 \r
369 //\r
370 // Local SAPIC Structure\r
371 //\r
372 typedef struct {\r
373   UINT8   Type;\r
374   UINT8   Length;\r
375   UINT8   AcpiProcessorId;\r
376   UINT8   LocalSapicId;\r
377   UINT8   LocalSapicEid;\r
378   UINT8   Reserved[3];\r
379   UINT32  Flags;\r
380 } EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
381 \r
382 //\r
383 // Platform Interrupt Sources Structure\r
384 //\r
385 typedef struct {\r
386   UINT8   Type;\r
387   UINT8   Length;\r
388   UINT16  Flags;\r
389   UINT8   InterruptType;\r
390   UINT8   ProcessorId;\r
391   UINT8   ProcessorEid;\r
392   UINT8   IoSapicVector;\r
393   UINT32  GlobalSystemInterrupt;\r
394   UINT32  Reserved;\r
395 } EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
396 \r
397 //\r
398 // Smart Battery Description Table (SBST)\r
399 //\r
400 typedef struct {\r
401   EFI_ACPI_DESCRIPTION_HEADER Header;\r
402   UINT32                      WarningEnergyLevel;\r
403   UINT32                      LowEnergyLevel;\r
404   UINT32                      CriticalEnergyLevel;\r
405 } EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
406 \r
407 //\r
408 // SBST Version (as defined in ACPI 2.0 spec.)\r
409 //\r
410 #define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
411 \r
412 //\r
413 // Embedded Controller Boot Resources Table (ECDT)\r
414 // The table is followed by a null terminated ASCII string that contains\r
415 // a fully qualified reference to the name space object.\r
416 //\r
417 typedef struct {\r
418   EFI_ACPI_DESCRIPTION_HEADER             Header;\r
419   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
420   EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
421   UINT32                                  Uid;\r
422   UINT8                                   GpeBit;\r
423 } EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
424 \r
425 //\r
426 // ECDT Version (as defined in ACPI 2.0 spec.)\r
427 //\r
428 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
429 \r
430 //\r
431 // Known table signatures\r
432 //\r
433 //\r
434 // "RSD PTR " Root System Description Pointer\r
435 //\r
436 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352\r
437 \r
438 //\r
439 // "SPIC" Multiple SAPIC Description Table\r
440 //\r
441 // BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
442 // #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
443 //\r
444 #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
445 \r
446 //\r
447 // "BOOT" MS Simple Boot Spec\r
448 //\r
449 #define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
450 \r
451 //\r
452 // "DBGP" MS Bebug Port Spec\r
453 //\r
454 #define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
455 \r
456 //\r
457 // "DSDT" Differentiated System Description Table\r
458 //\r
459 #define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344\r
460 \r
461 //\r
462 // "ECDT" Embedded Controller Boot Resources Table\r
463 //\r
464 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
465 \r
466 //\r
467 // "ETDT" Event Timer Description Table\r
468 //\r
469 #define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445\r
470 \r
471 //\r
472 // "FACS" Firmware ACPI Control Structure\r
473 //\r
474 #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146\r
475 \r
476 //\r
477 // "FACP" Fixed ACPI Description Table\r
478 //\r
479 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
480 \r
481 //\r
482 // "APIC" Multiple APIC Description Table\r
483 //\r
484 #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041\r
485 \r
486 //\r
487 // "PSDT" Persistent System Description Table\r
488 //\r
489 #define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350\r
490 \r
491 //\r
492 // "RSDT" Root System Description Table\r
493 //\r
494 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352\r
495 \r
496 //\r
497 // "SBST" Smart Battery Specification Table\r
498 //\r
499 #define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253\r
500 \r
501 //\r
502 // "SLIT" System Locality Information Table\r
503 //\r
504 #define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53\r
505 \r
506 //\r
507 // "SPCR" Serial Port Concole Redirection Table\r
508 //\r
509 #define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053\r
510 \r
511 //\r
512 // "SRAT" Static Resource Affinity Table\r
513 //\r
514 #define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
515 \r
516 //\r
517 // "SSDT" Secondary System Description Table\r
518 //\r
519 #define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
520 \r
521 //\r
522 // "SPMI" Server Platform Management Interface Table\r
523 //\r
524 #define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
525 \r
526 //\r
527 // "XSDT" Extended System Description Table\r
528 //\r
529 #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358\r
530 \r
531 #pragma pack()\r
532 \r
533 #endif\r