static void amd8111e_init_hw_default(struct amd8111e_priv *lp)
{
unsigned int reg_val;
- unsigned int logic_filter[2] = {0,};
void *mmio = lp->mmio;
/* stop the chip */
writew(MIB_CLEAR, mmio + MIB_ADDR);
/* Clear LARF */
- amd8111e_writeq(*(u64*)logic_filter, mmio + LADRF);
+ writel( 0, mmio + LADRF);
+ writel( 0, mmio + LADRF + 4);
/* SRAM_SIZE register */
reg_val = readl(mmio + SRAM_SIZE);
if (lp->ext_phy_id)
printf("Found MII PHY ID 0x%08x at address 0x%02x\n",
- lp->ext_phy_id, lp->ext_phy_addr);
+ (unsigned int) lp->ext_phy_id, lp->ext_phy_addr);
else
printf("Couldn't detect MII PHY, assuming address 0x01\n");
}
#include "bnx2.h"
#include "bnx2_fw.h"
+#if 0
/* Dummy defines for error handling */
#define EBUSY 1
#define ENODEV 2
#define EINVAL 3
#define ENOMEM 4
#define EIO 5
+#endif
/* The bnx2 seems to be picky about the alignment of the receive buffers
* and possibly the status block.
/* If we timed out, inform the firmware that this is the case. */
if ((val & BNX2_FW_MSG_ACK) != (msg_data & BNX2_DRV_MSG_SEQ)) {
if (!silent)
- printf("fw sync timeout, reset code = %x\n", msg_data);
+ printf("fw sync timeout, reset code = %x\n", (unsigned int) msg_data);
msg_data &= ~BNX2_DRV_MSG_CODE;
msg_data |= BNX2_DRV_MSG_CODE_FW_TIMEOUT;
bnx2_init_rx_ring(struct bnx2 *bp)
{
struct rx_bd *rxbd;
- int i;
+ unsigned int i;
u16 prod, ring_prod;
u32 val;
val = bp->rx_desc_mapping & 0xffffffff;
CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val);
- for (i = 0; i < bp->rx_ring_size; i++) {
+ for (i = 0; (int) i < bp->rx_ring_size; i++) {
rxbd = &bp->rx_desc_ring[RX_RING_IDX(ring_prod)];
rxbd->rx_bd_haddr_hi = 0;
rxbd->rx_bd_haddr_lo = virt_to_bus(&bnx2_bss.rx_buf[ring_prod][0]);
memcpy(nic->node_addr, bp->mac_addr, ETH_ALEN);
printf("Ethernet addr: %s\n", eth_ntoa( nic->node_addr ) );
printf("Broadcom NetXtreme II (%c%d) PCI%s %s %dMHz\n",
- ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
- ((CHIP_ID(bp) & 0x0ff0) >> 4),
+ (int) ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
+ (int) ((CHIP_ID(bp) & 0x0ff0) >> 4),
((bp->flags & PCIX_FLAG) ? "-X" : ""),
((bp->flags & PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
bp->bus_speed_mhz);
u32 page_size;
u32 addr_mask;
u32 total_size;
- u8 *name;
+ char *name;
};
struct bnx2 {
-#warning "depca.c almost certainly won't work"
+#warning "depca.c almost certainly won't work."
+#if 0
/* Not fixed for relocation yet. Probably won't work relocated above 16MB */
#ifdef ALLMULTI
#error multicast support is not yet implemented
depca_probe, depca_disable );
ISA_ROM ( "depca", "Digital DE100 and DE200" );
+
+#endif
static void dmfe_parse_srom(struct nic *nic)
{
- char *srom = db->srom;
+ unsigned char *srom = db->srom;
int dmfe_mode, tmp_reg;
/* Init CR15 */
#define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255);
/* do a nice reset */
-#define eepro_sel_reset(ioaddr) { \
- outb(SEL_RESET_CMD, ioaddr); \
- SLOW_DOWN; \
- SLOW_DOWN; \
- }
+#define eepro_sel_reset(ioaddr) \
+ do { \
+ outb ( SEL_RESET_CMD, ioaddr ); \
+ (void) SLOW_DOWN; \
+ (void) SLOW_DOWN; \
+ } while (0)
/* clear all interrupts */
#define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG)
/* Intialise XMT */
outw((XMT_LOWER_LIMIT << 8), nic->ioaddr + xmt_bar);
eepro_sel_reset(nic->ioaddr);
- tx_start = tx_end = (XMT_LOWER_LIMIT << 8);
+ tx_start = tx_end = (unsigned int) (XMT_LOWER_LIMIT << 8);
tx_last = 0;
eepro_en_rx(nic->ioaddr);
}
if (rx_status & ErrorSummary)
{ /* there was a fatal error */
printf( "%s: Receive error, Rx status %8.8x, Error(s) %s%s%s\n",
- mtdx.nic_name, rx_status ,
+ mtdx.nic_name, (unsigned int) rx_status,
(rx_status & (LONG | RUNT)) ? "length_error ":"",
(rx_status & RXER) ? "frame_error ":"",
(rx_status & CRC) ? "crc_error ":"" );
short pkt_len = ((rx_status & FLNGMASK) >> FLNGShift) - 4;
DBG ( " netdev_rx() normal Rx pkt length %d"
- " status %x.\n", pkt_len, rx_status );
+ " status %x.\n", pkt_len, (unsigned int) rx_status );
nic->packetlen = pkt_len;
memcpy(nic->packet, mtdx.cur_rx->skbuff, pkt_len);
DBG ( "TX Time Out" );
} else if( tx_status & (CSL | LC | EC | UDF | HF)){
printf( "Transmit error: %8.8x %s %s %s %s %s\n",
- tx_status,
+ (unsigned int) tx_status,
tx_status & EC ? "abort" : "",
tx_status & CSL ? "carrier" : "",
tx_status & LC ? "late" : "",
rxd[i].bufptr = virt_to_bus(&rxb[i*RX_BUF_SIZE]);
if (natsemi_debug > 1)
printf("natsemi_init_rxd: rxd[%d]=%p link=%X cmdsts=%X bufptr=%4.4x\n",
- i, &rxd[i], rxd[i].link, rxd[i].cmdsts, rxd[i].bufptr);
+ i, &rxd[i], (unsigned int) rxd[i].link, (unsigned int) rxd[i].cmdsts,
+ (unsigned int) rxd[i].bufptr);
}
/* load Receive Descriptor Register */
/* wait */ ;
if (currticks() >= to) {
- printf("natsemi_transmit: TX Timeout! Tx status %X.\n", tx_status);
+ printf("natsemi_transmit: TX Timeout! Tx status %X.\n", (unsigned int) tx_status);
}
if (!(tx_status & 0x08000000)) {
- printf("natsemi_transmit: Transmit error, Tx status %X.\n", tx_status);
+ printf("natsemi_transmit: Transmit error, Tx status %X.\n", (unsigned int) tx_status);
}
}
int retstat = 0;
if (natsemi_debug > 2)
- printf("natsemi_poll: cur_rx:%d, status:%X\n", cur_rx, rx_status);
+ printf("natsemi_poll: cur_rx:%d, status:%X\n", cur_rx, (unsigned int) rx_status);
if (!(rx_status & OWN))
return retstat;
if (natsemi_debug > 1)
printf("natsemi_poll: got a packet: cur_rx:%d, status:%X\n",
- cur_rx, rx_status);
+ cur_rx, (unsigned int) rx_status);
nic->packetlen = (rx_status & DSIZE) - CRC_SIZE;
if ((rx_status & (DescMore|DescPktOK|RxTooLong)) != DescPktOK) {
/* corrupted packet received */
printf("natsemi_poll: Corrupted packet received, buffer status = %X\n",
- rx_status);
+ (unsigned int) rx_status);
retstat = 0;
} else {
/* give packet to higher level routine */
}
if (status & fail)
- printf("%s failed! (0x%hX & 0x%hX)\n", name, status, fail);
+ printf("%s failed! (0x%hX & 0x%hX)\n", name, (unsigned int) status,
+ (unsigned int) fail);
else if (timed_out)
- printf("run_bist %s timed out! (%hX)\n", name, status);
+ printf("run_bist %s timed out! (%hX)\n", name, (unsigned int) status);
dprintf(("done %s in %d loops\n", name, loops));
}
/* Programmed I/O */
unsigned short type;
type = (t >> 8) | (t << 8);
- eth_pio_write(d, eth_tx_start<<8, ETH_ALEN);
+ eth_pio_write( (unsigned char *) d, eth_tx_start<<8, ETH_ALEN);
eth_pio_write(nic->node_addr, (eth_tx_start<<8)+ETH_ALEN, ETH_ALEN);
/* bcc generates worse code without (const+const) below */
eth_pio_write((unsigned char *)&type, (eth_tx_start<<8)+(ETH_ALEN+ETH_ALEN), 2);
- eth_pio_write(p, (eth_tx_start<<8)+ETH_HLEN, s);
+ eth_pio_write( (unsigned char *) p, (eth_tx_start<<8)+ETH_HLEN, s);
s += ETH_HLEN;
if (s < ETH_ZLEN) s = ETH_ZLEN;
}
#endif
pktoff = next << 8;
if (eth_flags & FLAG_PIO)
- eth_pio_read(pktoff, (char *)&pkthdr, 4);
+ eth_pio_read(pktoff, (unsigned char *)&pkthdr, 4);
else
memcpy(&pkthdr, bus_to_virt(eth_rmem + pktoff), 4);
pktoff += sizeof(pkthdr);
******************************************************************/
unsigned char c;
if (eth_vendor == VENDOR_NONE) {
- char romdata[16], testbuf[32];
+ unsigned char romdata[16];
+ unsigned char testbuf[32];
int idx;
- static char test[] = "NE*000 memory";
+ static unsigned char test[] = "NE*000 memory";
static unsigned short base[] = {
#ifdef NE_SCAN
NE_SCAN,
eth_rx_start = 32 + D8390_TXBUF_SIZE;
c = inb(eth_asic_base + NE_RESET);
outb(c, eth_asic_base + NE_RESET);
- inb(0x84);
+ (void) inb(0x84);
outb(D8390_COMMAND_STP |
D8390_COMMAND_RD2, eth_nic_base + D8390_P0_COMMAND);
outb(D8390_RCR_MON, eth_nic_base + D8390_P0_RCR);
eth_flags |= FLAG_16BIT; /* force 16-bit mode */
#endif
- eth_pio_write(test, 8192, sizeof(test));
+ eth_pio_write( (unsigned char *) test, 8192, sizeof(test));
eth_pio_read(8192, testbuf, sizeof(test));
if (!memcmp(test, testbuf, sizeof(test)))
break;
D8390_DCR_FT1 | D8390_DCR_LS, eth_nic_base + D8390_P0_DCR);
outb(MEM_16384, eth_nic_base + D8390_P0_PSTART);
outb(MEM_32768, eth_nic_base + D8390_P0_PSTOP);
- eth_pio_write(test, 16384, sizeof(test));
+ eth_pio_write( (unsigned char *) test, 16384, sizeof(test));
eth_pio_read(16384, testbuf, sizeof(test));
if (!memcmp(testbuf, test, sizeof(test)))
break;
ltint = 1;
}
- DBG ( "%s at %hX,", chipname, ioaddr );
+ DBG ( "%s at %hX,", chipname, (unsigned int) ioaddr );
/* read PROM address */
for (i = 0; i < 6; i++)
}
/* Print out some hardware info */
- DBG ( "%s: IO Addr 0x%hX, MAC Addr %s\n ", chipname, ioaddr,
+ DBG ( "%s: IO Addr 0x%hX, MAC Addr %s\n ", chipname, (unsigned int) ioaddr,
eth_ntoa ( nic->node_addr ) );
/* Set to pci bus master */
#ifdef RTL8169_DEBUG
+
+#if 0
#define assert(expr) \
if(!(expr)) { printk( "Assertion failed! %s,%s,%s,line=%d\n", #expr,__FILE__,__FUNCTION__,__LINE__); }
+#endif
+
#define DBG_PRINTF( fmt, args...) printk("r8169: " fmt, ## args);
+
#else
+
+#if 0
#define assert(expr) do {} while (0)
+#endif
+
#define DBG_PRINTF( fmt, args...) ;
+
#endif // end of #ifdef RTL8169_DEBUG
/* media options
/* Print out some hardware info */
DBG ( "%s: %s at IOAddr %#hX, ", pci->driver_name, eth_ntoa ( nic->node_addr ),
- ioaddr );
+ (unsigned int) ioaddr );
/* Config PHY */
rtl8169_hw_PHY_config(nic);
rxd[i].bufptr = virt_to_bus(&rxb[i*RX_BUF_SIZE]);
if (sis900_debug > 0)
printf("sis900_init_rxd: rxd[%d]=%p link=%X cmdsts=%X bufptr=%X\n",
- i, &rxd[i], rxd[i].link, rxd[i].cmdsts, rxd[i].bufptr);
+ i, &rxd[i], (unsigned int) rxd[i].link, (unsigned int) rxd[i].cmdsts,
+ (unsigned int) rxd[i].bufptr);
}
/* load Receive Descriptor Register */
/* wait */ ;
if (currticks() >= to) {
- printf("sis900_transmit: TX Timeout! Tx status %X.\n", tx_status);
+ printf("sis900_transmit: TX Timeout! Tx status %X.\n",
+ (unsigned int) tx_status);
}
if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
/* packet unsuccessfully transmited */
- printf("sis900_transmit: Transmit error, Tx status %X.\n", tx_status);
+ printf("sis900_transmit: Transmit error, Tx status %X.\n",
+ (unsigned int) tx_status);
}
/* Disable interrupts by clearing the interrupt mask. */
outl(0, ioaddr + imr);
int retstat = 0;
if (sis900_debug > 2)
- printf("sis900_poll: cur_rx:%d, status:%X\n", cur_rx, rx_status);
+ printf("sis900_poll: cur_rx:%d, status:%X\n", cur_rx,
+ (unsigned int) rx_status);
if (!(rx_status & OWN))
return retstat;
if (sis900_debug > 1)
printf("sis900_poll: got a packet: cur_rx:%d, status:%X\n",
- cur_rx, rx_status);
+ cur_rx, (unsigned int) rx_status);
if ( ! retrieve ) return 1;
if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
/* corrupted packet received */
printf("sis900_poll: Corrupted packet received, buffer status = %X\n",
- rx_status);
+ (unsigned int) rx_status);
retstat = 0;
} else {
/* give packet to higher level routine */
DBG ( "Device revision id: %hx\n", sdc->pci_rev_id );
/* Print out some hardware info */
- DBG ( "%s: %s at ioaddr %hX, ", pci->driver_name, nic->node_addr, BASE);
+ DBG ( "%s: %s at ioaddr %hX, ", pci->driver_name, nic->node_addr, (unsigned int) BASE);
sdc->mii_preamble_required = 0;
if (1) {
static void TLan_PhyPowerUp(struct nic *nic);
-static void TLan_SetMac(struct nic *nic __unused, int areg, char *mac);
+static void TLan_SetMac(struct nic *nic __unused, int areg, unsigned char *mac);
static void TLan_PhyReset(struct nic *nic);
static void TLan_PhyStartLink(struct nic *nic);
nic->packetlen = framesize;
- DBG ( ".%d.", framesize );
+ DBG ( ".%d.", (unsigned int) framesize );
memcpy(nic->packet, rxb +
(priv->cur_rx * TLAN_MAX_FRAME_SIZE), nic->packetlen);
if (tail_list->cStat != TLAN_CSTAT_UNUSED) {
printf("TRANSMIT: %s is busy (Head=%p Tail=%x)\n",
- priv->nic_name, priv->txList, priv->txTail);
+ priv->nic_name, priv->txList, (unsigned int) priv->txTail);
tx_ring[entry].cStat = TLAN_CSTAT_UNUSED;
// priv->txBusyCount++;
return;
*
**************************************************************/
-void TLan_SetMac(struct nic *nic __unused, int areg, char *mac)
+void TLan_SetMac(struct nic *nic __unused, int areg, unsigned char *mac)
{
int i;
TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &lo);
if ((control != 0xFFFF) || (hi != 0xFFFF)
|| (lo != 0xFFFF)) {
- printf("PHY found at %hX %hX %hX %hX\n", phy,
- control, hi, lo);
+ printf("PHY found at %hX %hX %hX %hX\n",
+ (unsigned int) phy, control, hi, lo);
if ((priv->phy[1] == TLAN_PHY_NONE)
&& (phy != TLAN_PHY_MAX_ADDR)) {
priv->phy[1] = phy;
if (inl(ioaddr + CSR5) == 0xFFFFFFFF) {
printf("%s: The Tulip chip at %X is not functioning.\n",
- tp->nic_name, ioaddr);
+ tp->nic_name, (unsigned int) ioaddr);
return 0;
}
pci_read_config_byte(pci, PCI_REVISION, &chip_rev);
printf("%s: [chip: %s] rev %d at %hX\n", tp->nic_name,
- tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
+ tulip_tbl[chip_idx].chip_name, chip_rev, (unsigned int) ioaddr);
printf("%s: Vendor=%hX Device=%hX", tp->nic_name, tp->vendor_id, tp->dev_id);
if (chip_idx == DC21041 && inl(ioaddr + CSR9) & 0x8000) {
for (i = 0; i < ETH_ALEN; i++)
last_phys_addr[i] = nic->node_addr[i];
- DBG ( "%s: %s at ioaddr %hX\n", tp->nic_name, eth_ntoa ( nic->node_addr ), ioaddr );
+ DBG ( "%s: %s at ioaddr %hX\n", tp->nic_name, eth_ntoa ( nic->node_addr ),
+ (unsigned int) ioaddr );
tp->chip_id = chip_idx;
tp->revision = chip_rev;
int i;
for (i = 0; i < 0x7fff; i++)
{
- inb (0x61);
- inb (0x61);
- inb (0x61);
- inb (0x61);
+ ( void ) inb (0x61);
+ ( void ) inb (0x61);
+ ( void ) inb (0x61);
+ ( void ) inb (0x61);
}
}
if ((status & 0xffff) != 0x7fff) {
printf("winbond-840 : Oversized Ethernet frame spanned "
"multiple buffers, entry %d status %X !\n",
- w840private.cur_rx, status);
+ w840private.cur_rx, (unsigned int) status);
}
} else if (status & 0x8000) {
/* There was a fatal error. */
/* Transmit timed out... */
- printf("winbond-840 : transmission TIMEOUT : status %X\n", w840private.tx_ring[entry].status);
+ printf("winbond-840 : transmission TIMEOUT : status %X\n",
+ (unsigned int) w840private.tx_ring[entry].status);
return;
}