src/drivers/net/mlx_ipoib/MT23108_PRM_append.h

   1 /*
   2   This software is available to you under a choice of one of two
   3   licenses.  You may choose to be licensed under the terms of the GNU
   4   General Public License (GPL) Version 2, available at
   5   <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
   6   license, available in the LICENSE.TXT file accompanying this
   7   software.  These details are also available at
   8   <http://openib.org/license.html>.
   9
  10   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  11   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  12   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  13   NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  14   BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  15   ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  16   CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  17   SOFTWARE.
  18
  19   Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
  20 */
  21
  22 /***
  23  *** This file was generated at "Tue Nov 16 17:03:53 2004"
  24  *** by:
  25  ***    % csp_bf -copyright=/mswg/misc/license-header.txt -bits MT23108_PRM_append.csp
  26  ***/
  27
  28 #ifndef H_bits_MT23108_PRM_append_csp_H
  29 #define H_bits_MT23108_PRM_append_csp_H
  30
  31
  32 /* Gather entry with inline data */
  33
  34 struct wqe_segment_data_inline_st {     /* Little Endian */
  35     pseudo_bit_t        byte_count[0x0000a];   /* Not including padding for 16Byte chunks */
  36     pseudo_bit_t        reserved0[0x00015];
  37     pseudo_bit_t        always1[0x00001];
  38 /* -------------- */
  39     pseudo_bit_t        data[0x00020];         /* Data may be more this segment size - in 16Byte chunks */
  40 /* -------------- */
  41 };
  42
  43 /* Scatter/Gather entry with a pointer */
  44
  45 struct wqe_segment_data_ptr_st {        /* Little Endian */
  46     pseudo_bit_t        byte_count[0x0001f];
  47     pseudo_bit_t        always0[0x00001];
  48 /* -------------- */
  49     pseudo_bit_t        l_key[0x00020];
  50 /* -------------- */
  51     pseudo_bit_t        local_address_h[0x00020];
  52 /* -------------- */
  53     pseudo_bit_t        local_address_l[0x00020];
  54 /* -------------- */
  55 };
  56
  57 /*  */
  58
  59 struct wqe_segment_atomic_st {  /* Little Endian */
  60     pseudo_bit_t        swap_add_h[0x00020];
  61 /* -------------- */
  62     pseudo_bit_t        swap_add_l[0x00020];
  63 /* -------------- */
  64     pseudo_bit_t        compare_h[0x00020];
  65 /* -------------- */
  66     pseudo_bit_t        compare_l[0x00020];
  67 /* -------------- */
  68 };
  69
  70 /*  */
  71
  72 struct wqe_segment_remote_address_st {  /* Little Endian */
  73     pseudo_bit_t        remote_virt_addr_h[0x00020];
  74 /* -------------- */
  75     pseudo_bit_t        remote_virt_addr_l[0x00020];
  76 /* -------------- */
  77     pseudo_bit_t        rkey[0x00020];
  78 /* -------------- */
  79     pseudo_bit_t        reserved0[0x00020];
  80 /* -------------- */
  81 };
  82
  83 /* Bind memory window segment */
  84
  85 struct wqe_segment_bind_st {    /* Little Endian */
  86     pseudo_bit_t        reserved0[0x0001d];
  87     pseudo_bit_t        rr[0x00001];           /* Remote read */
  88     pseudo_bit_t        rw[0x00001];           /* Remote write */
  89     pseudo_bit_t        a[0x00001];            /* atomic */
  90 /* -------------- */
  91     pseudo_bit_t        reserved1[0x00020];
  92 /* -------------- */
  93     pseudo_bit_t        new_rkey[0x00020];
  94 /* -------------- */
  95     pseudo_bit_t        region_lkey[0x00020];
  96 /* -------------- */
  97     pseudo_bit_t        start_address_h[0x00020];
  98 /* -------------- */
  99     pseudo_bit_t        start_address_l[0x00020];
 100 /* -------------- */
 101     pseudo_bit_t        length_h[0x00020];
 102 /* -------------- */
 103     pseudo_bit_t        length_l[0x00020];
 104 /* -------------- */
 105 };
 106
 107 /*  */
 108
 109 struct wqe_segment_ud_st {      /* Little Endian */
 110     pseudo_bit_t        reserved0[0x00020];
 111 /* -------------- */
 112     pseudo_bit_t        l_key[0x00020];        /* memory key for UD AV */
 113 /* -------------- */
 114     pseudo_bit_t        av_address_63_32[0x00020];
 115 /* -------------- */
 116     pseudo_bit_t        reserved1[0x00005];
 117     pseudo_bit_t        av_address_31_5[0x0001b];
 118 /* -------------- */
 119     pseudo_bit_t        reserved2[0x00080];
 120 /* -------------- */
 121     pseudo_bit_t        destination_qp[0x00018];
 122     pseudo_bit_t        reserved3[0x00008];
 123 /* -------------- */
 124     pseudo_bit_t        q_key[0x00020];
 125 /* -------------- */
 126     pseudo_bit_t        reserved4[0x00040];
 127 /* -------------- */
 128 };
 129
 130 /*  */
 131
 132 struct wqe_segment_rd_st {      /* Little Endian */
 133     pseudo_bit_t        destination_qp[0x00018];
 134     pseudo_bit_t        reserved0[0x00008];
 135 /* -------------- */
 136     pseudo_bit_t        q_key[0x00020];
 137 /* -------------- */
 138     pseudo_bit_t        reserved1[0x00040];
 139 /* -------------- */
 140 };
 141
 142 /*  */
 143
 144 struct wqe_segment_ctrl_recv_st {       /* Little Endian */
 145     pseudo_bit_t        reserved0[0x00002];
 146     pseudo_bit_t        e[0x00001];            /* WQE event */
 147     pseudo_bit_t        c[0x00001];            /* Create CQE (for "requested signalling" QP) */
 148     pseudo_bit_t        reserved1[0x0001c];
 149 /* -------------- */
 150     pseudo_bit_t        reserved2[0x00020];
 151 /* -------------- */
 152 };
 153
 154 /*  */
 155
 156 struct wqe_segment_ctrl_mlx_st {        /* Little Endian */
 157     pseudo_bit_t        reserved0[0x00002];
 158     pseudo_bit_t        e[0x00001];            /* WQE event */
 159     pseudo_bit_t        c[0x00001];            /* Create CQE (for "requested signalling" QP) */
 160     pseudo_bit_t        reserved1[0x00004];
 161     pseudo_bit_t        sl[0x00004];
 162     pseudo_bit_t        max_statrate[0x00003];
 163     pseudo_bit_t        reserved2[0x00001];
 164     pseudo_bit_t        slr[0x00001];          /* 0= take slid from port. 1= take slid from given headers */
 165     pseudo_bit_t        v15[0x00001];          /* Send packet over VL15 */
 166     pseudo_bit_t        reserved3[0x0000e];
 167 /* -------------- */
 168     pseudo_bit_t        vcrc[0x00010];         /* Packet's VCRC (if not 0 - otherwise computed by HW) */
 169     pseudo_bit_t        rlid[0x00010];         /* Destination LID (must match given headers) */
 170 /* -------------- */
 171 };
 172
 173 /*  */
 174
 175 struct wqe_segment_ctrl_send_st {       /* Little Endian */
 176     pseudo_bit_t        always1[0x00001];
 177     pseudo_bit_t        s[0x00001];            /* Solicited event */
 178     pseudo_bit_t        e[0x00001];            /* WQE event */
 179     pseudo_bit_t        c[0x00001];            /* Create CQE (for "requested signalling" QP) */
 180     pseudo_bit_t        reserved0[0x0001c];
 181 /* -------------- */
 182     pseudo_bit_t        immediate[0x00020];
 183 /* -------------- */
 184 };
 185
 186 /*  */
 187
 188 struct wqe_segment_next_st {    /* Little Endian */
 189     pseudo_bit_t        nopcode[0x00005];      /* next opcode */
 190     pseudo_bit_t        reserved0[0x00001];
 191     pseudo_bit_t        nda_31_6[0x0001a];     /* NDA[31:6] */
 192 /* -------------- */
 193     pseudo_bit_t        nds[0x00006];
 194     pseudo_bit_t        f[0x00001];            /* fence bit */
 195     pseudo_bit_t        dbd[0x00001];          /* doorbell rung */
 196     pseudo_bit_t        nee[0x00018];          /* next EE */
 197 /* -------------- */
 198 };
 199 #endif /* H_bits_MT23108_PRM_append_csp_H */