2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 Mellanox Technologies Ltd.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 FILE_LICENCE ( GPL2_OR_LATER );
32 #include <gpxe/malloc.h>
33 #include <gpxe/umalloc.h>
34 #include <gpxe/iobuf.h>
35 #include <gpxe/netdevice.h>
36 #include <gpxe/infiniband.h>
37 #include <gpxe/ib_smc.h>
43 * Mellanox Hermon Infiniband HCA
47 /***************************************************************************
49 * Queue number allocation
51 ***************************************************************************
55 * Allocate offsets within usage bitmask
57 * @v bits Usage bitmask
58 * @v bits_len Length of usage bitmask
59 * @v num_bits Number of contiguous bits to allocate within bitmask
60 * @ret bit First free bit within bitmask, or negative error
62 static int hermon_bitmask_alloc ( hermon_bitmask_t *bits,
63 unsigned int bits_len,
64 unsigned int num_bits ) {
66 hermon_bitmask_t mask = 1;
67 unsigned int found = 0;
69 /* Search bits for num_bits contiguous free bits */
70 while ( bit < bits_len ) {
71 if ( ( mask & *bits ) == 0 ) {
72 if ( ++found == num_bits )
78 mask = ( mask << 1 ) | ( mask >> ( 8 * sizeof ( mask ) - 1 ) );
85 /* Mark bits as in-use */
90 mask = ( mask >> 1 ) | ( mask << ( 8 * sizeof ( mask ) - 1 ) );
93 return ( bit - num_bits + 1 );
97 * Free offsets within usage bitmask
99 * @v bits Usage bitmask
100 * @v bit Starting bit within bitmask
101 * @v num_bits Number of contiguous bits to free within bitmask
103 static void hermon_bitmask_free ( hermon_bitmask_t *bits,
104 int bit, unsigned int num_bits ) {
105 hermon_bitmask_t mask;
107 for ( ; num_bits ; bit++, num_bits-- ) {
108 mask = ( 1 << ( bit % ( 8 * sizeof ( mask ) ) ) );
109 bits[ ( bit / ( 8 * sizeof ( mask ) ) ) ] &= ~mask;
113 /***************************************************************************
117 ***************************************************************************
121 * Wait for Hermon command completion
123 * @v hermon Hermon device
124 * @v hcr HCA command registers
125 * @ret rc Return status code
127 static int hermon_cmd_wait ( struct hermon *hermon,
128 struct hermonprm_hca_command_register *hcr ) {
131 for ( wait = HERMON_HCR_MAX_WAIT_MS ; wait ; wait-- ) {
133 readl ( hermon->config + HERMON_HCR_REG ( 6 ) );
134 if ( ( MLX_GET ( hcr, go ) == 0 ) &&
135 ( MLX_GET ( hcr, t ) == hermon->toggle ) )
145 * @v hermon Hermon device
146 * @v command Command opcode, flags and input/output lengths
147 * @v op_mod Opcode modifier (0 if no modifier applicable)
148 * @v in Input parameters
149 * @v in_mod Input modifier (0 if no modifier applicable)
150 * @v out Output parameters
151 * @ret rc Return status code
153 static int hermon_cmd ( struct hermon *hermon, unsigned long command,
154 unsigned int op_mod, const void *in,
155 unsigned int in_mod, void *out ) {
156 struct hermonprm_hca_command_register hcr;
157 unsigned int opcode = HERMON_HCR_OPCODE ( command );
158 size_t in_len = HERMON_HCR_IN_LEN ( command );
159 size_t out_len = HERMON_HCR_OUT_LEN ( command );
166 assert ( in_len <= HERMON_MBOX_SIZE );
167 assert ( out_len <= HERMON_MBOX_SIZE );
169 DBGC2 ( hermon, "Hermon %p command %02x in %zx%s out %zx%s\n",
170 hermon, opcode, in_len,
171 ( ( command & HERMON_HCR_IN_MBOX ) ? "(mbox)" : "" ), out_len,
172 ( ( command & HERMON_HCR_OUT_MBOX ) ? "(mbox)" : "" ) );
174 /* Check that HCR is free */
175 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
176 DBGC ( hermon, "Hermon %p command interface locked\n",
181 /* Flip HCR toggle */
182 hermon->toggle = ( 1 - hermon->toggle );
185 memset ( &hcr, 0, sizeof ( hcr ) );
186 in_buffer = &hcr.u.dwords[0];
187 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
188 in_buffer = hermon->mailbox_in;
189 MLX_FILL_1 ( &hcr, 1, in_param_l, virt_to_bus ( in_buffer ) );
191 memcpy ( in_buffer, in, in_len );
192 MLX_FILL_1 ( &hcr, 2, input_modifier, in_mod );
193 out_buffer = &hcr.u.dwords[3];
194 if ( out_len && ( command & HERMON_HCR_OUT_MBOX ) ) {
195 out_buffer = hermon->mailbox_out;
196 MLX_FILL_1 ( &hcr, 4, out_param_l,
197 virt_to_bus ( out_buffer ) );
199 MLX_FILL_4 ( &hcr, 6,
201 opcode_modifier, op_mod,
204 DBGC ( hermon, "Hermon %p issuing command:\n", hermon );
205 DBGC_HDA ( hermon, virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
206 &hcr, sizeof ( hcr ) );
207 if ( in_len && ( command & HERMON_HCR_IN_MBOX ) ) {
208 DBGC2 ( hermon, "Input mailbox:\n" );
209 DBGC2_HDA ( hermon, virt_to_phys ( in_buffer ), in_buffer,
210 ( ( in_len < 512 ) ? in_len : 512 ) );
214 for ( i = 0 ; i < ( sizeof ( hcr ) / sizeof ( hcr.u.dwords[0] ) ) ;
216 writel ( hcr.u.dwords[i],
217 hermon->config + HERMON_HCR_REG ( i ) );
221 /* Wait for command completion */
222 if ( ( rc = hermon_cmd_wait ( hermon, &hcr ) ) != 0 ) {
223 DBGC ( hermon, "Hermon %p timed out waiting for command:\n",
226 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
227 &hcr, sizeof ( hcr ) );
231 /* Check command status */
232 status = MLX_GET ( &hcr, status );
234 DBGC ( hermon, "Hermon %p command failed with status %02x:\n",
237 virt_to_phys ( hermon->config + HERMON_HCR_BASE ),
238 &hcr, sizeof ( hcr ) );
242 /* Read output parameters, if any */
243 hcr.u.dwords[3] = readl ( hermon->config + HERMON_HCR_REG ( 3 ) );
244 hcr.u.dwords[4] = readl ( hermon->config + HERMON_HCR_REG ( 4 ) );
245 memcpy ( out, out_buffer, out_len );
247 DBGC2 ( hermon, "Output%s:\n",
248 ( command & HERMON_HCR_OUT_MBOX ) ? " mailbox" : "" );
249 DBGC2_HDA ( hermon, virt_to_phys ( out_buffer ), out_buffer,
250 ( ( out_len < 512 ) ? out_len : 512 ) );
257 hermon_cmd_query_dev_cap ( struct hermon *hermon,
258 struct hermonprm_query_dev_cap *dev_cap ) {
259 return hermon_cmd ( hermon,
260 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_DEV_CAP,
261 1, sizeof ( *dev_cap ) ),
262 0, NULL, 0, dev_cap );
266 hermon_cmd_query_fw ( struct hermon *hermon, struct hermonprm_query_fw *fw ) {
267 return hermon_cmd ( hermon,
268 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_FW,
274 hermon_cmd_init_hca ( struct hermon *hermon,
275 const struct hermonprm_init_hca *init_hca ) {
276 return hermon_cmd ( hermon,
277 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_HCA,
278 1, sizeof ( *init_hca ) ),
279 0, init_hca, 0, NULL );
283 hermon_cmd_close_hca ( struct hermon *hermon ) {
284 return hermon_cmd ( hermon,
285 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_HCA ),
290 hermon_cmd_init_port ( struct hermon *hermon, unsigned int port,
291 const struct hermonprm_init_port *init_port ) {
292 return hermon_cmd ( hermon,
293 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT_PORT,
294 1, sizeof ( *init_port ) ),
295 0, init_port, port, NULL );
299 hermon_cmd_close_port ( struct hermon *hermon, unsigned int port ) {
300 return hermon_cmd ( hermon,
301 HERMON_HCR_VOID_CMD ( HERMON_HCR_CLOSE_PORT ),
302 0, NULL, port, NULL );
306 hermon_cmd_sw2hw_mpt ( struct hermon *hermon, unsigned int index,
307 const struct hermonprm_mpt *mpt ) {
308 return hermon_cmd ( hermon,
309 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_MPT,
310 1, sizeof ( *mpt ) ),
311 0, mpt, index, NULL );
315 hermon_cmd_write_mtt ( struct hermon *hermon,
316 const struct hermonprm_write_mtt *write_mtt ) {
317 return hermon_cmd ( hermon,
318 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MTT,
319 1, sizeof ( *write_mtt ) ),
320 0, write_mtt, 1, NULL );
324 hermon_cmd_map_eq ( struct hermon *hermon, unsigned long index_map,
325 const struct hermonprm_event_mask *mask ) {
326 return hermon_cmd ( hermon,
327 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_EQ,
328 0, sizeof ( *mask ) ),
329 0, mask, index_map, NULL );
333 hermon_cmd_sw2hw_eq ( struct hermon *hermon, unsigned int index,
334 const struct hermonprm_eqc *eqctx ) {
335 return hermon_cmd ( hermon,
336 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_EQ,
337 1, sizeof ( *eqctx ) ),
338 0, eqctx, index, NULL );
342 hermon_cmd_hw2sw_eq ( struct hermon *hermon, unsigned int index,
343 struct hermonprm_eqc *eqctx ) {
344 return hermon_cmd ( hermon,
345 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_EQ,
346 1, sizeof ( *eqctx ) ),
347 1, NULL, index, eqctx );
351 hermon_cmd_query_eq ( struct hermon *hermon, unsigned int index,
352 struct hermonprm_eqc *eqctx ) {
353 return hermon_cmd ( hermon,
354 HERMON_HCR_OUT_CMD ( HERMON_HCR_QUERY_EQ,
355 1, sizeof ( *eqctx ) ),
356 0, NULL, index, eqctx );
360 hermon_cmd_sw2hw_cq ( struct hermon *hermon, unsigned long cqn,
361 const struct hermonprm_completion_queue_context *cqctx ){
362 return hermon_cmd ( hermon,
363 HERMON_HCR_IN_CMD ( HERMON_HCR_SW2HW_CQ,
364 1, sizeof ( *cqctx ) ),
365 0, cqctx, cqn, NULL );
369 hermon_cmd_hw2sw_cq ( struct hermon *hermon, unsigned long cqn,
370 struct hermonprm_completion_queue_context *cqctx) {
371 return hermon_cmd ( hermon,
372 HERMON_HCR_OUT_CMD ( HERMON_HCR_HW2SW_CQ,
373 1, sizeof ( *cqctx ) ),
374 0, NULL, cqn, cqctx );
378 hermon_cmd_rst2init_qp ( struct hermon *hermon, unsigned long qpn,
379 const struct hermonprm_qp_ee_state_transitions *ctx ){
380 return hermon_cmd ( hermon,
381 HERMON_HCR_IN_CMD ( HERMON_HCR_RST2INIT_QP,
382 1, sizeof ( *ctx ) ),
387 hermon_cmd_init2rtr_qp ( struct hermon *hermon, unsigned long qpn,
388 const struct hermonprm_qp_ee_state_transitions *ctx ){
389 return hermon_cmd ( hermon,
390 HERMON_HCR_IN_CMD ( HERMON_HCR_INIT2RTR_QP,
391 1, sizeof ( *ctx ) ),
396 hermon_cmd_rtr2rts_qp ( struct hermon *hermon, unsigned long qpn,
397 const struct hermonprm_qp_ee_state_transitions *ctx ) {
398 return hermon_cmd ( hermon,
399 HERMON_HCR_IN_CMD ( HERMON_HCR_RTR2RTS_QP,
400 1, sizeof ( *ctx ) ),
405 hermon_cmd_rts2rts_qp ( struct hermon *hermon, unsigned long qpn,
406 const struct hermonprm_qp_ee_state_transitions *ctx ) {
407 return hermon_cmd ( hermon,
408 HERMON_HCR_IN_CMD ( HERMON_HCR_RTS2RTS_QP,
409 1, sizeof ( *ctx ) ),
414 hermon_cmd_2rst_qp ( struct hermon *hermon, unsigned long qpn ) {
415 return hermon_cmd ( hermon,
416 HERMON_HCR_VOID_CMD ( HERMON_HCR_2RST_QP ),
417 0x03, NULL, qpn, NULL );
421 hermon_cmd_mad_ifc ( struct hermon *hermon, unsigned int port,
422 union hermonprm_mad *mad ) {
423 return hermon_cmd ( hermon,
424 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MAD_IFC,
426 1, sizeof ( *mad ) ),
427 0x03, mad, port, mad );
431 hermon_cmd_read_mcg ( struct hermon *hermon, unsigned int index,
432 struct hermonprm_mcg_entry *mcg ) {
433 return hermon_cmd ( hermon,
434 HERMON_HCR_OUT_CMD ( HERMON_HCR_READ_MCG,
435 1, sizeof ( *mcg ) ),
436 0, NULL, index, mcg );
440 hermon_cmd_write_mcg ( struct hermon *hermon, unsigned int index,
441 const struct hermonprm_mcg_entry *mcg ) {
442 return hermon_cmd ( hermon,
443 HERMON_HCR_IN_CMD ( HERMON_HCR_WRITE_MCG,
444 1, sizeof ( *mcg ) ),
445 0, mcg, index, NULL );
449 hermon_cmd_mgid_hash ( struct hermon *hermon, const struct ib_gid *gid,
450 struct hermonprm_mgm_hash *hash ) {
451 return hermon_cmd ( hermon,
452 HERMON_HCR_INOUT_CMD ( HERMON_HCR_MGID_HASH,
454 0, sizeof ( *hash ) ),
459 hermon_cmd_run_fw ( struct hermon *hermon ) {
460 return hermon_cmd ( hermon,
461 HERMON_HCR_VOID_CMD ( HERMON_HCR_RUN_FW ),
466 hermon_cmd_unmap_icm ( struct hermon *hermon, unsigned int page_count,
467 const struct hermonprm_scalar_parameter *offset ) {
468 return hermon_cmd ( hermon,
469 HERMON_HCR_IN_CMD ( HERMON_HCR_UNMAP_ICM,
470 0, sizeof ( *offset ) ),
471 0, offset, page_count, NULL );
475 hermon_cmd_map_icm ( struct hermon *hermon,
476 const struct hermonprm_virtual_physical_mapping *map ) {
477 return hermon_cmd ( hermon,
478 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM,
479 1, sizeof ( *map ) ),
484 hermon_cmd_unmap_icm_aux ( struct hermon *hermon ) {
485 return hermon_cmd ( hermon,
486 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_ICM_AUX ),
491 hermon_cmd_map_icm_aux ( struct hermon *hermon,
492 const struct hermonprm_virtual_physical_mapping *map ) {
493 return hermon_cmd ( hermon,
494 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_ICM_AUX,
495 1, sizeof ( *map ) ),
500 hermon_cmd_set_icm_size ( struct hermon *hermon,
501 const struct hermonprm_scalar_parameter *icm_size,
502 struct hermonprm_scalar_parameter *icm_aux_size ) {
503 return hermon_cmd ( hermon,
504 HERMON_HCR_INOUT_CMD ( HERMON_HCR_SET_ICM_SIZE,
505 0, sizeof ( *icm_size ),
506 0, sizeof (*icm_aux_size) ),
507 0, icm_size, 0, icm_aux_size );
511 hermon_cmd_unmap_fa ( struct hermon *hermon ) {
512 return hermon_cmd ( hermon,
513 HERMON_HCR_VOID_CMD ( HERMON_HCR_UNMAP_FA ),
518 hermon_cmd_map_fa ( struct hermon *hermon,
519 const struct hermonprm_virtual_physical_mapping *map ) {
520 return hermon_cmd ( hermon,
521 HERMON_HCR_IN_CMD ( HERMON_HCR_MAP_FA,
522 1, sizeof ( *map ) ),
526 /***************************************************************************
528 * Memory translation table operations
530 ***************************************************************************
534 * Allocate MTT entries
536 * @v hermon Hermon device
537 * @v memory Memory to map into MTT
538 * @v len Length of memory to map
539 * @v mtt MTT descriptor to fill in
540 * @ret rc Return status code
542 static int hermon_alloc_mtt ( struct hermon *hermon,
543 const void *memory, size_t len,
544 struct hermon_mtt *mtt ) {
545 struct hermonprm_write_mtt write_mtt;
547 unsigned int page_offset;
548 unsigned int num_pages;
550 unsigned int mtt_base_addr;
554 /* Find available MTT entries */
555 start = virt_to_phys ( memory );
556 page_offset = ( start & ( HERMON_PAGE_SIZE - 1 ) );
557 start -= page_offset;
559 num_pages = ( ( len + HERMON_PAGE_SIZE - 1 ) / HERMON_PAGE_SIZE );
560 mtt_offset = hermon_bitmask_alloc ( hermon->mtt_inuse, HERMON_MAX_MTTS,
562 if ( mtt_offset < 0 ) {
563 DBGC ( hermon, "Hermon %p could not allocate %d MTT entries\n",
568 mtt_base_addr = ( ( hermon->cap.reserved_mtts + mtt_offset ) *
569 hermon->cap.mtt_entry_size );
571 /* Fill in MTT structure */
572 mtt->mtt_offset = mtt_offset;
573 mtt->num_pages = num_pages;
574 mtt->mtt_base_addr = mtt_base_addr;
575 mtt->page_offset = page_offset;
577 /* Construct and issue WRITE_MTT commands */
578 for ( i = 0 ; i < num_pages ; i++ ) {
579 memset ( &write_mtt, 0, sizeof ( write_mtt ) );
580 MLX_FILL_1 ( &write_mtt.mtt_base_addr, 1,
581 value, mtt_base_addr );
582 MLX_FILL_2 ( &write_mtt.mtt, 1,
584 ptag_l, ( start >> 3 ) );
585 if ( ( rc = hermon_cmd_write_mtt ( hermon,
586 &write_mtt ) ) != 0 ) {
587 DBGC ( hermon, "Hermon %p could not write MTT at %x\n",
588 hermon, mtt_base_addr );
591 start += HERMON_PAGE_SIZE;
592 mtt_base_addr += hermon->cap.mtt_entry_size;
598 hermon_bitmask_free ( hermon->mtt_inuse, mtt_offset, num_pages );
606 * @v hermon Hermon device
607 * @v mtt MTT descriptor
609 static void hermon_free_mtt ( struct hermon *hermon,
610 struct hermon_mtt *mtt ) {
611 hermon_bitmask_free ( hermon->mtt_inuse, mtt->mtt_offset,
615 /***************************************************************************
619 ***************************************************************************
623 * Issue management datagram
625 * @v ibdev Infiniband device
626 * @v mad Management datagram
627 * @ret rc Return status code
629 static int hermon_mad ( struct ib_device *ibdev, union ib_mad *mad ) {
630 struct hermon *hermon = ib_get_drvdata ( ibdev );
631 union hermonprm_mad mad_ifc;
634 linker_assert ( sizeof ( *mad ) == sizeof ( mad_ifc.mad ),
637 /* Copy in request packet */
638 memcpy ( &mad_ifc.mad, mad, sizeof ( mad_ifc.mad ) );
641 if ( ( rc = hermon_cmd_mad_ifc ( hermon, ibdev->port,
642 &mad_ifc ) ) != 0 ) {
643 DBGC ( hermon, "Hermon %p could not issue MAD IFC: %s\n",
644 hermon, strerror ( rc ) );
648 /* Copy out reply packet */
649 memcpy ( mad, &mad_ifc.mad, sizeof ( *mad ) );
651 if ( mad->hdr.status != 0 ) {
652 DBGC ( hermon, "Hermon %p MAD IFC status %04x\n",
653 hermon, ntohs ( mad->hdr.status ) );
659 /***************************************************************************
661 * Completion queue operations
663 ***************************************************************************
667 * Create completion queue
669 * @v ibdev Infiniband device
670 * @v cq Completion queue
671 * @ret rc Return status code
673 static int hermon_create_cq ( struct ib_device *ibdev,
674 struct ib_completion_queue *cq ) {
675 struct hermon *hermon = ib_get_drvdata ( ibdev );
676 struct hermon_completion_queue *hermon_cq;
677 struct hermonprm_completion_queue_context cqctx;
682 /* Find a free completion queue number */
683 cqn_offset = hermon_bitmask_alloc ( hermon->cq_inuse,
685 if ( cqn_offset < 0 ) {
686 DBGC ( hermon, "Hermon %p out of completion queues\n",
691 cq->cqn = ( hermon->cap.reserved_cqs + cqn_offset );
693 /* Allocate control structures */
694 hermon_cq = zalloc ( sizeof ( *hermon_cq ) );
700 /* Allocate completion queue itself */
701 hermon_cq->cqe_size = ( cq->num_cqes * sizeof ( hermon_cq->cqe[0] ) );
702 hermon_cq->cqe = malloc_dma ( hermon_cq->cqe_size,
703 sizeof ( hermon_cq->cqe[0] ) );
704 if ( ! hermon_cq->cqe ) {
708 memset ( hermon_cq->cqe, 0, hermon_cq->cqe_size );
709 for ( i = 0 ; i < cq->num_cqes ; i++ ) {
710 MLX_FILL_1 ( &hermon_cq->cqe[i].normal, 7, owner, 1 );
714 /* Allocate MTT entries */
715 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_cq->cqe,
717 &hermon_cq->mtt ) ) != 0 )
720 /* Hand queue over to hardware */
721 memset ( &cqctx, 0, sizeof ( cqctx ) );
722 MLX_FILL_1 ( &cqctx, 0, st, 0xa /* "Event fired" */ );
723 MLX_FILL_1 ( &cqctx, 2,
724 page_offset, ( hermon_cq->mtt.page_offset >> 5 ) );
725 MLX_FILL_2 ( &cqctx, 3,
726 usr_page, HERMON_UAR_NON_EQ_PAGE,
727 log_cq_size, fls ( cq->num_cqes - 1 ) );
728 MLX_FILL_1 ( &cqctx, 7, mtt_base_addr_l,
729 ( hermon_cq->mtt.mtt_base_addr >> 3 ) );
730 MLX_FILL_1 ( &cqctx, 15, db_record_addr_l,
731 ( virt_to_phys ( &hermon_cq->doorbell ) >> 3 ) );
732 if ( ( rc = hermon_cmd_sw2hw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
733 DBGC ( hermon, "Hermon %p SW2HW_CQ failed: %s\n",
734 hermon, strerror ( rc ) );
738 DBGC ( hermon, "Hermon %p CQN %#lx ring at [%p,%p)\n",
739 hermon, cq->cqn, hermon_cq->cqe,
740 ( ( ( void * ) hermon_cq->cqe ) + hermon_cq->cqe_size ) );
741 ib_cq_set_drvdata ( cq, hermon_cq );
745 hermon_free_mtt ( hermon, &hermon_cq->mtt );
747 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
751 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
757 * Destroy completion queue
759 * @v ibdev Infiniband device
760 * @v cq Completion queue
762 static void hermon_destroy_cq ( struct ib_device *ibdev,
763 struct ib_completion_queue *cq ) {
764 struct hermon *hermon = ib_get_drvdata ( ibdev );
765 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
766 struct hermonprm_completion_queue_context cqctx;
770 /* Take ownership back from hardware */
771 if ( ( rc = hermon_cmd_hw2sw_cq ( hermon, cq->cqn, &cqctx ) ) != 0 ) {
772 DBGC ( hermon, "Hermon %p FATAL HW2SW_CQ failed on CQN %#lx: "
773 "%s\n", hermon, cq->cqn, strerror ( rc ) );
774 /* Leak memory and return; at least we avoid corruption */
778 /* Free MTT entries */
779 hermon_free_mtt ( hermon, &hermon_cq->mtt );
782 free_dma ( hermon_cq->cqe, hermon_cq->cqe_size );
785 /* Mark queue number as free */
786 cqn_offset = ( cq->cqn - hermon->cap.reserved_cqs );
787 hermon_bitmask_free ( hermon->cq_inuse, cqn_offset, 1 );
789 ib_cq_set_drvdata ( cq, NULL );
792 /***************************************************************************
794 * Queue pair operations
796 ***************************************************************************
802 * @v ibdev Infiniband device
804 * @ret rc Return status code
806 static int hermon_create_qp ( struct ib_device *ibdev,
807 struct ib_queue_pair *qp ) {
808 struct hermon *hermon = ib_get_drvdata ( ibdev );
809 struct hermon_queue_pair *hermon_qp;
810 struct hermonprm_qp_ee_state_transitions qpctx;
814 /* Find a free queue pair number */
815 qpn_offset = hermon_bitmask_alloc ( hermon->qp_inuse,
817 if ( qpn_offset < 0 ) {
818 DBGC ( hermon, "Hermon %p out of queue pairs\n", hermon );
822 qp->qpn = ( HERMON_QPN_BASE + hermon->cap.reserved_qps +
825 /* Allocate control structures */
826 hermon_qp = zalloc ( sizeof ( *hermon_qp ) );
832 /* Calculate doorbell address */
833 hermon_qp->send.doorbell =
834 ( hermon->uar + HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE +
835 HERMON_DB_POST_SND_OFFSET );
837 /* Allocate work queue buffer */
838 hermon_qp->send.num_wqes = ( qp->send.num_wqes /* headroom */ + 1 +
839 ( 2048 / sizeof ( hermon_qp->send.wqe[0] ) ) );
840 hermon_qp->send.num_wqes =
841 ( 1 << fls ( hermon_qp->send.num_wqes - 1 ) ); /* round up */
842 hermon_qp->send.wqe_size = ( hermon_qp->send.num_wqes *
843 sizeof ( hermon_qp->send.wqe[0] ) );
844 hermon_qp->recv.wqe_size = ( qp->recv.num_wqes *
845 sizeof ( hermon_qp->recv.wqe[0] ) );
846 hermon_qp->wqe_size = ( hermon_qp->send.wqe_size +
847 hermon_qp->recv.wqe_size );
848 hermon_qp->wqe = malloc_dma ( hermon_qp->wqe_size,
849 sizeof ( hermon_qp->send.wqe[0] ) );
850 if ( ! hermon_qp->wqe ) {
854 hermon_qp->send.wqe = hermon_qp->wqe;
855 memset ( hermon_qp->send.wqe, 0xff, hermon_qp->send.wqe_size );
856 hermon_qp->recv.wqe = ( hermon_qp->wqe + hermon_qp->send.wqe_size );
857 memset ( hermon_qp->recv.wqe, 0, hermon_qp->recv.wqe_size );
859 /* Allocate MTT entries */
860 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_qp->wqe,
862 &hermon_qp->mtt ) ) != 0 ) {
866 /* Transition queue to INIT state */
867 memset ( &qpctx, 0, sizeof ( qpctx ) );
868 MLX_FILL_2 ( &qpctx, 2,
869 qpc_eec_data.pm_state, 0x03 /* Always 0x03 for UD */,
870 qpc_eec_data.st, HERMON_ST_UD );
871 MLX_FILL_1 ( &qpctx, 3, qpc_eec_data.pd, HERMON_GLOBAL_PD );
872 MLX_FILL_4 ( &qpctx, 4,
873 qpc_eec_data.log_rq_size, fls ( qp->recv.num_wqes - 1 ),
874 qpc_eec_data.log_rq_stride,
875 ( fls ( sizeof ( hermon_qp->recv.wqe[0] ) - 1 ) - 4 ),
876 qpc_eec_data.log_sq_size,
877 fls ( hermon_qp->send.num_wqes - 1 ),
878 qpc_eec_data.log_sq_stride,
879 ( fls ( sizeof ( hermon_qp->send.wqe[0] ) - 1 ) - 4 ) );
880 MLX_FILL_1 ( &qpctx, 5,
881 qpc_eec_data.usr_page, HERMON_UAR_NON_EQ_PAGE );
882 MLX_FILL_1 ( &qpctx, 33, qpc_eec_data.cqn_snd, qp->send.cq->cqn );
883 MLX_FILL_1 ( &qpctx, 38, qpc_eec_data.page_offset,
884 ( hermon_qp->mtt.page_offset >> 6 ) );
885 MLX_FILL_1 ( &qpctx, 41, qpc_eec_data.cqn_rcv, qp->recv.cq->cqn );
886 MLX_FILL_1 ( &qpctx, 43, qpc_eec_data.db_record_addr_l,
887 ( virt_to_phys ( &hermon_qp->recv.doorbell ) >> 2 ) );
888 MLX_FILL_1 ( &qpctx, 53, qpc_eec_data.mtt_base_addr_l,
889 ( hermon_qp->mtt.mtt_base_addr >> 3 ) );
890 if ( ( rc = hermon_cmd_rst2init_qp ( hermon, qp->qpn,
892 DBGC ( hermon, "Hermon %p RST2INIT_QP failed: %s\n",
893 hermon, strerror ( rc ) );
894 goto err_rst2init_qp;
897 /* Transition queue to RTR state */
898 memset ( &qpctx, 0, sizeof ( qpctx ) );
899 MLX_FILL_2 ( &qpctx, 4,
900 qpc_eec_data.mtu, HERMON_MTU_2048,
901 qpc_eec_data.msg_max, 11 /* 2^11 = 2048 */ );
902 MLX_FILL_1 ( &qpctx, 16,
903 qpc_eec_data.primary_address_path.sched_queue,
904 ( 0x83 /* default policy */ |
905 ( ( ibdev->port - 1 ) << 6 ) ) );
906 if ( ( rc = hermon_cmd_init2rtr_qp ( hermon, qp->qpn,
908 DBGC ( hermon, "Hermon %p INIT2RTR_QP failed: %s\n",
909 hermon, strerror ( rc ) );
910 goto err_init2rtr_qp;
912 memset ( &qpctx, 0, sizeof ( qpctx ) );
913 if ( ( rc = hermon_cmd_rtr2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
914 DBGC ( hermon, "Hermon %p RTR2RTS_QP failed: %s\n",
915 hermon, strerror ( rc ) );
919 DBGC ( hermon, "Hermon %p QPN %#lx send ring at [%p,%p)\n",
920 hermon, qp->qpn, hermon_qp->send.wqe,
921 ( ((void *)hermon_qp->send.wqe ) + hermon_qp->send.wqe_size ) );
922 DBGC ( hermon, "Hermon %p QPN %#lx receive ring at [%p,%p)\n",
923 hermon, qp->qpn, hermon_qp->recv.wqe,
924 ( ((void *)hermon_qp->recv.wqe ) + hermon_qp->recv.wqe_size ) );
925 ib_qp_set_drvdata ( qp, hermon_qp );
930 hermon_cmd_2rst_qp ( hermon, qp->qpn );
932 hermon_free_mtt ( hermon, &hermon_qp->mtt );
934 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
938 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
946 * @v ibdev Infiniband device
948 * @ret rc Return status code
950 static int hermon_modify_qp ( struct ib_device *ibdev,
951 struct ib_queue_pair *qp ) {
952 struct hermon *hermon = ib_get_drvdata ( ibdev );
953 struct hermonprm_qp_ee_state_transitions qpctx;
956 /* Issue RTS2RTS_QP */
957 memset ( &qpctx, 0, sizeof ( qpctx ) );
958 MLX_FILL_1 ( &qpctx, 0, opt_param_mask, HERMON_QP_OPT_PARAM_QKEY );
959 MLX_FILL_1 ( &qpctx, 44, qpc_eec_data.q_key, qp->qkey );
960 if ( ( rc = hermon_cmd_rts2rts_qp ( hermon, qp->qpn, &qpctx ) ) != 0 ){
961 DBGC ( hermon, "Hermon %p RTS2RTS_QP failed: %s\n",
962 hermon, strerror ( rc ) );
972 * @v ibdev Infiniband device
975 static void hermon_destroy_qp ( struct ib_device *ibdev,
976 struct ib_queue_pair *qp ) {
977 struct hermon *hermon = ib_get_drvdata ( ibdev );
978 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
982 /* Take ownership back from hardware */
983 if ( ( rc = hermon_cmd_2rst_qp ( hermon, qp->qpn ) ) != 0 ) {
984 DBGC ( hermon, "Hermon %p FATAL 2RST_QP failed on QPN %#lx: "
985 "%s\n", hermon, qp->qpn, strerror ( rc ) );
986 /* Leak memory and return; at least we avoid corruption */
990 /* Free MTT entries */
991 hermon_free_mtt ( hermon, &hermon_qp->mtt );
994 free_dma ( hermon_qp->wqe, hermon_qp->wqe_size );
997 /* Mark queue number as free */
998 qpn_offset = ( qp->qpn - HERMON_QPN_BASE -
999 hermon->cap.reserved_qps );
1000 hermon_bitmask_free ( hermon->qp_inuse, qpn_offset, 1 );
1002 ib_qp_set_drvdata ( qp, NULL );
1005 /***************************************************************************
1007 * Work request operations
1009 ***************************************************************************
1013 * Post send work queue entry
1015 * @v ibdev Infiniband device
1017 * @v av Address vector
1018 * @v iobuf I/O buffer
1019 * @ret rc Return status code
1021 static int hermon_post_send ( struct ib_device *ibdev,
1022 struct ib_queue_pair *qp,
1023 struct ib_address_vector *av,
1024 struct io_buffer *iobuf ) {
1025 struct hermon *hermon = ib_get_drvdata ( ibdev );
1026 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1027 struct ib_work_queue *wq = &qp->send;
1028 struct hermon_send_work_queue *hermon_send_wq = &hermon_qp->send;
1029 struct hermonprm_ud_send_wqe *wqe;
1030 union hermonprm_doorbell_register db_reg;
1031 unsigned int wqe_idx_mask;
1033 /* Allocate work queue entry */
1034 wqe_idx_mask = ( wq->num_wqes - 1 );
1035 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1036 DBGC ( hermon, "Hermon %p send queue full", hermon );
1039 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1040 wqe = &hermon_send_wq->wqe[ wq->next_idx &
1041 ( hermon_send_wq->num_wqes - 1 ) ].ud;
1043 /* Construct work queue entry */
1044 memset ( ( ( ( void * ) wqe ) + 4 /* avoid ctrl.owner */ ), 0,
1045 ( sizeof ( *wqe ) - 4 ) );
1046 MLX_FILL_1 ( &wqe->ctrl, 1, ds, ( sizeof ( *wqe ) / 16 ) );
1047 MLX_FILL_1 ( &wqe->ctrl, 2, c, 0x03 /* generate completion */ );
1048 MLX_FILL_2 ( &wqe->ud, 0,
1049 ud_address_vector.pd, HERMON_GLOBAL_PD,
1050 ud_address_vector.port_number, ibdev->port );
1051 MLX_FILL_2 ( &wqe->ud, 1,
1052 ud_address_vector.rlid, av->lid,
1053 ud_address_vector.g, av->gid_present );
1054 MLX_FILL_1 ( &wqe->ud, 2,
1055 ud_address_vector.max_stat_rate,
1056 ( ( ( av->rate < 2 ) || ( av->rate > 10 ) ) ?
1057 8 : ( av->rate + 5 ) ) );
1058 MLX_FILL_1 ( &wqe->ud, 3, ud_address_vector.sl, av->sl );
1059 memcpy ( &wqe->ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
1060 MLX_FILL_1 ( &wqe->ud, 8, destination_qp, av->qpn );
1061 MLX_FILL_1 ( &wqe->ud, 9, q_key, av->qkey );
1062 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_len ( iobuf ) );
1063 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
1064 MLX_FILL_1 ( &wqe->data[0], 3,
1065 local_address_l, virt_to_bus ( iobuf->data ) );
1067 MLX_FILL_2 ( &wqe->ctrl, 0,
1068 opcode, HERMON_OPCODE_SEND,
1070 ( ( wq->next_idx & hermon_send_wq->num_wqes ) ? 1 : 0 ) );
1071 DBGCP ( hermon, "Hermon %p posting send WQE:\n", hermon );
1072 DBGCP_HD ( hermon, wqe, sizeof ( *wqe ) );
1075 /* Ring doorbell register */
1076 MLX_FILL_1 ( &db_reg.send, 0, qn, qp->qpn );
1077 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1078 virt_to_phys ( hermon_send_wq->doorbell ), db_reg.dword[0] );
1079 writel ( db_reg.dword[0], ( hermon_send_wq->doorbell ) );
1081 /* Update work queue's index */
1088 * Post receive work queue entry
1090 * @v ibdev Infiniband device
1092 * @v iobuf I/O buffer
1093 * @ret rc Return status code
1095 static int hermon_post_recv ( struct ib_device *ibdev,
1096 struct ib_queue_pair *qp,
1097 struct io_buffer *iobuf ) {
1098 struct hermon *hermon = ib_get_drvdata ( ibdev );
1099 struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
1100 struct ib_work_queue *wq = &qp->recv;
1101 struct hermon_recv_work_queue *hermon_recv_wq = &hermon_qp->recv;
1102 struct hermonprm_recv_wqe *wqe;
1103 unsigned int wqe_idx_mask;
1105 /* Allocate work queue entry */
1106 wqe_idx_mask = ( wq->num_wqes - 1 );
1107 if ( wq->iobufs[wq->next_idx & wqe_idx_mask] ) {
1108 DBGC ( hermon, "Hermon %p receive queue full", hermon );
1111 wq->iobufs[wq->next_idx & wqe_idx_mask] = iobuf;
1112 wqe = &hermon_recv_wq->wqe[wq->next_idx & wqe_idx_mask].recv;
1114 /* Construct work queue entry */
1115 MLX_FILL_1 ( &wqe->data[0], 0, byte_count, iob_tailroom ( iobuf ) );
1116 MLX_FILL_1 ( &wqe->data[0], 1, l_key, hermon->reserved_lkey );
1117 MLX_FILL_1 ( &wqe->data[0], 3,
1118 local_address_l, virt_to_bus ( iobuf->data ) );
1120 /* Update work queue's index */
1123 /* Update doorbell record */
1125 MLX_FILL_1 ( &hermon_recv_wq->doorbell, 0, receive_wqe_counter,
1126 ( wq->next_idx & 0xffff ) );
1134 * @v ibdev Infiniband device
1135 * @v cq Completion queue
1136 * @v cqe Hardware completion queue entry
1137 * @ret rc Return status code
1139 static int hermon_complete ( struct ib_device *ibdev,
1140 struct ib_completion_queue *cq,
1141 union hermonprm_completion_entry *cqe ) {
1142 struct hermon *hermon = ib_get_drvdata ( ibdev );
1143 struct ib_work_queue *wq;
1144 struct ib_queue_pair *qp;
1145 struct hermon_queue_pair *hermon_qp;
1146 struct io_buffer *iobuf;
1147 struct ib_address_vector av;
1148 struct ib_global_route_header *grh;
1149 unsigned int opcode;
1152 unsigned int wqe_idx;
1156 /* Parse completion */
1157 qpn = MLX_GET ( &cqe->normal, qpn );
1158 is_send = MLX_GET ( &cqe->normal, s_r );
1159 opcode = MLX_GET ( &cqe->normal, opcode );
1160 if ( opcode >= HERMON_OPCODE_RECV_ERROR ) {
1161 /* "s" field is not valid for error opcodes */
1162 is_send = ( opcode == HERMON_OPCODE_SEND_ERROR );
1163 DBGC ( hermon, "Hermon %p CQN %lx syndrome %x vendor %x\n",
1164 hermon, cq->cqn, MLX_GET ( &cqe->error, syndrome ),
1165 MLX_GET ( &cqe->error, vendor_error_syndrome ) );
1167 /* Don't return immediately; propagate error to completer */
1170 /* Identify work queue */
1171 wq = ib_find_wq ( cq, qpn, is_send );
1173 DBGC ( hermon, "Hermon %p CQN %lx unknown %s QPN %lx\n",
1174 hermon, cq->cqn, ( is_send ? "send" : "recv" ), qpn );
1178 hermon_qp = ib_qp_get_drvdata ( qp );
1180 /* Identify I/O buffer */
1181 wqe_idx = ( MLX_GET ( &cqe->normal, wqe_counter ) &
1182 ( wq->num_wqes - 1 ) );
1183 iobuf = wq->iobufs[wqe_idx];
1185 DBGC ( hermon, "Hermon %p CQN %lx QPN %lx empty WQE %x\n",
1186 hermon, cq->cqn, qpn, wqe_idx );
1189 wq->iobufs[wqe_idx] = NULL;
1192 /* Hand off to completion handler */
1193 ib_complete_send ( ibdev, qp, iobuf, rc );
1195 /* Set received length */
1196 len = MLX_GET ( &cqe->normal, byte_cnt );
1197 assert ( len <= iob_tailroom ( iobuf ) );
1198 iob_put ( iobuf, len );
1199 assert ( iob_len ( iobuf ) >= sizeof ( *grh ) );
1201 iob_pull ( iobuf, sizeof ( *grh ) );
1202 /* Construct address vector */
1203 memset ( &av, 0, sizeof ( av ) );
1204 av.qpn = MLX_GET ( &cqe->normal, srq_rqpn );
1205 av.lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
1206 av.sl = MLX_GET ( &cqe->normal, sl );
1207 av.gid_present = MLX_GET ( &cqe->normal, g );
1208 memcpy ( &av.gid, &grh->sgid, sizeof ( av.gid ) );
1209 /* Hand off to completion handler */
1210 ib_complete_recv ( ibdev, qp, &av, iobuf, rc );
1217 * Poll completion queue
1219 * @v ibdev Infiniband device
1220 * @v cq Completion queue
1222 static void hermon_poll_cq ( struct ib_device *ibdev,
1223 struct ib_completion_queue *cq ) {
1224 struct hermon *hermon = ib_get_drvdata ( ibdev );
1225 struct hermon_completion_queue *hermon_cq = ib_cq_get_drvdata ( cq );
1226 union hermonprm_completion_entry *cqe;
1227 unsigned int cqe_idx_mask;
1231 /* Look for completion entry */
1232 cqe_idx_mask = ( cq->num_cqes - 1 );
1233 cqe = &hermon_cq->cqe[cq->next_idx & cqe_idx_mask];
1234 if ( MLX_GET ( &cqe->normal, owner ) ^
1235 ( ( cq->next_idx & cq->num_cqes ) ? 1 : 0 ) ) {
1236 /* Entry still owned by hardware; end of poll */
1239 DBGCP ( hermon, "Hermon %p completion:\n", hermon );
1240 DBGCP_HD ( hermon, cqe, sizeof ( *cqe ) );
1242 /* Handle completion */
1243 if ( ( rc = hermon_complete ( ibdev, cq, cqe ) ) != 0 ) {
1244 DBGC ( hermon, "Hermon %p failed to complete: %s\n",
1245 hermon, strerror ( rc ) );
1246 DBGC_HD ( hermon, cqe, sizeof ( *cqe ) );
1249 /* Update completion queue's index */
1252 /* Update doorbell record */
1253 MLX_FILL_1 ( &hermon_cq->doorbell, 0, update_ci,
1254 ( cq->next_idx & 0x00ffffffUL ) );
1258 /***************************************************************************
1262 ***************************************************************************
1266 * Create event queue
1268 * @v hermon Hermon device
1269 * @ret rc Return status code
1271 static int hermon_create_eq ( struct hermon *hermon ) {
1272 struct hermon_event_queue *hermon_eq = &hermon->eq;
1273 struct hermonprm_eqc eqctx;
1274 struct hermonprm_event_mask mask;
1278 /* Select event queue number */
1279 hermon_eq->eqn = ( 4 * hermon->cap.reserved_uars );
1280 if ( hermon_eq->eqn < hermon->cap.reserved_eqs )
1281 hermon_eq->eqn = hermon->cap.reserved_eqs;
1283 /* Calculate doorbell address */
1284 hermon_eq->doorbell =
1285 ( hermon->uar + HERMON_DB_EQ_OFFSET ( hermon_eq->eqn ) );
1287 /* Allocate event queue itself */
1288 hermon_eq->eqe_size =
1289 ( HERMON_NUM_EQES * sizeof ( hermon_eq->eqe[0] ) );
1290 hermon_eq->eqe = malloc_dma ( hermon_eq->eqe_size,
1291 sizeof ( hermon_eq->eqe[0] ) );
1292 if ( ! hermon_eq->eqe ) {
1296 memset ( hermon_eq->eqe, 0, hermon_eq->eqe_size );
1297 for ( i = 0 ; i < HERMON_NUM_EQES ; i++ ) {
1298 MLX_FILL_1 ( &hermon_eq->eqe[i].generic, 7, owner, 1 );
1302 /* Allocate MTT entries */
1303 if ( ( rc = hermon_alloc_mtt ( hermon, hermon_eq->eqe,
1304 hermon_eq->eqe_size,
1305 &hermon_eq->mtt ) ) != 0 )
1308 /* Hand queue over to hardware */
1309 memset ( &eqctx, 0, sizeof ( eqctx ) );
1310 MLX_FILL_1 ( &eqctx, 0, st, 0xa /* "Fired" */ );
1311 MLX_FILL_1 ( &eqctx, 2,
1312 page_offset, ( hermon_eq->mtt.page_offset >> 5 ) );
1313 MLX_FILL_1 ( &eqctx, 3, log_eq_size, fls ( HERMON_NUM_EQES - 1 ) );
1314 MLX_FILL_1 ( &eqctx, 7, mtt_base_addr_l,
1315 ( hermon_eq->mtt.mtt_base_addr >> 3 ) );
1316 if ( ( rc = hermon_cmd_sw2hw_eq ( hermon, hermon_eq->eqn,
1318 DBGC ( hermon, "Hermon %p SW2HW_EQ failed: %s\n",
1319 hermon, strerror ( rc ) );
1323 /* Map events to this event queue */
1324 memset ( &mask, 0, sizeof ( mask ) );
1325 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1326 if ( ( rc = hermon_cmd_map_eq ( hermon,
1327 ( HERMON_MAP_EQ | hermon_eq->eqn ),
1329 DBGC ( hermon, "Hermon %p MAP_EQ failed: %s\n",
1330 hermon, strerror ( rc ) );
1334 DBGC ( hermon, "Hermon %p EQN %#lx ring at [%p,%p])\n",
1335 hermon, hermon_eq->eqn, hermon_eq->eqe,
1336 ( ( ( void * ) hermon_eq->eqe ) + hermon_eq->eqe_size ) );
1340 hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn, &eqctx );
1342 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1344 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1346 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1351 * Destroy event queue
1353 * @v hermon Hermon device
1355 static void hermon_destroy_eq ( struct hermon *hermon ) {
1356 struct hermon_event_queue *hermon_eq = &hermon->eq;
1357 struct hermonprm_eqc eqctx;
1358 struct hermonprm_event_mask mask;
1361 /* Unmap events from event queue */
1362 memset ( &mask, 0, sizeof ( mask ) );
1363 MLX_FILL_1 ( &mask, 1, port_state_change, 1 );
1364 if ( ( rc = hermon_cmd_map_eq ( hermon,
1365 ( HERMON_UNMAP_EQ | hermon_eq->eqn ),
1367 DBGC ( hermon, "Hermon %p FATAL MAP_EQ failed to unmap: %s\n",
1368 hermon, strerror ( rc ) );
1369 /* Continue; HCA may die but system should survive */
1372 /* Take ownership back from hardware */
1373 if ( ( rc = hermon_cmd_hw2sw_eq ( hermon, hermon_eq->eqn,
1375 DBGC ( hermon, "Hermon %p FATAL HW2SW_EQ failed: %s\n",
1376 hermon, strerror ( rc ) );
1377 /* Leak memory and return; at least we avoid corruption */
1381 /* Free MTT entries */
1382 hermon_free_mtt ( hermon, &hermon_eq->mtt );
1385 free_dma ( hermon_eq->eqe, hermon_eq->eqe_size );
1386 memset ( hermon_eq, 0, sizeof ( *hermon_eq ) );
1390 * Handle port state event
1392 * @v hermon Hermon device
1393 * @v eqe Port state change event queue entry
1395 static void hermon_event_port_state_change ( struct hermon *hermon,
1396 union hermonprm_event_entry *eqe){
1400 /* Get port and link status */
1401 port = ( MLX_GET ( &eqe->port_state_change, data.p ) - 1 );
1402 link_up = ( MLX_GET ( &eqe->generic, event_sub_type ) & 0x04 );
1403 DBGC ( hermon, "Hermon %p port %d link %s\n", hermon, ( port + 1 ),
1404 ( link_up ? "up" : "down" ) );
1407 if ( port >= HERMON_NUM_PORTS ) {
1408 DBGC ( hermon, "Hermon %p port %d does not exist!\n",
1409 hermon, ( port + 1 ) );
1413 /* Update MAD parameters */
1414 ib_smc_update ( hermon->ibdev[port], hermon_mad );
1416 /* Notify Infiniband core of link state change */
1417 ib_link_state_changed ( hermon->ibdev[port] );
1423 * @v ibdev Infiniband device
1425 static void hermon_poll_eq ( struct ib_device *ibdev ) {
1426 struct hermon *hermon = ib_get_drvdata ( ibdev );
1427 struct hermon_event_queue *hermon_eq = &hermon->eq;
1428 union hermonprm_event_entry *eqe;
1429 union hermonprm_doorbell_register db_reg;
1430 unsigned int eqe_idx_mask;
1431 unsigned int event_type;
1434 /* Look for event entry */
1435 eqe_idx_mask = ( HERMON_NUM_EQES - 1 );
1436 eqe = &hermon_eq->eqe[hermon_eq->next_idx & eqe_idx_mask];
1437 if ( MLX_GET ( &eqe->generic, owner ) ^
1438 ( ( hermon_eq->next_idx & HERMON_NUM_EQES ) ? 1 : 0 ) ) {
1439 /* Entry still owned by hardware; end of poll */
1442 DBGCP ( hermon, "Hermon %p event:\n", hermon );
1443 DBGCP_HD ( hermon, eqe, sizeof ( *eqe ) );
1446 event_type = MLX_GET ( &eqe->generic, event_type );
1447 switch ( event_type ) {
1448 case HERMON_EV_PORT_STATE_CHANGE:
1449 hermon_event_port_state_change ( hermon, eqe );
1452 DBGC ( hermon, "Hermon %p unrecognised event type "
1453 "%#x:\n", hermon, event_type );
1454 DBGC_HD ( hermon, eqe, sizeof ( *eqe ) );
1458 /* Update event queue's index */
1459 hermon_eq->next_idx++;
1462 MLX_FILL_1 ( &db_reg.event, 0,
1463 ci, ( hermon_eq->next_idx & 0x00ffffffUL ) );
1464 DBGCP ( hermon, "Ringing doorbell %08lx with %08x\n",
1465 virt_to_phys ( hermon_eq->doorbell ),
1467 writel ( db_reg.dword[0], hermon_eq->doorbell );
1471 /***************************************************************************
1473 * Infiniband link-layer operations
1475 ***************************************************************************
1479 * Initialise Infiniband link
1481 * @v ibdev Infiniband device
1482 * @ret rc Return status code
1484 static int hermon_open ( struct ib_device *ibdev ) {
1485 struct hermon *hermon = ib_get_drvdata ( ibdev );
1486 struct hermonprm_init_port init_port;
1489 memset ( &init_port, 0, sizeof ( init_port ) );
1490 MLX_FILL_2 ( &init_port, 0,
1493 MLX_FILL_2 ( &init_port, 1,
1494 mtu, HERMON_MTU_2048,
1496 MLX_FILL_1 ( &init_port, 2, max_pkey, 64 );
1497 if ( ( rc = hermon_cmd_init_port ( hermon, ibdev->port,
1498 &init_port ) ) != 0 ) {
1499 DBGC ( hermon, "Hermon %p could not intialise port: %s\n",
1500 hermon, strerror ( rc ) );
1504 /* Update MAD parameters */
1505 ib_smc_update ( ibdev, hermon_mad );
1511 * Close Infiniband link
1513 * @v ibdev Infiniband device
1515 static void hermon_close ( struct ib_device *ibdev ) {
1516 struct hermon *hermon = ib_get_drvdata ( ibdev );
1519 if ( ( rc = hermon_cmd_close_port ( hermon, ibdev->port ) ) != 0 ) {
1520 DBGC ( hermon, "Hermon %p could not close port: %s\n",
1521 hermon, strerror ( rc ) );
1522 /* Nothing we can do about this */
1526 /***************************************************************************
1528 * Multicast group operations
1530 ***************************************************************************
1534 * Attach to multicast group
1536 * @v ibdev Infiniband device
1538 * @v gid Multicast GID
1539 * @ret rc Return status code
1541 static int hermon_mcast_attach ( struct ib_device *ibdev,
1542 struct ib_queue_pair *qp,
1543 struct ib_gid *gid ) {
1544 struct hermon *hermon = ib_get_drvdata ( ibdev );
1545 struct hermonprm_mgm_hash hash;
1546 struct hermonprm_mcg_entry mcg;
1550 /* Generate hash table index */
1551 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1552 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1553 hermon, strerror ( rc ) );
1556 index = MLX_GET ( &hash, hash );
1558 /* Check for existing hash table entry */
1559 if ( ( rc = hermon_cmd_read_mcg ( hermon, index, &mcg ) ) != 0 ) {
1560 DBGC ( hermon, "Hermon %p could not read MCG %#x: %s\n",
1561 hermon, index, strerror ( rc ) );
1564 if ( MLX_GET ( &mcg, hdr.members_count ) != 0 ) {
1565 /* FIXME: this implementation allows only a single QP
1566 * per multicast group, and doesn't handle hash
1567 * collisions. Sufficient for IPoIB but may need to
1568 * be extended in future.
1570 DBGC ( hermon, "Hermon %p MGID index %#x already in use\n",
1575 /* Update hash table entry */
1576 MLX_FILL_1 ( &mcg, 1, hdr.members_count, 1 );
1577 MLX_FILL_1 ( &mcg, 8, qp[0].qpn, qp->qpn );
1578 memcpy ( &mcg.u.dwords[4], gid, sizeof ( *gid ) );
1579 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1580 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1581 hermon, index, strerror ( rc ) );
1589 * Detach from multicast group
1591 * @v ibdev Infiniband device
1593 * @v gid Multicast GID
1595 static void hermon_mcast_detach ( struct ib_device *ibdev,
1596 struct ib_queue_pair *qp __unused,
1597 struct ib_gid *gid ) {
1598 struct hermon *hermon = ib_get_drvdata ( ibdev );
1599 struct hermonprm_mgm_hash hash;
1600 struct hermonprm_mcg_entry mcg;
1604 /* Generate hash table index */
1605 if ( ( rc = hermon_cmd_mgid_hash ( hermon, gid, &hash ) ) != 0 ) {
1606 DBGC ( hermon, "Hermon %p could not hash GID: %s\n",
1607 hermon, strerror ( rc ) );
1610 index = MLX_GET ( &hash, hash );
1612 /* Clear hash table entry */
1613 memset ( &mcg, 0, sizeof ( mcg ) );
1614 if ( ( rc = hermon_cmd_write_mcg ( hermon, index, &mcg ) ) != 0 ) {
1615 DBGC ( hermon, "Hermon %p could not write MCG %#x: %s\n",
1616 hermon, index, strerror ( rc ) );
1621 /** Hermon Infiniband operations */
1622 static struct ib_device_operations hermon_ib_operations = {
1623 .create_cq = hermon_create_cq,
1624 .destroy_cq = hermon_destroy_cq,
1625 .create_qp = hermon_create_qp,
1626 .modify_qp = hermon_modify_qp,
1627 .destroy_qp = hermon_destroy_qp,
1628 .post_send = hermon_post_send,
1629 .post_recv = hermon_post_recv,
1630 .poll_cq = hermon_poll_cq,
1631 .poll_eq = hermon_poll_eq,
1632 .open = hermon_open,
1633 .close = hermon_close,
1634 .mcast_attach = hermon_mcast_attach,
1635 .mcast_detach = hermon_mcast_detach,
1638 /***************************************************************************
1642 ***************************************************************************
1646 * Map virtual to physical address for firmware usage
1648 * @v hermon Hermon device
1649 * @v map Mapping function
1650 * @v va Virtual address
1651 * @v pa Physical address
1652 * @v len Length of region
1653 * @ret rc Return status code
1655 static int hermon_map_vpm ( struct hermon *hermon,
1656 int ( *map ) ( struct hermon *hermon,
1657 const struct hermonprm_virtual_physical_mapping* ),
1658 uint64_t va, physaddr_t pa, size_t len ) {
1659 struct hermonprm_virtual_physical_mapping mapping;
1662 assert ( ( va & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1663 assert ( ( pa & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1664 assert ( ( len & ( HERMON_PAGE_SIZE - 1 ) ) == 0 );
1667 memset ( &mapping, 0, sizeof ( mapping ) );
1668 MLX_FILL_1 ( &mapping, 0, va_h, ( va >> 32 ) );
1669 MLX_FILL_1 ( &mapping, 1, va_l, ( va >> 12 ) );
1670 MLX_FILL_2 ( &mapping, 3,
1672 pa_l, ( pa >> 12 ) );
1673 if ( ( rc = map ( hermon, &mapping ) ) != 0 ) {
1674 DBGC ( hermon, "Hermon %p could not map %llx => %lx: "
1675 "%s\n", hermon, va, pa, strerror ( rc ) );
1678 pa += HERMON_PAGE_SIZE;
1679 va += HERMON_PAGE_SIZE;
1680 len -= HERMON_PAGE_SIZE;
1687 * Start firmware running
1689 * @v hermon Hermon device
1690 * @ret rc Return status code
1692 static int hermon_start_firmware ( struct hermon *hermon ) {
1693 struct hermonprm_query_fw fw;
1694 unsigned int fw_pages;
1699 /* Get firmware parameters */
1700 if ( ( rc = hermon_cmd_query_fw ( hermon, &fw ) ) != 0 ) {
1701 DBGC ( hermon, "Hermon %p could not query firmware: %s\n",
1702 hermon, strerror ( rc ) );
1705 DBGC ( hermon, "Hermon %p firmware version %d.%d.%d\n", hermon,
1706 MLX_GET ( &fw, fw_rev_major ), MLX_GET ( &fw, fw_rev_minor ),
1707 MLX_GET ( &fw, fw_rev_subminor ) );
1708 fw_pages = MLX_GET ( &fw, fw_pages );
1709 DBGC ( hermon, "Hermon %p requires %d pages (%d kB) for firmware\n",
1710 hermon, fw_pages, ( fw_pages * ( HERMON_PAGE_SIZE / 1024 ) ) );
1712 /* Allocate firmware pages and map firmware area */
1713 fw_size = ( fw_pages * HERMON_PAGE_SIZE );
1714 hermon->firmware_area = umalloc ( fw_size );
1715 if ( ! hermon->firmware_area ) {
1719 fw_base = user_to_phys ( hermon->firmware_area, 0 );
1720 DBGC ( hermon, "Hermon %p firmware area at physical [%lx,%lx)\n",
1721 hermon, fw_base, ( fw_base + fw_size ) );
1722 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_fa,
1723 0, fw_base, fw_size ) ) != 0 ) {
1724 DBGC ( hermon, "Hermon %p could not map firmware: %s\n",
1725 hermon, strerror ( rc ) );
1729 /* Start firmware */
1730 if ( ( rc = hermon_cmd_run_fw ( hermon ) ) != 0 ) {
1731 DBGC ( hermon, "Hermon %p could not run firmware: %s\n",
1732 hermon, strerror ( rc ) );
1736 DBGC ( hermon, "Hermon %p firmware started\n", hermon );
1741 hermon_cmd_unmap_fa ( hermon );
1742 ufree ( hermon->firmware_area );
1743 hermon->firmware_area = UNULL;
1750 * Stop firmware running
1752 * @v hermon Hermon device
1754 static void hermon_stop_firmware ( struct hermon *hermon ) {
1757 if ( ( rc = hermon_cmd_unmap_fa ( hermon ) ) != 0 ) {
1758 DBGC ( hermon, "Hermon %p FATAL could not stop firmware: %s\n",
1759 hermon, strerror ( rc ) );
1760 /* Leak memory and return; at least we avoid corruption */
1763 ufree ( hermon->firmware_area );
1764 hermon->firmware_area = UNULL;
1767 /***************************************************************************
1769 * Infinihost Context Memory management
1771 ***************************************************************************
1777 * @v hermon Hermon device
1778 * @ret rc Return status code
1780 static int hermon_get_cap ( struct hermon *hermon ) {
1781 struct hermonprm_query_dev_cap dev_cap;
1784 if ( ( rc = hermon_cmd_query_dev_cap ( hermon, &dev_cap ) ) != 0 ) {
1785 DBGC ( hermon, "Hermon %p could not get device limits: %s\n",
1786 hermon, strerror ( rc ) );
1790 hermon->cap.cmpt_entry_size = MLX_GET ( &dev_cap, c_mpt_entry_sz );
1791 hermon->cap.reserved_qps =
1792 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_qps ) );
1793 hermon->cap.qpc_entry_size = MLX_GET ( &dev_cap, qpc_entry_sz );
1794 hermon->cap.altc_entry_size = MLX_GET ( &dev_cap, altc_entry_sz );
1795 hermon->cap.auxc_entry_size = MLX_GET ( &dev_cap, aux_entry_sz );
1796 hermon->cap.reserved_srqs =
1797 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_srqs ) );
1798 hermon->cap.srqc_entry_size = MLX_GET ( &dev_cap, srq_entry_sz );
1799 hermon->cap.reserved_cqs =
1800 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_cqs ) );
1801 hermon->cap.cqc_entry_size = MLX_GET ( &dev_cap, cqc_entry_sz );
1802 hermon->cap.reserved_eqs = MLX_GET ( &dev_cap, num_rsvd_eqs );
1803 hermon->cap.eqc_entry_size = MLX_GET ( &dev_cap, eqc_entry_sz );
1804 hermon->cap.reserved_mtts =
1805 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mtts ) );
1806 hermon->cap.mtt_entry_size = MLX_GET ( &dev_cap, mtt_entry_sz );
1807 hermon->cap.reserved_mrws =
1808 ( 1 << MLX_GET ( &dev_cap, log2_rsvd_mrws ) );
1809 hermon->cap.dmpt_entry_size = MLX_GET ( &dev_cap, d_mpt_entry_sz );
1810 hermon->cap.reserved_uars = MLX_GET ( &dev_cap, num_rsvd_uars );
1818 * @v log_num_entries Log2 of the number of entries
1819 * @v entry_size Entry size
1820 * @ret usage Usage size in ICM
1822 static size_t icm_usage ( unsigned int log_num_entries, size_t entry_size ) {
1825 usage = ( ( 1 << log_num_entries ) * entry_size );
1826 usage = ( ( usage + HERMON_PAGE_SIZE - 1 ) &
1827 ~( HERMON_PAGE_SIZE - 1 ) );
1834 * @v hermon Hermon device
1835 * @v init_hca INIT_HCA structure to fill in
1836 * @ret rc Return status code
1838 static int hermon_alloc_icm ( struct hermon *hermon,
1839 struct hermonprm_init_hca *init_hca ) {
1840 struct hermonprm_scalar_parameter icm_size;
1841 struct hermonprm_scalar_parameter icm_aux_size;
1842 uint64_t icm_offset = 0;
1843 unsigned int log_num_qps, log_num_srqs, log_num_cqs, log_num_eqs;
1844 unsigned int log_num_mtts, log_num_mpts;
1845 size_t cmpt_max_len;
1846 size_t qp_cmpt_len, srq_cmpt_len, cq_cmpt_len, eq_cmpt_len;
1847 size_t icm_len, icm_aux_len;
1848 physaddr_t icm_phys;
1853 * Start by carving up the ICM virtual address space
1857 /* Calculate number of each object type within ICM */
1858 log_num_qps = fls ( hermon->cap.reserved_qps + HERMON_MAX_QPS - 1 );
1859 log_num_srqs = fls ( hermon->cap.reserved_srqs - 1 );
1860 log_num_cqs = fls ( hermon->cap.reserved_cqs + HERMON_MAX_CQS - 1 );
1861 log_num_eqs = fls ( hermon->cap.reserved_eqs + HERMON_MAX_EQS - 1 );
1862 log_num_mtts = fls ( hermon->cap.reserved_mtts + HERMON_MAX_MTTS - 1 );
1864 /* ICM starts with the cMPT tables, which are sparse */
1865 cmpt_max_len = ( HERMON_CMPT_MAX_ENTRIES *
1866 ( ( uint64_t ) hermon->cap.cmpt_entry_size ) );
1867 qp_cmpt_len = icm_usage ( log_num_qps, hermon->cap.cmpt_entry_size );
1868 hermon->icm_map[HERMON_ICM_QP_CMPT].offset = icm_offset;
1869 hermon->icm_map[HERMON_ICM_QP_CMPT].len = qp_cmpt_len;
1870 icm_offset += cmpt_max_len;
1871 srq_cmpt_len = icm_usage ( log_num_srqs, hermon->cap.cmpt_entry_size );
1872 hermon->icm_map[HERMON_ICM_SRQ_CMPT].offset = icm_offset;
1873 hermon->icm_map[HERMON_ICM_SRQ_CMPT].len = srq_cmpt_len;
1874 icm_offset += cmpt_max_len;
1875 cq_cmpt_len = icm_usage ( log_num_cqs, hermon->cap.cmpt_entry_size );
1876 hermon->icm_map[HERMON_ICM_CQ_CMPT].offset = icm_offset;
1877 hermon->icm_map[HERMON_ICM_CQ_CMPT].len = cq_cmpt_len;
1878 icm_offset += cmpt_max_len;
1879 eq_cmpt_len = icm_usage ( log_num_eqs, hermon->cap.cmpt_entry_size );
1880 hermon->icm_map[HERMON_ICM_EQ_CMPT].offset = icm_offset;
1881 hermon->icm_map[HERMON_ICM_EQ_CMPT].len = eq_cmpt_len;
1882 icm_offset += cmpt_max_len;
1884 hermon->icm_map[HERMON_ICM_OTHER].offset = icm_offset;
1886 /* Queue pair contexts */
1887 MLX_FILL_1 ( init_hca, 12,
1888 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_h,
1889 ( icm_offset >> 32 ) );
1890 MLX_FILL_2 ( init_hca, 13,
1891 qpc_eec_cqc_eqc_rdb_parameters.qpc_base_addr_l,
1892 ( icm_offset >> 5 ),
1893 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_qp,
1895 DBGC ( hermon, "Hermon %p ICM QPC base = %llx\n", hermon, icm_offset );
1896 icm_offset += icm_usage ( log_num_qps, hermon->cap.qpc_entry_size );
1898 /* Extended alternate path contexts */
1899 MLX_FILL_1 ( init_hca, 24,
1900 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_h,
1901 ( icm_offset >> 32 ) );
1902 MLX_FILL_1 ( init_hca, 25,
1903 qpc_eec_cqc_eqc_rdb_parameters.altc_base_addr_l,
1905 DBGC ( hermon, "Hermon %p ICM ALTC base = %llx\n", hermon, icm_offset);
1906 icm_offset += icm_usage ( log_num_qps,
1907 hermon->cap.altc_entry_size );
1909 /* Extended auxiliary contexts */
1910 MLX_FILL_1 ( init_hca, 28,
1911 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_h,
1912 ( icm_offset >> 32 ) );
1913 MLX_FILL_1 ( init_hca, 29,
1914 qpc_eec_cqc_eqc_rdb_parameters.auxc_base_addr_l,
1916 DBGC ( hermon, "Hermon %p ICM AUXC base = %llx\n", hermon, icm_offset);
1917 icm_offset += icm_usage ( log_num_qps,
1918 hermon->cap.auxc_entry_size );
1920 /* Shared receive queue contexts */
1921 MLX_FILL_1 ( init_hca, 18,
1922 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_h,
1923 ( icm_offset >> 32 ) );
1924 MLX_FILL_2 ( init_hca, 19,
1925 qpc_eec_cqc_eqc_rdb_parameters.srqc_base_addr_l,
1926 ( icm_offset >> 5 ),
1927 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_srq,
1929 DBGC ( hermon, "Hermon %p ICM SRQC base = %llx\n", hermon, icm_offset);
1930 icm_offset += icm_usage ( log_num_srqs,
1931 hermon->cap.srqc_entry_size );
1933 /* Completion queue contexts */
1934 MLX_FILL_1 ( init_hca, 20,
1935 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_h,
1936 ( icm_offset >> 32 ) );
1937 MLX_FILL_2 ( init_hca, 21,
1938 qpc_eec_cqc_eqc_rdb_parameters.cqc_base_addr_l,
1939 ( icm_offset >> 5 ),
1940 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_cq,
1942 DBGC ( hermon, "Hermon %p ICM CQC base = %llx\n", hermon, icm_offset );
1943 icm_offset += icm_usage ( log_num_cqs, hermon->cap.cqc_entry_size );
1945 /* Event queue contexts */
1946 MLX_FILL_1 ( init_hca, 32,
1947 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_h,
1948 ( icm_offset >> 32 ) );
1949 MLX_FILL_2 ( init_hca, 33,
1950 qpc_eec_cqc_eqc_rdb_parameters.eqc_base_addr_l,
1951 ( icm_offset >> 5 ),
1952 qpc_eec_cqc_eqc_rdb_parameters.log_num_of_eq,
1954 DBGC ( hermon, "Hermon %p ICM EQC base = %llx\n", hermon, icm_offset );
1955 icm_offset += icm_usage ( log_num_eqs, hermon->cap.eqc_entry_size );
1957 /* Memory translation table */
1958 MLX_FILL_1 ( init_hca, 64,
1959 tpt_parameters.mtt_base_addr_h, ( icm_offset >> 32 ) );
1960 MLX_FILL_1 ( init_hca, 65,
1961 tpt_parameters.mtt_base_addr_l, icm_offset );
1962 DBGC ( hermon, "Hermon %p ICM MTT base = %llx\n", hermon, icm_offset );
1963 icm_offset += icm_usage ( log_num_mtts,
1964 hermon->cap.mtt_entry_size );
1966 /* Memory protection table */
1967 log_num_mpts = fls ( hermon->cap.reserved_mrws + 1 - 1 );
1968 MLX_FILL_1 ( init_hca, 60,
1969 tpt_parameters.dmpt_base_adr_h, ( icm_offset >> 32 ) );
1970 MLX_FILL_1 ( init_hca, 61,
1971 tpt_parameters.dmpt_base_adr_l, icm_offset );
1972 MLX_FILL_1 ( init_hca, 62,
1973 tpt_parameters.log_dmpt_sz, log_num_mpts );
1974 DBGC ( hermon, "Hermon %p ICM DMPT base = %llx\n", hermon, icm_offset);
1975 icm_offset += icm_usage ( log_num_mpts,
1976 hermon->cap.dmpt_entry_size );
1978 /* Multicast table */
1979 MLX_FILL_1 ( init_hca, 48,
1980 multicast_parameters.mc_base_addr_h,
1981 ( icm_offset >> 32 ) );
1982 MLX_FILL_1 ( init_hca, 49,
1983 multicast_parameters.mc_base_addr_l, icm_offset );
1984 MLX_FILL_1 ( init_hca, 52,
1985 multicast_parameters.log_mc_table_entry_sz,
1986 fls ( sizeof ( struct hermonprm_mcg_entry ) - 1 ) );
1987 MLX_FILL_1 ( init_hca, 53,
1988 multicast_parameters.log_mc_table_hash_sz, 3 );
1989 MLX_FILL_1 ( init_hca, 54,
1990 multicast_parameters.log_mc_table_sz, 3 );
1991 DBGC ( hermon, "Hermon %p ICM MC base = %llx\n", hermon, icm_offset );
1992 icm_offset += ( ( 8 * sizeof ( struct hermonprm_mcg_entry ) +
1993 HERMON_PAGE_SIZE - 1 ) & ~( HERMON_PAGE_SIZE - 1 ) );
1995 hermon->icm_map[HERMON_ICM_OTHER].len =
1996 ( icm_offset - hermon->icm_map[HERMON_ICM_OTHER].offset );
1999 * Allocate and map physical memory for (portions of) ICM
2002 * ICM AUX area (aligned to its own size)
2007 /* Calculate physical memory required for ICM */
2009 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2010 icm_len += hermon->icm_map[i].len;
2013 /* Get ICM auxiliary area size */
2014 memset ( &icm_size, 0, sizeof ( icm_size ) );
2015 MLX_FILL_1 ( &icm_size, 0, value_hi, ( icm_offset >> 32 ) );
2016 MLX_FILL_1 ( &icm_size, 1, value, icm_offset );
2017 if ( ( rc = hermon_cmd_set_icm_size ( hermon, &icm_size,
2018 &icm_aux_size ) ) != 0 ) {
2019 DBGC ( hermon, "Hermon %p could not set ICM size: %s\n",
2020 hermon, strerror ( rc ) );
2021 goto err_set_icm_size;
2023 icm_aux_len = ( MLX_GET ( &icm_aux_size, value ) * HERMON_PAGE_SIZE );
2025 /* Allocate ICM data and auxiliary area */
2026 DBGC ( hermon, "Hermon %p requires %zd kB ICM and %zd kB AUX ICM\n",
2027 hermon, ( icm_len / 1024 ), ( icm_aux_len / 1024 ) );
2028 hermon->icm = umalloc ( icm_aux_len + icm_len );
2029 if ( ! hermon->icm ) {
2033 icm_phys = user_to_phys ( hermon->icm, 0 );
2035 /* Map ICM auxiliary area */
2036 DBGC ( hermon, "Hermon %p mapping ICM AUX => %08lx\n",
2038 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm_aux,
2039 0, icm_phys, icm_aux_len ) ) != 0 ) {
2040 DBGC ( hermon, "Hermon %p could not map AUX ICM: %s\n",
2041 hermon, strerror ( rc ) );
2042 goto err_map_icm_aux;
2044 icm_phys += icm_aux_len;
2047 for ( i = 0 ; i < HERMON_ICM_NUM_REGIONS ; i++ ) {
2048 DBGC ( hermon, "Hermon %p mapping ICM %llx+%zx => %08lx\n",
2049 hermon, hermon->icm_map[i].offset,
2050 hermon->icm_map[i].len, icm_phys );
2051 if ( ( rc = hermon_map_vpm ( hermon, hermon_cmd_map_icm,
2052 hermon->icm_map[i].offset,
2054 hermon->icm_map[i].len ) ) != 0 ){
2055 DBGC ( hermon, "Hermon %p could not map ICM: %s\n",
2056 hermon, strerror ( rc ) );
2059 icm_phys += hermon->icm_map[i].len;
2065 assert ( i == 0 ); /* We don't handle partial failure at present */
2067 hermon_cmd_unmap_icm_aux ( hermon );
2068 ufree ( hermon->icm );
2069 hermon->icm = UNULL;
2078 * @v hermon Hermon device
2080 static void hermon_free_icm ( struct hermon *hermon ) {
2081 struct hermonprm_scalar_parameter unmap_icm;
2084 for ( i = ( HERMON_ICM_NUM_REGIONS - 1 ) ; i >= 0 ; i-- ) {
2085 memset ( &unmap_icm, 0, sizeof ( unmap_icm ) );
2086 MLX_FILL_1 ( &unmap_icm, 0, value_hi,
2087 ( hermon->icm_map[i].offset >> 32 ) );
2088 MLX_FILL_1 ( &unmap_icm, 1, value,
2089 hermon->icm_map[i].offset );
2090 hermon_cmd_unmap_icm ( hermon,
2091 ( 1 << fls ( ( hermon->icm_map[i].len /
2092 HERMON_PAGE_SIZE ) - 1)),
2095 hermon_cmd_unmap_icm_aux ( hermon );
2096 ufree ( hermon->icm );
2097 hermon->icm = UNULL;
2100 /***************************************************************************
2104 ***************************************************************************
2108 * Set up memory protection table
2110 * @v hermon Hermon device
2111 * @ret rc Return status code
2113 static int hermon_setup_mpt ( struct hermon *hermon ) {
2114 struct hermonprm_mpt mpt;
2119 key = ( hermon->cap.reserved_mrws | HERMON_MKEY_PREFIX );
2120 hermon->reserved_lkey = ( ( key << 8 ) | ( key >> 24 ) );
2122 /* Initialise memory protection table */
2123 memset ( &mpt, 0, sizeof ( mpt ) );
2124 MLX_FILL_4 ( &mpt, 0,
2129 MLX_FILL_1 ( &mpt, 2, mem_key, key );
2130 MLX_FILL_1 ( &mpt, 3, pd, HERMON_GLOBAL_PD );
2131 MLX_FILL_1 ( &mpt, 10, len64, 1 );
2132 if ( ( rc = hermon_cmd_sw2hw_mpt ( hermon,
2133 hermon->cap.reserved_mrws,
2135 DBGC ( hermon, "Hermon %p could not set up MPT: %s\n",
2136 hermon, strerror ( rc ) );
2148 * @ret rc Return status code
2150 static int hermon_probe ( struct pci_device *pci,
2151 const struct pci_device_id *id __unused ) {
2152 struct hermon *hermon;
2153 struct ib_device *ibdev;
2154 struct hermonprm_init_hca init_hca;
2158 /* Allocate Hermon device */
2159 hermon = zalloc ( sizeof ( *hermon ) );
2162 goto err_alloc_hermon;
2164 pci_set_drvdata ( pci, hermon );
2166 /* Allocate Infiniband devices */
2167 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ ) {
2168 ibdev = alloc_ibdev ( 0 );
2171 goto err_alloc_ibdev;
2173 hermon->ibdev[i] = ibdev;
2174 ibdev->op = &hermon_ib_operations;
2175 ibdev->dev = &pci->dev;
2176 ibdev->port = ( HERMON_PORT_BASE + i );
2177 ib_set_drvdata ( ibdev, hermon );
2180 /* Fix up PCI device */
2181 adjust_pci_device ( pci );
2184 hermon->config = ioremap ( pci_bar_start ( pci, HERMON_PCI_CONFIG_BAR),
2185 HERMON_PCI_CONFIG_BAR_SIZE );
2186 hermon->uar = ioremap ( pci_bar_start ( pci, HERMON_PCI_UAR_BAR ),
2187 HERMON_UAR_NON_EQ_PAGE * HERMON_PAGE_SIZE );
2189 /* Allocate space for mailboxes */
2190 hermon->mailbox_in = malloc_dma ( HERMON_MBOX_SIZE,
2191 HERMON_MBOX_ALIGN );
2192 if ( ! hermon->mailbox_in ) {
2194 goto err_mailbox_in;
2196 hermon->mailbox_out = malloc_dma ( HERMON_MBOX_SIZE,
2197 HERMON_MBOX_ALIGN );
2198 if ( ! hermon->mailbox_out ) {
2200 goto err_mailbox_out;
2203 /* Start firmware */
2204 if ( ( rc = hermon_start_firmware ( hermon ) ) != 0 )
2205 goto err_start_firmware;
2207 /* Get device limits */
2208 if ( ( rc = hermon_get_cap ( hermon ) ) != 0 )
2212 memset ( &init_hca, 0, sizeof ( init_hca ) );
2213 if ( ( rc = hermon_alloc_icm ( hermon, &init_hca ) ) != 0 )
2216 /* Initialise HCA */
2217 MLX_FILL_1 ( &init_hca, 0, version, 0x02 /* "Must be 0x02" */ );
2218 MLX_FILL_1 ( &init_hca, 5, udp, 1 );
2219 MLX_FILL_1 ( &init_hca, 74, uar_parameters.log_max_uars, 8 );
2220 if ( ( rc = hermon_cmd_init_hca ( hermon, &init_hca ) ) != 0 ) {
2221 DBGC ( hermon, "Hermon %p could not initialise HCA: %s\n",
2222 hermon, strerror ( rc ) );
2226 /* Set up memory protection */
2227 if ( ( rc = hermon_setup_mpt ( hermon ) ) != 0 )
2230 /* Set up event queue */
2231 if ( ( rc = hermon_create_eq ( hermon ) ) != 0 )
2234 /* Update MAD parameters */
2235 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ )
2236 ib_smc_update ( hermon->ibdev[i], hermon_mad );
2238 /* Register Infiniband devices */
2239 for ( i = 0 ; i < HERMON_NUM_PORTS ; i++ ) {
2240 if ( ( rc = register_ibdev ( hermon->ibdev[i] ) ) != 0 ) {
2241 DBGC ( hermon, "Hermon %p could not register IB "
2242 "device: %s\n", hermon, strerror ( rc ) );
2243 goto err_register_ibdev;
2249 i = HERMON_NUM_PORTS;
2251 for ( i-- ; i >= 0 ; i-- )
2252 unregister_ibdev ( hermon->ibdev[i] );
2253 hermon_destroy_eq ( hermon );
2256 hermon_cmd_close_hca ( hermon );
2258 hermon_free_icm ( hermon );
2261 hermon_stop_firmware ( hermon );
2263 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2265 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2267 i = HERMON_NUM_PORTS;
2269 for ( i-- ; i >= 0 ; i-- )
2270 ibdev_put ( hermon->ibdev[i] );
2281 static void hermon_remove ( struct pci_device *pci ) {
2282 struct hermon *hermon = pci_get_drvdata ( pci );
2285 for ( i = ( HERMON_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
2286 unregister_ibdev ( hermon->ibdev[i] );
2287 hermon_destroy_eq ( hermon );
2288 hermon_cmd_close_hca ( hermon );
2289 hermon_free_icm ( hermon );
2290 hermon_stop_firmware ( hermon );
2291 hermon_stop_firmware ( hermon );
2292 free_dma ( hermon->mailbox_out, HERMON_MBOX_SIZE );
2293 free_dma ( hermon->mailbox_in, HERMON_MBOX_SIZE );
2294 for ( i = ( HERMON_NUM_PORTS - 1 ) ; i >= 0 ; i-- )
2295 ibdev_put ( hermon->ibdev[i] );
2299 static struct pci_device_id hermon_nics[] = {
2300 PCI_ROM ( 0x15b3, 0x6340, "mt25408", "MT25408 HCA driver", 0 ),
2301 PCI_ROM ( 0x15b3, 0x634a, "mt25418", "MT25418 HCA driver", 0 ),
2302 PCI_ROM ( 0x15b3, 0x6732, "mt26418", "MT26418 HCA driver", 0 ),
2303 PCI_ROM ( 0x15b3, 0x673c, "mt26428", "MT26428 HCA driver", 0 ),
2306 struct pci_driver hermon_driver __pci_driver = {
2308 .id_count = ( sizeof ( hermon_nics ) / sizeof ( hermon_nics[0] ) ),
2309 .probe = hermon_probe,
2310 .remove = hermon_remove,