[MLX4] fixed a bug in "livefish" mode. [mlnx: 3091]
authortzachid <tzachid@ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86>
Sun, 7 Sep 2008 14:58:00 +0000 (14:58 +0000)
committertzachid <tzachid@ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86>
Sun, 7 Sep 2008 14:58:00 +0000 (14:58 +0000)
The bug was in returning wrong query_ca results, which caused crashes in some scenarios and incorrect work of applications.

git-svn-id: svn://openib.tc.cornell.edu/gen1/trunk@1556 ad392aa1-c5ef-ae45-8dd8-e69d62a5ef86

hw/mlx4/kernel/bus/net/main.c
hw/mlx4/kernel/hca/ca.c
hw/mlx4/kernel/hca/data.c
hw/mlx4/user/hca/mlx4.c

index 28ca217..2c8554b 100644 (file)
@@ -148,6 +148,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
        int i;
        int num_eth_ports = 0;
        enum mlx4_port_type port_type[MLX4_MAX_PORTS];
+       struct mlx4_dev *mdev = dev;
 
        for (i = 0; i < MLX4_MAX_PORTS; i++) 
                port_type[i] = g.mod_port_type[i];
@@ -244,8 +245,19 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
                if (port_type[i-1] & dev_cap->supported_port_types[i])
                        dev->caps.port_type[i] = port_type[i-1];
                else {
-                       mlx4_err(dev, "Requested port type for port %d "
-                                     "not supported by HW\n", i);
+                       MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
+                               ("Requested port type %#x for port %d is "
+                               "not supported by HW. Supported %#x\n", 
+                               port_type[i-1], i, (int)dev_cap->supported_port_types[i]));
+                       MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
+                               ("Ven %x Dev %d Fw %d.%d.%d, IsBurnDevice %s\n", 
+                               (unsigned)dev->pdev->ven_id, (unsigned)dev->pdev->dev_id,
+                               (int) (dev->caps.fw_ver >> 32),
+                               (int) (dev->caps.fw_ver >> 16) & 0xffff, 
+                               (int) (dev->caps.fw_ver & 0xffff),
+                               mlx4_is_livefish(dev) ? "Y" : "N"
+                               ));
+                       
                        return -ENODEV;
                }
                if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
index 3230a62..18d5528 100644 (file)
@@ -172,8 +172,8 @@ mlnx_query_ca (
                props.max_pd = 1;\r
                props.vendor_id = pdev->ven_id;\r
                props.vendor_part_id = pdev->dev_id;\r
-               status = IB_SUCCESS;\r
-               goto done;\r
+               num_ports = 0;\r
+               goto fill_the_rest;\r
        }\r
 \r
        // query the device\r
@@ -195,6 +195,7 @@ mlnx_query_ca (
                }\r
 \r
        // start calculation of ib_ca_attr_t full size\r
+fill_the_rest: \r
        num_gids = 0;\r
        num_pkeys = 0;\r
        required_size = PTR_ALIGN(sizeof(ib_ca_attr_t)) +\r
@@ -204,7 +205,7 @@ mlnx_query_ca (
                PTR_ALIGN(sizeof(uplink_info_t));       /* uplink info */\r
        \r
        // get port properties\r
-       for (port_num = 0; port_num <= (end_port(p_ibdev) - start_port(p_ibdev)); ++port_num) {\r
+       for (port_num = 0; port_num < num_ports; ++port_num) {\r
                // request\r
                err = p_ibdev->query_port(p_ibdev, (u8)(port_num + start_port(p_ibdev)), &hca_ports[port_num]);\r
                if (err) {\r
@@ -321,6 +322,8 @@ mlnx_query_ca (
        \r
        // !!! GID/PKEY tables must be queried before this call !!!\r
        from_hca_cap(p_ibdev, &props, hca_ports, p_ca_attr);\r
+       if ( hca_is_livefish(hca2fdo(p_hca)) ) \r
+               p_ca_attr->num_ports = 0;\r
 \r
        status = IB_SUCCESS;\r
 \r
@@ -338,7 +341,7 @@ err_user_unsupported:
        if( status != IB_INSUFFICIENT_MEMORY && status != IB_SUCCESS )\r
                HCA_PRINT(TRACE_LEVEL_ERROR, HCA_DBG_SHIM,\r
                ("completes with ERROR status %x\n", status));\r
-done:\r
+\r
        HCA_EXIT(HCA_DBG_SHIM);\r
        return status;\r
 }\r
index 19791df..23f4280 100644 (file)
@@ -320,39 +320,40 @@ from_hca_cap(
        ca_attr_p->num_page_sizes = 1;\r
        ca_attr_p->p_page_size[0] = PAGE_SIZE; // TBD: extract an array of page sizes from HCA cap\r
 \r
-       for (port_num = 0; port_num <= (end_port(ib_dev) - start_port(ib_dev)); ++port_num)\r
-       {\r
-               // Setup port pointers\r
-               ibal_port_p = &ca_attr_p->p_port_attr[port_num];\r
-               mthca_port_p = &hca_ports[port_num];\r
-\r
-               // Port Cabapilities\r
-               cl_memclr(&ibal_port_p->cap, sizeof(ib_port_cap_t));\r
-               from_port_cap(mthca_port_p->port_cap_flags, &ibal_port_p->cap);\r
-\r
-               // Port Atributes\r
-               ibal_port_p->port_num   = (u8)(port_num + start_port(ib_dev));\r
-               ibal_port_p->port_guid  = ibal_port_p->p_gid_table[0].unicast.interface_id;\r
-               ibal_port_p->lid        = cl_ntoh16(mthca_port_p->lid);\r
-               ibal_port_p->lmc        = mthca_port_p->lmc;\r
-               ibal_port_p->max_vls    = mthca_port_p->max_vl_num;\r
-               ibal_port_p->sm_lid     = cl_ntoh16(mthca_port_p->sm_lid);\r
-               ibal_port_p->sm_sl      = mthca_port_p->sm_sl;\r
-               ibal_port_p->link_state = (mthca_port_p->state != 0) ? (uint8_t)mthca_port_p->state : IB_LINK_DOWN;\r
-               ibal_port_p->num_gids   = (uint16_t)mthca_port_p->gid_tbl_len;\r
-               ibal_port_p->num_pkeys  = mthca_port_p->pkey_tbl_len;\r
-               ibal_port_p->pkey_ctr   = (uint16_t)mthca_port_p->bad_pkey_cntr;\r
-               ibal_port_p->qkey_ctr   = (uint16_t)mthca_port_p->qkey_viol_cntr;\r
-               ibal_port_p->max_msg_size = mthca_port_p->max_msg_sz;\r
-               ibal_port_p->mtu = (uint8_t)mthca_port_p->max_mtu;\r
-               ibal_port_p->active_speed = mthca_port_p->active_speed;\r
-               ibal_port_p->phys_state = mthca_port_p->phys_state;\r
-\r
-               ibal_port_p->subnet_timeout = mthca_port_p->subnet_timeout;\r
-               // ibal_port_p->local_ack_timeout = 3; // TBD: currently ~32 usec\r
-               HCA_PRINT(TRACE_LEVEL_VERBOSE, HCA_DBG_SHIM ,("Port %d port_guid 0x%I64x\n",\r
-                       ibal_port_p->port_num, cl_ntoh64(ibal_port_p->port_guid)));\r
-       }\r
+       if ( hca_ports )\r
+               for (port_num = 0; port_num <= (end_port(ib_dev) - start_port(ib_dev)); ++port_num)\r
+               {\r
+                       // Setup port pointers\r
+                       ibal_port_p = &ca_attr_p->p_port_attr[port_num];\r
+                       mthca_port_p = &hca_ports[port_num];\r
+\r
+                       // Port Cabapilities\r
+                       cl_memclr(&ibal_port_p->cap, sizeof(ib_port_cap_t));\r
+                       from_port_cap(mthca_port_p->port_cap_flags, &ibal_port_p->cap);\r
+\r
+                       // Port Atributes\r
+                       ibal_port_p->port_num   = (u8)(port_num + start_port(ib_dev));\r
+                       ibal_port_p->port_guid  = ibal_port_p->p_gid_table[0].unicast.interface_id;\r
+                       ibal_port_p->lid        = cl_ntoh16(mthca_port_p->lid);\r
+                       ibal_port_p->lmc        = mthca_port_p->lmc;\r
+                       ibal_port_p->max_vls    = mthca_port_p->max_vl_num;\r
+                       ibal_port_p->sm_lid     = cl_ntoh16(mthca_port_p->sm_lid);\r
+                       ibal_port_p->sm_sl      = mthca_port_p->sm_sl;\r
+                       ibal_port_p->link_state = (mthca_port_p->state != 0) ? (uint8_t)mthca_port_p->state : IB_LINK_DOWN;\r
+                       ibal_port_p->num_gids   = (uint16_t)mthca_port_p->gid_tbl_len;\r
+                       ibal_port_p->num_pkeys  = mthca_port_p->pkey_tbl_len;\r
+                       ibal_port_p->pkey_ctr   = (uint16_t)mthca_port_p->bad_pkey_cntr;\r
+                       ibal_port_p->qkey_ctr   = (uint16_t)mthca_port_p->qkey_viol_cntr;\r
+                       ibal_port_p->max_msg_size = mthca_port_p->max_msg_sz;\r
+                       ibal_port_p->mtu = (uint8_t)mthca_port_p->max_mtu;\r
+                       ibal_port_p->active_speed = mthca_port_p->active_speed;\r
+                       ibal_port_p->phys_state = mthca_port_p->phys_state;\r
+\r
+                       ibal_port_p->subnet_timeout = mthca_port_p->subnet_timeout;\r
+                       // ibal_port_p->local_ack_timeout = 3; // TBD: currently ~32 usec\r
+                       HCA_PRINT(TRACE_LEVEL_VERBOSE, HCA_DBG_SHIM ,("Port %d port_guid 0x%I64x\n",\r
+                               ibal_port_p->port_num, cl_ntoh64(ibal_port_p->port_guid)));\r
+               }\r
 }\r
 \r
 enum ib_rate to_rate(uint8_t rate)\r
index 2a0f136..7166316 100644 (file)
@@ -47,10 +47,15 @@ struct {
        unsigned                device;\r
 } hca_table[] = {\r
        HCA(MELLANOX, 0x6340),  /* MT25408 "Hermon" SDR */\r
-       HCA(MELLANOX, 0x634a),  /* MT25408 "Hermon" DDR */\r
-       HCA(MELLANOX, 0x6354),  /* MT25408 "Hermon" QDR */\r
-       HCA(MELLANOX, 0x6732),  /* MT25408 "Hermon" DDR PCIe gen2 */\r
-       HCA(MELLANOX, 0x673c),  /* MT25408 "Hermon" QDR PCIe gen2 */\r
+       HCA(MELLANOX, 0x634a),  /* MT25418 "Hermon" DDR */\r
+       HCA(MELLANOX, 0x6732),  /* MT26418 "Hermon" DDR PCIe gen2 */\r
+       HCA(MELLANOX, 0x673c),  /* MT26428 "Hermon" QDR PCIe gen2 */\r
+\r
+       HCA(MELLANOX, 0x6368),  /* MT25448 "Hermon" Ethernet */\r
+       HCA(MELLANOX, 0x6372),  /* MT25458 "Hermon" Ethernet Yatir*/\r
+       HCA(MELLANOX, 0x6750),  /* MT26448 "Hermon" Ethernet PCIe gen2 */\r
+       HCA(MELLANOX, 0x675A),  /* MT26458 "Hermon" Ethernet Yatir PCIe gen2*/\r
+\r
        HCA(MELLANOX, 0x0191),  /* MT25408 "Hermon" livefish mode */ \r
 };\r
 \r