[MLX4] 1) added support for sending large multi-parameter messages to System Event...
[mirror/winof/.git] / hw / mlx4 / kernel / bus / net / main.c
1 /*
2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * OpenIB.org BSD license below:
12  *
13  *     Redistribution and use in source and binary forms, with or
14  *     without modification, are permitted provided that the following
15  *     conditions are met:
16  *
17  *      - Redistributions of source code must retain the above
18  *        copyright notice, this list of conditions and the following
19  *        disclaimer.
20  *
21  *      - Redistributions in binary form must reproduce the above
22  *        copyright notice, this list of conditions and the following
23  *        disclaimer in the documentation and/or other materials
24  *        provided with the distribution.
25  *
26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33  * SOFTWARE.
34  */
35
36
37 #include "mlx4.h"
38 #include "fw.h"
39 #include "icm.h"
40 #include "device.h"
41 #include "doorbell.h"
42 #include "complib\cl_thread.h"
43 #include <mlx4_debug.h>
44
45 #if defined(EVENT_TRACING)
46 #ifdef offsetof
47 #undef offsetof
48 #endif
49 #include "main.tmh"
50 #endif
51
52
53 static struct mlx4_profile default_profile = {
54         1 << 17,        /* num_qp               */
55         1 << 4,         /* rdmarc_per_qp        */
56         1 << 16,        /* num_srq      */
57         1 << 16,        /* num_cq               */
58         1 << 13,        /* num_mcg      */
59         1 << 18,        /* num_mpt      */ 
60         1 << 20         /* num_mtt      */
61 };
62
63 static void process_mod_param_profile(void)
64 {
65         if (g.mod_num_qp)
66                 default_profile.num_qp = 1 << g.mod_num_qp;
67
68         if (g.mod_rdmarc_per_qp)
69                 default_profile.rdmarc_per_qp = 1 << g.mod_rdmarc_per_qp;
70
71         if (g.mod_num_srq)
72                 default_profile.num_srq = 1 << g.mod_num_srq;
73
74         if (g.mod_num_cq)
75                 default_profile.num_cq = 1 << g.mod_num_cq;
76
77         if (g.mod_num_mcg)
78                 default_profile.num_mcg = 1 << g.mod_num_mcg;
79
80         if (g.mod_num_mpt)
81                 default_profile.num_mpt = 1 << g.mod_num_mpt;
82
83         if (g.mod_num_mtt)
84                 default_profile.num_mtt = 1 << g.mod_num_mtt;
85 }
86
87 static struct pci_device_id 
88 mlx4_pci_table[] = {
89         HCA(MELLANOX, SDR,              HERMON),
90         HCA(MELLANOX, DDR,              HERMON),
91         HCA(MELLANOX, ETH,              HERMON),
92         HCA(MELLANOX, ETH_YATIR,                HERMON),
93         HCA(MELLANOX, DDR_G2,           HERMON),
94         HCA(MELLANOX, QDR_G2,           HERMON),
95         HCA(MELLANOX, ETH_G2,           HERMON),
96         HCA(MELLANOX, ETH_YATIR_G2,     HERMON),
97         HCA(MELLANOX, ETH_B0_G2,        HERMON),
98         HCA(MELLANOX, BD,               LIVEFISH),
99 };
100 #define MLX4_PCI_TABLE_SIZE (sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))
101
102
103 static int mlx4_check_port_params(struct mlx4_dev *dev,
104                                   enum mlx4_port_type *port_type)
105 {
106         if (port_type[0] != port_type[1] &&
107             !(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
108                 mlx4_err(dev, "Only same port types supported "
109                               "on this HCA, aborting.\n");
110                 return -EINVAL;
111         }
112         if ((port_type[0] == MLX4_PORT_TYPE_ETH) &&
113             (port_type[1] == MLX4_PORT_TYPE_IB)) {
114                 mlx4_err(dev, "eth-ib configuration is not supported.\n");
115                 return -EINVAL;
116         }
117         return 0;
118 }
119
120 static void mlx4_str2port_type(WCHAR **port_str,
121                                enum mlx4_port_type *port_type)
122 {
123         int i;
124
125         for (i = 0; i < MLX4_MAX_PORTS; i++) {
126                 if (!wcscmp(port_str[i], L"eth"))
127                         port_type[i] = MLX4_PORT_TYPE_ETH;
128                 else
129                         port_type[i] = MLX4_PORT_TYPE_IB;
130         }
131 }
132
133 int mlx4_count_ib_ports(struct mlx4_dev *dev)
134 {
135         int i;
136         int count = 0;
137
138         for (i = 0; i < MLX4_MAX_PORTS; i++) {
139                 if (dev->caps.port_type[i+1] == MLX4_PORT_TYPE_IB) {
140                         count++;
141                 }
142         }
143         return count;
144 }
145
146 BOOLEAN mlx4_is_eth_port(struct mlx4_dev *dev, int port_number)
147 {
148         if (dev->caps.port_type[port_number+1] == MLX4_PORT_TYPE_ETH) {
149                 return TRUE;
150         }
151         return FALSE;
152 }
153
154 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
155 {
156         int err;
157         int i;
158         int num_eth_ports = 0;
159         enum mlx4_port_type port_type[MLX4_MAX_PORTS];
160         struct mlx4_dev *mdev = dev;
161
162         for (i = 0; i < MLX4_MAX_PORTS; i++) 
163                 port_type[i] = dev->dev_params.mod_port_type[i];
164
165         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
166         if (err) {
167                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
168                 return err;
169         }
170
171         if (dev_cap->min_page_sz > PAGE_SIZE) {
172                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
173                          "kernel PAGE_SIZE of %ld, aborting.\n",
174                          dev_cap->min_page_sz, PAGE_SIZE);
175                 return -ENODEV;
176         }
177         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
178                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
179                          "aborting.\n",
180                          dev_cap->num_ports, MLX4_MAX_PORTS);
181                 return -ENODEV;
182         }
183
184         if (dev_cap->uar_size > (int)pci_resource_len(dev->pdev, 2)) {
185                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
186                          "PCI resource 2 size of 0x%llx, aborting.\n",
187                          dev_cap->uar_size,
188                          (unsigned long long) pci_resource_len(dev->pdev, 2));
189                 return -ENODEV;
190         }
191
192         dev->caps.num_ports          = dev_cap->num_ports;
193         for (i = 1; i <= dev->caps.num_ports; ++i) {
194                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
195                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];       
196                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
197                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
198                 dev->caps.port_width_cap[i] = (u8)dev_cap->max_port_width[i];
199                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
200                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];        
201         }
202
203         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
204         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
205         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
206         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
207         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
208         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
209         dev->caps.max_wqes           = dev_cap->max_qp_sz;
210         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
211         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
212         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
213         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
214         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
215         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
216         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
217         /*
218          * Subtract 1 from the limit because we need to allocate a
219          * spare CQE so the HCA HW can tell the difference between an
220          * empty CQ and a full CQ.
221          */
222         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
223         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
224         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
225         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
226                                                     MLX4_MTT_ENTRY_PER_SEG);
227         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
228         dev->caps.reserved_uars      = dev_cap->reserved_uars;
229         dev->caps.reserved_pds       = dev_cap->reserved_pds;
230         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
231         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
232         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
233         dev->caps.flags              = dev_cap->flags;
234         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
235         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
236
237         dev->caps.log_num_macs  = ilog2(roundup_pow_of_two
238                                         (g.mod_num_mac + 1));
239         dev->caps.log_num_vlans = ilog2(roundup_pow_of_two
240                                         (g.mod_num_vlan + 2));
241         dev->caps.log_num_prios = (g.mod_use_prio)? 3: 0;
242         dev->caps.num_fc_exch = g.mod_num_fc_exch;
243
244         err = mlx4_check_port_params(dev, port_type);
245         if (err)
246                 return err;
247
248         for (i = 1; i <= dev->caps.num_ports; ++i) {
249                 if (!dev_cap->supported_port_types[i]) {
250                         mlx4_warn(dev, "FW doesn't support Multi Protocol, "
251                                        "loading IB only\n");
252                         dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
253                         continue;
254                 }
255                 if (port_type[i-1] & dev_cap->supported_port_types[i])
256                         dev->caps.port_type[i] = port_type[i-1];
257                 else {
258                         MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
259                                 ("Requested port type %#x for port %d is "
260                                 "not supported by HW. Supported %#x\n", 
261                                 port_type[i-1], i, (int)dev_cap->supported_port_types[i]));
262                         MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
263                                 ("Ven %x Dev %d Fw %d.%d.%d, IsBurnDevice %s\n", 
264                                 (unsigned)dev->pdev->ven_id, (unsigned)dev->pdev->dev_id,
265                                 (int) (dev->caps.fw_ver >> 32),
266                                 (int) (dev->caps.fw_ver >> 16) & 0xffff, 
267                                 (int) (dev->caps.fw_ver & 0xffff),
268                                 mlx4_is_livefish(dev) ? "Y" : "N"
269                                 ));
270                         
271                         return -ENODEV;
272                 }
273                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
274                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
275                         mlx4_warn(dev, "Requested number of MACs is too much "
276                                        "for port %d, reducing to %d.\n",
277                                         i, 1 << dev->caps.log_num_macs);
278                 }
279                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
280                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
281                         mlx4_warn(dev, "Requested number of VLANs is too much "
282                                        "for port %d, reducing to %d.\n",
283                                         i, 1 << dev->caps.log_num_vlans);
284                 }
285                 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
286                         ++num_eth_ports;
287         }
288
289         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
290         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
291                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
292                 (1 << dev->caps.log_num_macs)*
293                 (1 << dev->caps.log_num_vlans)*
294                 (1 << dev->caps.log_num_prios)*
295                 num_eth_ports;
296         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = dev->caps.num_fc_exch;
297
298         return 0;
299 }
300
301 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
302 {
303         struct mlx4_priv *priv = mlx4_priv(dev);
304         int err;
305
306         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
307                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
308         if (!priv->fw.fw_icm) {
309                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
310                 return -ENOMEM;
311         }
312
313         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
314         if (err) {
315                 mlx4_dbg(dev, "MAP_FA command failed, aborting.\n");
316                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_MAP_FA, 0, 0, 1,
317                         L"%d", err );
318                 goto err_free;
319         }
320
321         err = mlx4_RUN_FW(dev);
322         if (err) {
323                 mlx4_dbg(dev, "RUN_FW command failed, aborting.\n");
324                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_RUN_FW, 0, 0, 1,
325                         L"%d", err );
326                 goto err_unmap_fa;
327         }
328
329         return 0;
330
331 err_unmap_fa:
332         mlx4_UNMAP_FA(dev);
333
334 err_free:
335         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
336         return err;
337 }
338
339 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
340                                           int cmpt_entry_sz)
341 {
342         struct mlx4_priv *priv = mlx4_priv(dev);
343         int err;
344
345         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
346                                   cmpt_base +
347                                   ((u64) (MLX4_CMPT_TYPE_QP *
348                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
349                                   cmpt_entry_sz, dev->caps.num_qps,
350                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
351                                   0, 0);
352         if (err)
353                 goto err;
354
355         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
356                                   cmpt_base +
357                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
358                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
359                                   cmpt_entry_sz, dev->caps.num_srqs,
360                                   dev->caps.reserved_srqs, 0, 0);
361         if (err)
362                 goto err_qp;
363
364         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
365                                   cmpt_base +
366                                   ((u64) (MLX4_CMPT_TYPE_CQ *
367                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
368                                   cmpt_entry_sz, dev->caps.num_cqs,
369                                   dev->caps.reserved_cqs, 0, 0);
370         if (err)
371                 goto err_srq;
372
373         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
374                                   cmpt_base +
375                                   ((u64) (MLX4_CMPT_TYPE_EQ *
376                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
377                                   cmpt_entry_sz,
378                                   roundup_pow_of_two(MLX4_NUM_EQ +
379                                                      dev->caps.reserved_eqs),
380                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
381         if (err)
382                 goto err_cq;
383
384         return 0;
385
386 err_cq:
387         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
388
389 err_srq:
390         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
391
392 err_qp:
393         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
394
395 err:
396         return err;
397 }
398
399 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
400                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
401 {
402         struct mlx4_priv *priv = mlx4_priv(dev);
403         u64 aux_pages;
404         int err;
405
406         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
407         if (err) {
408                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
409                 return err;
410         }
411
412         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
413                  (unsigned long long) icm_size >> 10,
414                  (unsigned long long) aux_pages << 2);
415
416         priv->fw.aux_icm = mlx4_alloc_icm(dev, (int)aux_pages,
417                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
418         if (!priv->fw.aux_icm) {
419                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
420                 return -ENOMEM;
421         }
422
423         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
424         if (err) {
425                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
426                 goto err_free_aux;
427         }
428
429         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
430         if (err) {
431                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
432                 goto err_unmap_aux;
433         }
434
435         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
436         if (err) {
437                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
438                 goto err_unmap_cmpt;
439         }
440
441         /*
442          * Reserved MTT entries must be aligned up to a cacheline
443          * boundary, since the FW will write to them, while the driver
444          * writes to all other MTT entries. (The variable
445          * dev->caps.mtt_entry_sz below is really the MTT segment
446          * size, not the raw entry size)
447          */
448         dev->caps.reserved_mtts =
449                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
450                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
451         if ( dev->pdev->p_self_do->AlignmentRequirement + 1 != dma_get_cache_alignment()) {
452                 mlx4_dbg(dev, "Cache-line size %d, recommended value %d.\n",
453                         dev->pdev->p_self_do->AlignmentRequirement + 1,
454                         dma_get_cache_alignment() );
455         }
456
457         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
458                                   init_hca->mtt_base,
459                                   dev->caps.mtt_entry_sz,
460                                   dev->caps.num_mtt_segs,
461                                   dev->caps.reserved_mtts, 1, 0);
462         if (err) {
463                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
464                 goto err_unmap_eq;
465         }
466
467         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
468                                   init_hca->dmpt_base,
469                                   dev_cap->dmpt_entry_sz,
470                                   dev->caps.num_mpts,
471                                   dev->caps.reserved_mrws, 1, 1);
472         if (err) {
473                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
474                 goto err_unmap_mtt;
475         }
476
477         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
478                                   init_hca->qpc_base,
479                                   dev_cap->qpc_entry_sz,
480                                   dev->caps.num_qps,
481                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
482                                   0, 0);
483         if (err) {
484                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
485                 goto err_unmap_dmpt;
486         }
487
488         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
489                                   init_hca->auxc_base,
490                                   dev_cap->aux_entry_sz,
491                                   dev->caps.num_qps,
492                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
493                                   0, 0);
494         if (err) {
495                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
496                 goto err_unmap_qp;
497         }
498
499         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
500                                   init_hca->altc_base,
501                                   dev_cap->altc_entry_sz,
502                                   dev->caps.num_qps,
503                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
504                                   0, 0);
505         if (err) {
506                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
507                 goto err_unmap_auxc;
508         }
509
510         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
511                                   init_hca->rdmarc_base,
512                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
513                                   dev->caps.num_qps,
514                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
515                                   0, 0);
516         if (err) {
517                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
518                 goto err_unmap_altc;
519         }
520
521         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
522                                   init_hca->cqc_base,
523                                   dev_cap->cqc_entry_sz,
524                                   dev->caps.num_cqs,
525                                   dev->caps.reserved_cqs, 0, 0);
526         if (err) {
527                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
528                 goto err_unmap_rdmarc;
529         }
530
531         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
532                                   init_hca->srqc_base,
533                                   dev_cap->srq_entry_sz,
534                                   dev->caps.num_srqs,
535                                   dev->caps.reserved_srqs, 0, 0);
536         if (err) {
537                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
538                 goto err_unmap_cq;
539         }
540
541         /*
542          * It's not strictly required, but for simplicity just map the
543          * whole multicast group table now.  The table isn't very big
544          * and it's a lot easier than trying to track ref counts.
545          */
546         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
547                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
548                                   dev->caps.num_mgms + dev->caps.num_amgms,
549                                   dev->caps.num_mgms + dev->caps.num_amgms,
550                                   0, 0);
551         if (err) {
552                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
553                 goto err_unmap_srq;
554         }
555
556         return 0;
557
558 err_unmap_srq:
559         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
560
561 err_unmap_cq:
562         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
563
564 err_unmap_rdmarc:
565         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
566
567 err_unmap_altc:
568         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
569
570 err_unmap_auxc:
571         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
572
573 err_unmap_qp:
574         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
575
576 err_unmap_dmpt:
577         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
578
579 err_unmap_mtt:
580         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
581
582 err_unmap_eq:
583         mlx4_unmap_eq_icm(dev);
584
585 err_unmap_cmpt:
586         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
587         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
588         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
589         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
590
591 err_unmap_aux:
592         mlx4_UNMAP_ICM_AUX(dev);
593
594 err_free_aux:
595         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
596
597         return err;
598 }
599
600 static void mlx4_free_icms(struct mlx4_dev *dev)
601 {
602         struct mlx4_priv *priv = mlx4_priv(dev);
603
604         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
605         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
606         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
607         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
608         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
609         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
610         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
611         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
612         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
613         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
614         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
615         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
616         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
617         mlx4_unmap_eq_icm(dev);
618
619         mlx4_UNMAP_ICM_AUX(dev);
620         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
621     priv->fw.aux_icm = NULL;
622 }
623
624 static void mlx4_close_hca(struct mlx4_dev *dev)
625 {
626         mlx4_CLOSE_HCA(dev, 0);
627         mlx4_free_icms(dev);
628         mlx4_UNMAP_FA(dev);
629         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
630 }
631
632 static int mlx4_init_hca(struct mlx4_dev *dev)
633 {
634         struct mlx4_priv          *priv = mlx4_priv(dev);
635         struct mlx4_adapter        adapter;
636         struct mlx4_dev_cap        dev_cap;
637         struct mlx4_profile        profile;
638         struct mlx4_init_hca_param init_hca;
639         u64 icm_size;
640         int err;
641
642         err = mlx4_QUERY_FW(dev);
643         if (err) {
644                 if (err == -EACCES) {
645                         static int print_it = 1;
646                         if (print_it-- > 0) {
647                                 mlx4_info(dev, "Function disabled, please upgrade to multi function driver.\n");
648                                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_WARN_QUERY_FW, 0, 0, 0 );
649                         }
650                 }
651                 else {
652                         mlx4_dbg(dev, "QUERY_FW command failed, aborting.\n");
653                         WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_FW, 0, 0, 1,
654                                 L"%d", err );
655                 }
656                 return err;
657         }
658
659         err = mlx4_load_fw(dev);
660         if (err) {
661                 mlx4_dbg(dev, "Failed to start FW, aborting.\n");
662                 return err;
663         }
664
665         err = mlx4_dev_cap(dev, &dev_cap);
666         if (err) {
667                 mlx4_dbg(dev, "QUERY_DEV_CAP command failed, aborting.\n");
668                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_DEV_CAP, 0, 0, 1,
669                         L"%d", err );
670                 goto err_stop_fw;
671         }
672
673         process_mod_param_profile();
674         profile = default_profile;
675
676         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
677         if ((long long) icm_size < 0) {
678                 err = (int)icm_size;
679                 goto err_stop_fw;
680         }
681
682         init_hca.log_uar_sz = (u8)ilog2(dev->caps.num_uars);
683
684         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
685         if (err)
686                 goto err_stop_fw;
687
688         err = mlx4_INIT_HCA(dev, &init_hca);
689         if (err) {
690                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
691                 goto err_free_icm;
692         }
693
694         err = mlx4_QUERY_ADAPTER(dev, &adapter);
695         if (err) {
696                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
697                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_ADAPTER, 0, 0, 1,
698                         L"%d", err );
699                 goto err_close;
700         }
701
702         priv->eq_table.inta_pin = adapter.inta_pin;
703         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
704
705         return 0;
706
707 err_close:
708         mlx4_CLOSE_HCA(dev,0);
709
710 err_free_icm:
711         mlx4_free_icms(dev);
712
713 err_stop_fw:
714         mlx4_UNMAP_FA(dev);
715         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
716
717         return err;
718 }
719
720 static int mlx4_setup_hca(struct mlx4_dev *dev)
721 {
722         struct mlx4_priv *priv = mlx4_priv(dev);
723         int err;
724         u8 port;
725
726         err = mlx4_init_uar_table(dev);
727         if (err) {
728                 mlx4_err(dev, "Failed to initialize "
729                          "user access region table, aborting.\n");
730                 return err;
731         }
732
733         err = mlx4_uar_alloc(dev, &priv->driver_uar);
734         if (err) {
735                 mlx4_err(dev, "Failed to allocate driver access region, "
736                          "aborting.\n");
737                 goto err_uar_table_free;
738         }
739
740         priv->kar = ioremap((u64)priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
741         if (!priv->kar) {
742                 mlx4_err(dev, "Couldn't map kernel access region, "
743                          "aborting.\n");
744                 err = -ENOMEM;
745                 goto err_uar_free;
746         }
747
748         err = mlx4_init_pd_table(dev);
749         if (err) {
750                 mlx4_err(dev, "Failed to initialize "
751                          "protection domain table, aborting.\n");
752                 goto err_kar_unmap;
753         }
754
755         err = mlx4_init_mr_table(dev);
756         if (err) {
757                 mlx4_err(dev, "Failed to initialize "
758                          "memory region table, aborting.\n");
759                 goto err_pd_table_free;
760         }
761
762         
763         err = mlx4_init_eq_table(dev);
764         if (err) {
765                 mlx4_err(dev, "Failed to initialize "
766                          "event queue table, aborting.\n");
767                 goto err_mr_table_free;
768         }
769
770         err = mlx4_cmd_use_events(dev);
771         if (err) {
772                 mlx4_err(dev, "Failed to switch to event-driven "
773                          "firmware commands, aborting.\n");
774                 goto err_eq_table_free;
775         }
776
777         err = mlx4_NOP(dev);
778         if (err) {
779                 if (dev->flags & MLX4_FLAG_MSI_X) {
780                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
781                                   "interrupt IRQ %d.\n",
782                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
783                         mlx4_warn(dev, "Trying again without MSI-X.\n");
784                 } else {
785                         mlx4_err(dev, "NOP command failed to generate interrupt "
786                                  "(IRQ %d), aborting.\n",
787                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
788                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
789                 }
790
791                 goto err_cmd_poll;
792         }
793
794         mlx4_dbg(dev, "NOP command IRQ test passed\n");
795
796         err = mlx4_init_cq_table(dev);
797         if (err) {
798                 mlx4_err(dev, "Failed to initialize "
799                          "completion queue table, aborting.\n");
800                 goto err_cmd_poll;
801         }
802
803         err = mlx4_init_srq_table(dev);
804         if (err) {
805                 mlx4_err(dev, "Failed to initialize "
806                          "shared receive queue table, aborting.\n");
807                 goto err_cq_table_free;
808         }
809
810         err = mlx4_init_qp_table(dev);
811         if (err) {
812                 mlx4_err(dev, "Failed to initialize "
813                          "queue pair table, aborting.\n");
814                 goto err_srq_table_free;
815         }
816
817         err = mlx4_init_mcg_table(dev);
818         if (err) {
819                 mlx4_err(dev, "Failed to initialize "
820                          "multicast group table, aborting.\n");
821                 goto err_qp_table_free;
822         }
823         for (port = 1; port <= dev->caps.num_ports; port++) {
824                 err = mlx4_SET_PORT(dev, port,0 ,0);
825                 if (err) {
826                         mlx4_err(dev, "Failed to set port %d, aborting\n",
827                                  port);
828                         goto err_mcg_table_free;
829                 }
830         }
831
832         for (port = 0; port < dev->caps.num_ports; port++) {
833                 mlx4_init_mac_table(dev, port);
834                 mlx4_init_vlan_table(dev, port);
835         }
836
837         return 0;
838 err_mcg_table_free:
839         mlx4_cleanup_mcg_table(dev);
840
841 err_qp_table_free:
842         mlx4_cleanup_qp_table(dev);
843
844 err_srq_table_free:
845         mlx4_cleanup_srq_table(dev);
846
847 err_cq_table_free:
848         mlx4_cleanup_cq_table(dev);
849
850 err_cmd_poll:
851         mlx4_cmd_use_polling(dev);
852
853 err_eq_table_free:
854         mlx4_cleanup_eq_table(dev);
855
856 err_mr_table_free:
857         mlx4_cleanup_mr_table(dev);
858
859 err_pd_table_free:
860         mlx4_cleanup_pd_table(dev);
861
862 err_kar_unmap:
863         iounmap(priv->kar,PAGE_SIZE);
864
865 err_uar_free:
866         mlx4_uar_free(dev, &priv->driver_uar);
867
868 err_uar_table_free:
869         mlx4_cleanup_uar_table(dev);
870         return err;
871 }
872
873 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
874 {
875         int i, n_cpus;
876         u64 cpus;
877
878         /* calculate the number of processors */
879         cpus = (u64)KeQueryActiveProcessors();
880         for (i=0,n_cpus=0; i<(sizeof(KAFFINITY)<<3); i++) {
881                 if ((1I64<<i) & cpus)
882                         n_cpus++;
883         }
884
885         /* decide on the mode */
886         if (dev->pdev->n_msi_vectors_alloc >= (n_cpus+2))
887                 dev->flags |= MLX4_FLAG_MSI_X;
888
889         MLX4_PRINT(TRACE_LEVEL_WARNING ,MLX4_DBG_LOW ,
890                 ("Interrupt mode '%s', n_vectors %d, n_cpus %d, Affinity %#I64x\n",
891                 (dev->flags & MLX4_FLAG_MSI_X) ? "MSI-X" : "Legacy", 
892                 dev->pdev->n_msi_vectors_alloc, n_cpus, cpus));
893
894 }
895
896
897 static struct pci_device_id * mlx4_find_pci_dev(USHORT ven_id, USHORT dev_id)
898 {
899         struct pci_device_id *p_id = mlx4_pci_table;
900         int i;
901
902         // find p_id (appropriate line in mlx4_pci_table)
903         for (i = 0; i < MLX4_PCI_TABLE_SIZE; ++i, ++p_id) {
904                 if (p_id->device == dev_id && p_id->vendor ==  ven_id)
905                         return p_id;
906         }
907         return NULL;
908 }
909
910
911 int mlx4_init_one(struct pci_dev *pdev, struct mlx4_dev_params *dev_params)
912 {
913         struct pci_device_id *id;
914         struct mlx4_priv *priv;
915         struct mlx4_dev *dev;
916         int err;
917         NTSTATUS status;
918         int i;
919
920 #ifdef FORCE_LIVEFISH
921                 if (pdev)
922                         goto err;
923 #endif
924
925         /* we are going to recreate device anyway */
926         pdev->dev = NULL;
927         pdev->ib_dev = NULL;
928         
929         /* find the type of device */
930         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
931         if (id == NULL) {
932                 err = -ENOSYS;
933                 goto err;
934         }
935
936         /*
937          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
938          * be present)
939          */
940         if (pci_resource_len(pdev, 0) != 1 << 20) {
941                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
942                         ("Missing DCS, aborting.\n"));
943                 err = -ENODEV;
944                 goto err;
945         }
946         if (!pci_resource_len(pdev, 1)) {
947                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
948                         ("Missing UAR, aborting.\n"));
949                 err = -ENODEV;
950                 goto err;
951         }
952
953 run_as_livefish:
954         /* allocate mlx4_priv structure */
955         priv = kzalloc(sizeof *priv, GFP_KERNEL);
956         if (!priv) {
957                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
958                         ("Device struct alloc failed, aborting.\n"));
959                 err = -ENOMEM;
960                 goto end;
961         }
962         /* must be here for livefish */
963         INIT_LIST_HEAD(&priv->ctx_list);
964         spin_lock_init(&priv->ctx_lock);
965
966         INIT_LIST_HEAD(&priv->pgdir_list);
967         mutex_init(&priv->pgdir_mutex);
968
969         /* deal with livefish, if any */
970         dev       = &priv->dev;
971         dev->signature = MLX4_DEV_SIGNATURE;
972         dev->pdev = pdev;
973         pdev->dev = dev;
974         if (id->driver_data == LIVEFISH)
975                 dev->flags |= MLX4_FLAG_LIVEFISH;
976         if (mlx4_is_livefish(dev)) {
977                 err = mlx4_register_device(dev);
978                 if (err) {
979                         MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
980                                 ("mlx4_register_device for livefish failed, return with error.\n"));
981                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_FAIL, 
982                                 0, errno_to_ntstatus(err), 0 ); 
983                         pdev->dev = NULL;
984                         kfree(priv);
985                 } 
986                 else {
987                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
988                         ("MLX4_BUS started in \"livefish\" mode !!!.\n"));
989                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_OK, 
990                                 0, errno_to_ntstatus(err), 0 ); 
991                 }
992                 goto end;
993         }
994
995         for (i = 0; i < MLX4_MAX_PORTS; i++) 
996                 dev->dev_params.mod_port_type[i] = dev_params->mod_port_type[i];
997
998         /*
999          * Now reset the HCA before we touch the PCI capabilities or
1000          * attempt a firmware command, since a boot ROM may have left
1001          * the HCA in an undefined state.
1002          */
1003         status = mlx4_reset(dev);
1004         if ( !NT_SUCCESS( status ) ) {
1005                 mlx4_err(dev, "Failed to reset HCA, aborting.(status %#x)\n", status);
1006                 err = -EFAULT;
1007                 goto err_free_dev;
1008         }
1009
1010         if (mlx4_cmd_init(dev)) {
1011                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1012                 goto err_free_dev;
1013         }
1014
1015         err = mlx4_init_hca(dev);
1016         if (err) {
1017                 if (err == -EACCES) 
1018                         dev->flags |= MLX4_FLAG_NOT_PRIME;
1019                 goto err_cmd;
1020         }
1021
1022         mlx4_enable_msi_x(dev);
1023
1024         err = mlx4_setup_hca(dev);
1025         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
1026                 dev->flags &= ~MLX4_FLAG_MSI_X;
1027                 err = mlx4_setup_hca(dev);
1028         }
1029
1030         if (err)
1031                 goto err_close;
1032
1033         err = mlx4_register_device(dev);
1034         if (err)
1035                 goto err_cleanup;
1036
1037         mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is INITIALIZED ! \n", (int)pdev->dev_id);
1038         return 0;
1039
1040 err_cleanup:
1041         mlx4_cleanup_mcg_table(dev);
1042         mlx4_cleanup_qp_table(dev);
1043         mlx4_cleanup_srq_table(dev);
1044         mlx4_cleanup_cq_table(dev);
1045         mlx4_cmd_use_polling(dev);
1046         mlx4_cleanup_eq_table(dev);
1047         mlx4_cleanup_mr_table(dev);
1048         mlx4_cleanup_pd_table(dev);
1049         mlx4_cleanup_uar_table(dev);
1050
1051 err_close:
1052         mlx4_close_hca(dev);
1053
1054 err_cmd:
1055         mlx4_cmd_cleanup(dev);
1056
1057 err_free_dev:
1058         pdev->dev = NULL;
1059         kfree(priv);
1060
1061 err:
1062         /* we failed device initialization - try to simulate "livefish" device to facilitate using FW burning tools */
1063         id = mlx4_find_pci_dev(pdev->ven_id, DEVID_HERMON_BD);
1064         if (id == NULL) {
1065                 err = -ENOSYS;
1066                 goto end;
1067         }
1068         goto run_as_livefish;
1069
1070 end:    
1071         return err;
1072 }
1073
1074 void mlx4_remove_one(struct pci_dev *pdev, int reset)
1075 {
1076         struct mlx4_dev  *dev  = pdev->dev;
1077         struct mlx4_priv *priv = mlx4_priv(dev);
1078         int p;
1079
1080         if (dev) {
1081                 mlx4_unregister_device(dev);
1082                 if (mlx4_is_livefish(dev))
1083                         goto done;
1084
1085                 for (p = 1; p <= dev->caps.num_ports; ++p)
1086                         mlx4_CLOSE_PORT(dev, p);
1087
1088                 mlx4_cleanup_mcg_table(dev);
1089                 mlx4_cleanup_qp_table(dev);
1090                 mlx4_cleanup_srq_table(dev);
1091                 mlx4_cleanup_cq_table(dev);
1092                 mlx4_cmd_use_polling(dev);
1093                 mlx4_cleanup_eq_table(dev);
1094                 mlx4_cleanup_mr_table(dev);
1095                 mlx4_cleanup_pd_table(dev);
1096
1097                 iounmap(priv->kar,PAGE_SIZE);
1098                 mlx4_uar_free(dev, &priv->driver_uar);
1099                 mlx4_cleanup_uar_table(dev);
1100                 mlx4_close_hca(dev);
1101                 mlx4_cmd_cleanup(dev);
1102
1103                 if (reset && mlx4_reset(dev))
1104                         mlx4_err(dev, "Failed to reset HCA\n");
1105                 mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is REMOVED ! \n", (int)pdev->dev_id);
1106                 pdev->dev = NULL;
1107 done:
1108                 kfree(priv);
1109         }
1110 }
1111
1112 int mlx4_restart_one(struct pci_dev *pdev)
1113 {
1114         struct mlx4_dev_params dev_params;
1115         mlx4_copy_dev_params(&dev_params, &pdev->dev->dev_params);
1116
1117         mlx4_remove_one(pdev, FALSE);
1118         return mlx4_init_one(pdev, &dev_params);
1119 }
1120
1121 void mlx4_net_init()
1122 {
1123         mlx4_intf_init();
1124 }
1125
1126
1127