f8782fe10d23aa51546247bc119ed2caeb759562
[mirror/winof/.git] / hw / mlx4 / kernel / bus / net / main.c
1 /*
2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * OpenIB.org BSD license below:
12  *
13  *     Redistribution and use in source and binary forms, with or
14  *     without modification, are permitted provided that the following
15  *     conditions are met:
16  *
17  *      - Redistributions of source code must retain the above
18  *        copyright notice, this list of conditions and the following
19  *        disclaimer.
20  *
21  *      - Redistributions in binary form must reproduce the above
22  *        copyright notice, this list of conditions and the following
23  *        disclaimer in the documentation and/or other materials
24  *        provided with the distribution.
25  *
26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33  * SOFTWARE.
34  */
35
36
37 #include "mlx4.h"
38 #include "fw.h"
39 #include "icm.h"
40 #include "device.h"
41 #include "doorbell.h"
42 #include "complib\cl_thread.h"
43 #include <mlx4_debug.h>
44
45 #if defined(EVENT_TRACING)
46 #ifdef offsetof
47 #undef offsetof
48 #endif
49 #include "main.tmh"
50 #endif
51
52
53 static struct mlx4_profile default_profile = {
54         1 << 17,        /* num_qp               */
55         1 << 4,         /* rdmarc_per_qp        */
56         1 << 16,        /* num_srq      */
57         1 << 16,        /* num_cq               */
58         1 << 13,        /* num_mcg      */
59         1 << 18,        /* num_mpt      */ 
60         1 << 20         /* num_mtt      */
61 };
62
63 static void process_mod_param_profile(void)
64 {
65         if (g.mod_num_qp)
66                 default_profile.num_qp = 1 << g.mod_num_qp;
67
68         if (g.mod_rdmarc_per_qp)
69                 default_profile.rdmarc_per_qp = 1 << g.mod_rdmarc_per_qp;
70
71         if (g.mod_num_srq)
72                 default_profile.num_srq = 1 << g.mod_num_srq;
73
74         if (g.mod_num_cq)
75                 default_profile.num_cq = 1 << g.mod_num_cq;
76
77         if (g.mod_num_mcg)
78                 default_profile.num_mcg = 1 << g.mod_num_mcg;
79
80         if (g.mod_num_mpt)
81                 default_profile.num_mpt = 1 << g.mod_num_mpt;
82
83         if (g.mod_num_mtt)
84                 default_profile.num_mtt = 1 << g.mod_num_mtt;
85 }
86
87 static struct pci_device_id 
88 mlx4_pci_table[] = {
89         HCA(MELLANOX, SDR,              HERMON),
90         HCA(MELLANOX, DDR,              HERMON),
91         HCA(MELLANOX, ETH,              HERMON),
92         HCA(MELLANOX, ETH_YATIR,                HERMON),
93         HCA(MELLANOX, DDR_G2,           HERMON),
94         HCA(MELLANOX, QDR_G2,           HERMON),
95         HCA(MELLANOX, ETH_G2,           HERMON),
96         HCA(MELLANOX, ETH_YATIR_G2,     HERMON),
97         HCA(MELLANOX, ETH_B0_G2,        HERMON),
98         HCA(MELLANOX, BD,               LIVEFISH),
99 };
100 #define MLX4_PCI_TABLE_SIZE (sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))
101
102
103 static int mlx4_check_port_params(struct mlx4_dev *dev,
104                                   enum mlx4_port_type *port_type)
105 {
106         if (port_type[0] != port_type[1] &&
107             !(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
108                 mlx4_err(dev, "Only same port types supported "
109                               "on this HCA, aborting.\n");
110                 return -EINVAL;
111         }
112         if ((port_type[0] == MLX4_PORT_TYPE_ETH) &&
113             (port_type[1] == MLX4_PORT_TYPE_IB)) {
114                 mlx4_err(dev, "eth-ib configuration is not supported.\n");
115                 return -EINVAL;
116         }
117         return 0;
118 }
119
120 static void mlx4_str2port_type(WCHAR **port_str,
121                                enum mlx4_port_type *port_type)
122 {
123         int i;
124
125         for (i = 0; i < MLX4_MAX_PORTS; i++) {
126                 if (!wcscmp(port_str[i], L"eth"))
127                         port_type[i] = MLX4_PORT_TYPE_ETH;
128                 else
129                         port_type[i] = MLX4_PORT_TYPE_IB;
130         }
131 }
132
133 int mlx4_count_ib_ports(struct mlx4_dev *dev)
134 {
135         int i;
136         int count = 0;
137
138         for (i = 0; i < MLX4_MAX_PORTS; i++) {
139                 if (dev->caps.port_type[i+1] == MLX4_PORT_TYPE_IB) {
140                         count++;
141                 }
142         }
143         return count;
144 }
145
146 BOOLEAN mlx4_is_eth_port(struct mlx4_dev *dev, int port_number)
147 {
148         if (dev->caps.port_type[port_number+1] == MLX4_PORT_TYPE_ETH) {
149                 return TRUE;
150         }
151         return FALSE;
152 }
153
154 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
155 {
156         int err;
157         int i;
158         int num_eth_ports = 0;
159         enum mlx4_port_type port_type[MLX4_MAX_PORTS];
160         struct mlx4_dev *mdev = dev;
161
162         for (i = 0; i < MLX4_MAX_PORTS; i++) 
163                 port_type[i] = dev->dev_params.mod_port_type[i];
164
165         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
166         if (err) {
167                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
168                 return err;
169         }
170
171         if (dev_cap->min_page_sz > PAGE_SIZE) {
172                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
173                          "kernel PAGE_SIZE of %ld, aborting.\n",
174                          dev_cap->min_page_sz, PAGE_SIZE);
175                 return -ENODEV;
176         }
177         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
178                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
179                          "aborting.\n",
180                          dev_cap->num_ports, MLX4_MAX_PORTS);
181                 return -ENODEV;
182         }
183
184         if (dev_cap->uar_size > (int)pci_resource_len(dev->pdev, 2)) {
185                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
186                          "PCI resource 2 size of 0x%llx, aborting.\n",
187                          dev_cap->uar_size,
188                          (unsigned long long) pci_resource_len(dev->pdev, 2));
189                 return -ENODEV;
190         }
191
192         dev->caps.num_ports          = dev_cap->num_ports;
193         for (i = 1; i <= dev->caps.num_ports; ++i) {
194                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
195                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];       
196                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
197                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
198                 dev->caps.port_width_cap[i] = (u8)dev_cap->max_port_width[i];
199                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
200                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];        
201         }
202
203         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
204         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
205         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
206         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
207         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
208         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
209         dev->caps.max_wqes           = dev_cap->max_qp_sz;
210         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
211         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
212         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
213         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
214         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
215         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
216         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
217         /*
218          * Subtract 1 from the limit because we need to allocate a
219          * spare CQE so the HCA HW can tell the difference between an
220          * empty CQ and a full CQ.
221          */
222         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
223         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
224         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
225         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
226                                                     MLX4_MTT_ENTRY_PER_SEG);
227         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
228         dev->caps.reserved_uars      = dev_cap->reserved_uars;
229         dev->caps.reserved_pds       = dev_cap->reserved_pds;
230         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
231         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
232         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
233         dev->caps.flags              = dev_cap->flags;
234         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
235         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
236
237         dev->caps.log_num_macs  = ilog2(roundup_pow_of_two
238                                         (g.mod_num_mac + 1));
239         dev->caps.log_num_vlans = ilog2(roundup_pow_of_two
240                                         (g.mod_num_vlan + 2));
241         dev->caps.log_num_prios = (g.mod_use_prio)? 3: 0;
242
243         err = mlx4_check_port_params(dev, port_type);
244         if (err)
245                 return err;
246
247         for (i = 1; i <= dev->caps.num_ports; ++i) {
248                 if (!dev_cap->supported_port_types[i]) {
249                         mlx4_warn(dev, "FW doesn't support Multi Protocol, "
250                                        "loading IB only\n");
251                         dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
252                         continue;
253                 }
254                 if (port_type[i-1] & dev_cap->supported_port_types[i])
255                         dev->caps.port_type[i] = port_type[i-1];
256                 else {
257                         MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
258                                 ("Requested port type %#x for port %d is "
259                                 "not supported by HW. Supported %#x\n", 
260                                 port_type[i-1], i, (int)dev_cap->supported_port_types[i]));
261                         MLX4_PRINT_EV(TRACE_LEVEL_ERROR ,MLX4_DBG_DRV ,
262                                 ("Ven %x Dev %d Fw %d.%d.%d, IsBurnDevice %s\n", 
263                                 (unsigned)dev->pdev->ven_id, (unsigned)dev->pdev->dev_id,
264                                 (int) (dev->caps.fw_ver >> 32),
265                                 (int) (dev->caps.fw_ver >> 16) & 0xffff, 
266                                 (int) (dev->caps.fw_ver & 0xffff),
267                                 mlx4_is_livefish(dev) ? "Y" : "N"
268                                 ));
269                         
270                         return -ENODEV;
271                 }
272                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
273                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
274                         mlx4_warn(dev, "Requested number of MACs is too much "
275                                        "for port %d, reducing to %d.\n",
276                                         i, 1 << dev->caps.log_num_macs);
277                 }
278                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
279                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
280                         mlx4_warn(dev, "Requested number of VLANs is too much "
281                                        "for port %d, reducing to %d.\n",
282                                         i, 1 << dev->caps.log_num_vlans);
283                 }
284                 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
285                         ++num_eth_ports;
286         }
287
288         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
289         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
290                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
291                 (1 << dev->caps.log_num_macs)*
292                 (1 << dev->caps.log_num_vlans)*
293                 (1 << dev->caps.log_num_prios)*
294                 num_eth_ports;
295         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
296
297         return 0;
298 }
299
300 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
301 {
302         struct mlx4_priv *priv = mlx4_priv(dev);
303         int err;
304
305         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
306                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
307         if (!priv->fw.fw_icm) {
308                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
309                 return -ENOMEM;
310         }
311
312         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
313         if (err) {
314                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
315                 goto err_free;
316         }
317
318         err = mlx4_RUN_FW(dev);
319         if (err) {
320                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
321                 goto err_unmap_fa;
322         }
323
324         return 0;
325
326 err_unmap_fa:
327         mlx4_UNMAP_FA(dev);
328
329 err_free:
330         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
331         return err;
332 }
333
334 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
335                                           int cmpt_entry_sz)
336 {
337         struct mlx4_priv *priv = mlx4_priv(dev);
338         int err;
339
340         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
341                                   cmpt_base +
342                                   ((u64) (MLX4_CMPT_TYPE_QP *
343                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
344                                   cmpt_entry_sz, dev->caps.num_qps,
345                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
346                                   0, 0);
347         if (err)
348                 goto err;
349
350         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
351                                   cmpt_base +
352                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
353                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
354                                   cmpt_entry_sz, dev->caps.num_srqs,
355                                   dev->caps.reserved_srqs, 0, 0);
356         if (err)
357                 goto err_qp;
358
359         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
360                                   cmpt_base +
361                                   ((u64) (MLX4_CMPT_TYPE_CQ *
362                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
363                                   cmpt_entry_sz, dev->caps.num_cqs,
364                                   dev->caps.reserved_cqs, 0, 0);
365         if (err)
366                 goto err_srq;
367
368         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
369                                   cmpt_base +
370                                   ((u64) (MLX4_CMPT_TYPE_EQ *
371                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
372                                   cmpt_entry_sz,
373                                   roundup_pow_of_two(MLX4_NUM_EQ +
374                                                      dev->caps.reserved_eqs),
375                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
376         if (err)
377                 goto err_cq;
378
379         return 0;
380
381 err_cq:
382         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
383
384 err_srq:
385         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
386
387 err_qp:
388         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
389
390 err:
391         return err;
392 }
393
394 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
395                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
396 {
397         struct mlx4_priv *priv = mlx4_priv(dev);
398         u64 aux_pages;
399         int err;
400
401         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
402         if (err) {
403                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
404                 return err;
405         }
406
407         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
408                  (unsigned long long) icm_size >> 10,
409                  (unsigned long long) aux_pages << 2);
410
411         priv->fw.aux_icm = mlx4_alloc_icm(dev, (int)aux_pages,
412                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
413         if (!priv->fw.aux_icm) {
414                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
415                 return -ENOMEM;
416         }
417
418         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
419         if (err) {
420                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
421                 goto err_free_aux;
422         }
423
424         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
425         if (err) {
426                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
427                 goto err_unmap_aux;
428         }
429
430         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
431         if (err) {
432                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
433                 goto err_unmap_cmpt;
434         }
435
436         /*
437          * Reserved MTT entries must be aligned up to a cacheline
438          * boundary, since the FW will write to them, while the driver
439          * writes to all other MTT entries. (The variable
440          * dev->caps.mtt_entry_sz below is really the MTT segment
441          * size, not the raw entry size)
442          */
443         dev->caps.reserved_mtts =
444                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
445                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
446         if ( dev->pdev->p_self_do->AlignmentRequirement + 1 != dma_get_cache_alignment()) {
447                 mlx4_dbg(dev, "Cache-line size %d, recommended value %d.\n",
448                         dev->pdev->p_self_do->AlignmentRequirement + 1,
449                         dma_get_cache_alignment() );
450         }
451
452         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
453                                   init_hca->mtt_base,
454                                   dev->caps.mtt_entry_sz,
455                                   dev->caps.num_mtt_segs,
456                                   dev->caps.reserved_mtts, 1, 0);
457         if (err) {
458                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
459                 goto err_unmap_eq;
460         }
461
462         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
463                                   init_hca->dmpt_base,
464                                   dev_cap->dmpt_entry_sz,
465                                   dev->caps.num_mpts,
466                                   dev->caps.reserved_mrws, 1, 1);
467         if (err) {
468                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
469                 goto err_unmap_mtt;
470         }
471
472         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
473                                   init_hca->qpc_base,
474                                   dev_cap->qpc_entry_sz,
475                                   dev->caps.num_qps,
476                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
477                                   0, 0);
478         if (err) {
479                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
480                 goto err_unmap_dmpt;
481         }
482
483         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
484                                   init_hca->auxc_base,
485                                   dev_cap->aux_entry_sz,
486                                   dev->caps.num_qps,
487                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
488                                   0, 0);
489         if (err) {
490                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
491                 goto err_unmap_qp;
492         }
493
494         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
495                                   init_hca->altc_base,
496                                   dev_cap->altc_entry_sz,
497                                   dev->caps.num_qps,
498                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
499                                   0, 0);
500         if (err) {
501                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
502                 goto err_unmap_auxc;
503         }
504
505         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
506                                   init_hca->rdmarc_base,
507                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
508                                   dev->caps.num_qps,
509                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
510                                   0, 0);
511         if (err) {
512                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
513                 goto err_unmap_altc;
514         }
515
516         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
517                                   init_hca->cqc_base,
518                                   dev_cap->cqc_entry_sz,
519                                   dev->caps.num_cqs,
520                                   dev->caps.reserved_cqs, 0, 0);
521         if (err) {
522                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
523                 goto err_unmap_rdmarc;
524         }
525
526         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
527                                   init_hca->srqc_base,
528                                   dev_cap->srq_entry_sz,
529                                   dev->caps.num_srqs,
530                                   dev->caps.reserved_srqs, 0, 0);
531         if (err) {
532                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
533                 goto err_unmap_cq;
534         }
535
536         /*
537          * It's not strictly required, but for simplicity just map the
538          * whole multicast group table now.  The table isn't very big
539          * and it's a lot easier than trying to track ref counts.
540          */
541         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
542                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
543                                   dev->caps.num_mgms + dev->caps.num_amgms,
544                                   dev->caps.num_mgms + dev->caps.num_amgms,
545                                   0, 0);
546         if (err) {
547                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
548                 goto err_unmap_srq;
549         }
550
551         return 0;
552
553 err_unmap_srq:
554         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
555
556 err_unmap_cq:
557         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
558
559 err_unmap_rdmarc:
560         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
561
562 err_unmap_altc:
563         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
564
565 err_unmap_auxc:
566         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
567
568 err_unmap_qp:
569         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
570
571 err_unmap_dmpt:
572         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
573
574 err_unmap_mtt:
575         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
576
577 err_unmap_eq:
578         mlx4_unmap_eq_icm(dev);
579
580 err_unmap_cmpt:
581         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
582         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
583         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
584         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
585
586 err_unmap_aux:
587         mlx4_UNMAP_ICM_AUX(dev);
588
589 err_free_aux:
590         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
591
592         return err;
593 }
594
595 static void mlx4_free_icms(struct mlx4_dev *dev)
596 {
597         struct mlx4_priv *priv = mlx4_priv(dev);
598
599         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
600         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
601         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
602         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
603         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
604         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
605         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
606         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
607         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
608         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
609         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
610         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
611         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
612         mlx4_unmap_eq_icm(dev);
613
614         mlx4_UNMAP_ICM_AUX(dev);
615         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
616     priv->fw.aux_icm = NULL;
617 }
618
619 static void mlx4_close_hca(struct mlx4_dev *dev)
620 {
621         mlx4_CLOSE_HCA(dev, 0);
622         mlx4_free_icms(dev);
623         mlx4_UNMAP_FA(dev);
624         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
625 }
626
627 static int mlx4_init_hca(struct mlx4_dev *dev)
628 {
629         struct mlx4_priv          *priv = mlx4_priv(dev);
630         struct mlx4_adapter        adapter;
631         struct mlx4_dev_cap        dev_cap;
632         struct mlx4_profile        profile;
633         struct mlx4_init_hca_param init_hca;
634         u64 icm_size;
635         int err;
636
637         err = mlx4_QUERY_FW(dev);
638         if (err) {
639                 if (err == -EACCES) {
640                         static int print_it = 1;
641                         if (print_it-- > 0)
642                                 mlx4_warn(dev, "Function disabled, please upgrade to multi function driver.\n");
643                 }
644                 else
645                         mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
646                 return err;
647         }
648
649         err = mlx4_load_fw(dev);
650         if (err) {
651                 mlx4_err(dev, "Failed to start FW, aborting.\n");
652                 return err;
653         }
654
655         err = mlx4_dev_cap(dev, &dev_cap);
656         if (err) {
657                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
658                 goto err_stop_fw;
659         }
660
661         process_mod_param_profile();
662         profile = default_profile;
663
664         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
665         if ((long long) icm_size < 0) {
666                 err = (int)icm_size;
667                 goto err_stop_fw;
668         }
669
670         init_hca.log_uar_sz = (u8)ilog2(dev->caps.num_uars);
671
672         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
673         if (err)
674                 goto err_stop_fw;
675
676         err = mlx4_INIT_HCA(dev, &init_hca);
677         if (err) {
678                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
679                 goto err_free_icm;
680         }
681
682         err = mlx4_QUERY_ADAPTER(dev, &adapter);
683         if (err) {
684                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
685                 goto err_close;
686         }
687
688         priv->eq_table.inta_pin = adapter.inta_pin;
689         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
690
691         return 0;
692
693 err_close:
694         mlx4_CLOSE_HCA(dev,0);
695
696 err_free_icm:
697         mlx4_free_icms(dev);
698
699 err_stop_fw:
700         mlx4_UNMAP_FA(dev);
701         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
702
703         return err;
704 }
705
706 static int mlx4_setup_hca(struct mlx4_dev *dev)
707 {
708         struct mlx4_priv *priv = mlx4_priv(dev);
709         int err;
710         u8 port;
711
712         err = mlx4_init_uar_table(dev);
713         if (err) {
714                 mlx4_err(dev, "Failed to initialize "
715                          "user access region table, aborting.\n");
716                 return err;
717         }
718
719         err = mlx4_uar_alloc(dev, &priv->driver_uar);
720         if (err) {
721                 mlx4_err(dev, "Failed to allocate driver access region, "
722                          "aborting.\n");
723                 goto err_uar_table_free;
724         }
725
726         priv->kar = ioremap((u64)priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
727         if (!priv->kar) {
728                 mlx4_err(dev, "Couldn't map kernel access region, "
729                          "aborting.\n");
730                 err = -ENOMEM;
731                 goto err_uar_free;
732         }
733
734         err = mlx4_init_pd_table(dev);
735         if (err) {
736                 mlx4_err(dev, "Failed to initialize "
737                          "protection domain table, aborting.\n");
738                 goto err_kar_unmap;
739         }
740
741         err = mlx4_init_mr_table(dev);
742         if (err) {
743                 mlx4_err(dev, "Failed to initialize "
744                          "memory region table, aborting.\n");
745                 goto err_pd_table_free;
746         }
747
748         
749         err = mlx4_init_eq_table(dev);
750         if (err) {
751                 mlx4_err(dev, "Failed to initialize "
752                          "event queue table, aborting.\n");
753                 goto err_mr_table_free;
754         }
755
756         err = mlx4_cmd_use_events(dev);
757         if (err) {
758                 mlx4_err(dev, "Failed to switch to event-driven "
759                          "firmware commands, aborting.\n");
760                 goto err_eq_table_free;
761         }
762
763         err = mlx4_NOP(dev);
764         if (err) {
765                 if (dev->flags & MLX4_FLAG_MSI_X) {
766                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
767                                   "interrupt IRQ %d.\n",
768                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
769                         mlx4_warn(dev, "Trying again without MSI-X.\n");
770                 } else {
771                         mlx4_err(dev, "NOP command failed to generate interrupt "
772                                  "(IRQ %d), aborting.\n",
773                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
774                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
775                 }
776
777                 goto err_cmd_poll;
778         }
779
780         mlx4_dbg(dev, "NOP command IRQ test passed\n");
781
782         err = mlx4_init_cq_table(dev);
783         if (err) {
784                 mlx4_err(dev, "Failed to initialize "
785                          "completion queue table, aborting.\n");
786                 goto err_cmd_poll;
787         }
788
789         err = mlx4_init_srq_table(dev);
790         if (err) {
791                 mlx4_err(dev, "Failed to initialize "
792                          "shared receive queue table, aborting.\n");
793                 goto err_cq_table_free;
794         }
795
796         err = mlx4_init_qp_table(dev);
797         if (err) {
798                 mlx4_err(dev, "Failed to initialize "
799                          "queue pair table, aborting.\n");
800                 goto err_srq_table_free;
801         }
802
803         err = mlx4_init_mcg_table(dev);
804         if (err) {
805                 mlx4_err(dev, "Failed to initialize "
806                          "multicast group table, aborting.\n");
807                 goto err_qp_table_free;
808         }
809         for (port = 1; port <= dev->caps.num_ports; port++) {
810                 err = mlx4_SET_PORT(dev, port,0 ,0);
811                 if (err) {
812                         mlx4_err(dev, "Failed to set port %d, aborting\n",
813                                  port);
814                         goto err_mcg_table_free;
815                 }
816         }
817
818         for (port = 0; port < dev->caps.num_ports; port++) {
819                 mlx4_init_mac_table(dev, port);
820                 mlx4_init_vlan_table(dev, port);
821         }
822
823         return 0;
824 err_mcg_table_free:
825         mlx4_cleanup_mcg_table(dev);
826
827 err_qp_table_free:
828         mlx4_cleanup_qp_table(dev);
829
830 err_srq_table_free:
831         mlx4_cleanup_srq_table(dev);
832
833 err_cq_table_free:
834         mlx4_cleanup_cq_table(dev);
835
836 err_cmd_poll:
837         mlx4_cmd_use_polling(dev);
838
839 err_eq_table_free:
840         mlx4_cleanup_eq_table(dev);
841
842 err_mr_table_free:
843         mlx4_cleanup_mr_table(dev);
844
845 err_pd_table_free:
846         mlx4_cleanup_pd_table(dev);
847
848 err_kar_unmap:
849         iounmap(priv->kar,PAGE_SIZE);
850
851 err_uar_free:
852         mlx4_uar_free(dev, &priv->driver_uar);
853
854 err_uar_table_free:
855         mlx4_cleanup_uar_table(dev);
856         return err;
857 }
858
859 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
860 {
861         int i, n_cpus;
862         u64 cpus;
863
864         /* calculate the number of processors */
865         cpus = (u64)KeQueryActiveProcessors();
866         for (i=0,n_cpus=0; i<(sizeof(KAFFINITY)<<3); i++) {
867                 if ((1I64<<i) & cpus)
868                         n_cpus++;
869         }
870
871         /* decide on the mode */
872         if (dev->pdev->n_msi_vectors_alloc >= (n_cpus+2))
873                 dev->flags |= MLX4_FLAG_MSI_X;
874
875         MLX4_PRINT(TRACE_LEVEL_WARNING ,MLX4_DBG_LOW ,
876                 ("Interrupt mode '%s', n_vectors %d, n_cpus %d, Affinity %#I64x\n",
877                 (dev->flags & MLX4_FLAG_MSI_X) ? "MSI-X" : "Legacy", 
878                 dev->pdev->n_msi_vectors_alloc, n_cpus, cpus));
879
880 }
881
882
883 static struct pci_device_id * mlx4_find_pci_dev(USHORT ven_id, USHORT dev_id)
884 {
885         struct pci_device_id *p_id = mlx4_pci_table;
886         int i;
887
888         // find p_id (appropriate line in mlx4_pci_table)
889         for (i = 0; i < MLX4_PCI_TABLE_SIZE; ++i, ++p_id) {
890                 if (p_id->device == dev_id && p_id->vendor ==  ven_id)
891                         return p_id;
892         }
893         return NULL;
894 }
895
896
897 int mlx4_init_one(struct pci_dev *pdev, struct mlx4_dev_params *dev_params)
898 {
899         struct pci_device_id *id;
900         struct mlx4_priv *priv;
901         struct mlx4_dev *dev;
902         int err;
903         NTSTATUS status;
904         int i;
905
906 #ifdef FORCE_LIVEFISH
907                 if (pdev)
908                         goto err;
909 #endif
910
911         /* we are going to recreate device anyway */
912         pdev->dev = NULL;
913         pdev->ib_dev = NULL;
914         
915         /* find the type of device */
916         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
917         if (id == NULL) {
918                 err = -ENOSYS;
919                 goto err;
920         }
921
922         /*
923          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
924          * be present)
925          */
926         if (pci_resource_len(pdev, 0) != 1 << 20) {
927                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
928                         ("Missing DCS, aborting.\n"));
929                 err = -ENODEV;
930                 goto err;
931         }
932         if (!pci_resource_len(pdev, 1)) {
933                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
934                         ("Missing UAR, aborting.\n"));
935                 err = -ENODEV;
936                 goto err;
937         }
938
939 run_as_livefish:
940         /* allocate mlx4_priv structure */
941         priv = kzalloc(sizeof *priv, GFP_KERNEL);
942         if (!priv) {
943                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
944                         ("Device struct alloc failed, aborting.\n"));
945                 err = -ENOMEM;
946                 goto end;
947         }
948         /* must be here for livefish */
949         INIT_LIST_HEAD(&priv->ctx_list);
950         spin_lock_init(&priv->ctx_lock);
951
952         INIT_LIST_HEAD(&priv->pgdir_list);
953         mutex_init(&priv->pgdir_mutex);
954
955         /* deal with livefish, if any */
956         dev       = &priv->dev;
957         dev->signature = MLX4_DEV_SIGNATURE;
958         dev->pdev = pdev;
959         pdev->dev = dev;
960         if (id->driver_data == LIVEFISH)
961                 dev->flags |= MLX4_FLAG_LIVEFISH;
962         if (mlx4_is_livefish(dev)) {
963                 err = mlx4_register_device(dev);
964                 if (err) {
965                         MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
966                                 ("mlx4_register_device for livefish failed, return with error.\n"));
967                         pdev->dev = NULL;
968                         kfree(priv);
969                 } 
970                 else {
971                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
972                         ("MLX4_BUS started in \"livefish\" mode !!!.\n"));
973                 }
974                 goto end;
975         }
976
977         for (i = 0; i < MLX4_MAX_PORTS; i++) 
978                 dev->dev_params.mod_port_type[i] = dev_params->mod_port_type[i];
979
980         /*
981          * Now reset the HCA before we touch the PCI capabilities or
982          * attempt a firmware command, since a boot ROM may have left
983          * the HCA in an undefined state.
984          */
985         status = mlx4_reset(dev);
986         if ( !NT_SUCCESS( status ) ) {
987                 mlx4_err(dev, "Failed to reset HCA, aborting.(status %#x)\n", status);
988                 err = -EFAULT;
989                 goto err_free_dev;
990         }
991
992         if (mlx4_cmd_init(dev)) {
993                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
994                 goto err_free_dev;
995         }
996
997         err = mlx4_init_hca(dev);
998         if (err) {
999                 if (err == -EACCES) 
1000                         dev->flags |= MLX4_FLAG_NOT_PRIME;
1001                 goto err_cmd;
1002         }
1003
1004         mlx4_enable_msi_x(dev);
1005
1006         err = mlx4_setup_hca(dev);
1007         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
1008                 dev->flags &= ~MLX4_FLAG_MSI_X;
1009                 err = mlx4_setup_hca(dev);
1010         }
1011
1012         if (err)
1013                 goto err_close;
1014
1015         err = mlx4_register_device(dev);
1016         if (err)
1017                 goto err_cleanup;
1018
1019         mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is INITIALIZED ! \n", (int)pdev->dev_id);
1020         return 0;
1021
1022 err_cleanup:
1023         mlx4_cleanup_mcg_table(dev);
1024         mlx4_cleanup_qp_table(dev);
1025         mlx4_cleanup_srq_table(dev);
1026         mlx4_cleanup_cq_table(dev);
1027         mlx4_cmd_use_polling(dev);
1028         mlx4_cleanup_eq_table(dev);
1029         mlx4_cleanup_mr_table(dev);
1030         mlx4_cleanup_pd_table(dev);
1031         mlx4_cleanup_uar_table(dev);
1032
1033 err_close:
1034         mlx4_close_hca(dev);
1035
1036 err_cmd:
1037         mlx4_cmd_cleanup(dev);
1038
1039 err_free_dev:
1040         pdev->dev = NULL;
1041         kfree(priv);
1042
1043 err:
1044         /* we failed device initialization - try to simulate "livefish" device to facilitate using FW burning tools */
1045         id = mlx4_find_pci_dev(pdev->ven_id, DEVID_HERMON_BD);
1046         if (id == NULL) {
1047                 err = -ENOSYS;
1048                 goto end;
1049         }
1050         goto run_as_livefish;
1051
1052 end:    
1053         return err;
1054 }
1055
1056 void mlx4_remove_one(struct pci_dev *pdev, int reset)
1057 {
1058         struct mlx4_dev  *dev  = pdev->dev;
1059         struct mlx4_priv *priv = mlx4_priv(dev);
1060         int p;
1061
1062         if (dev) {
1063                 mlx4_unregister_device(dev);
1064                 if (mlx4_is_livefish(dev))
1065                         goto done;
1066
1067                 for (p = 1; p <= dev->caps.num_ports; ++p)
1068                         mlx4_CLOSE_PORT(dev, p);
1069
1070                 mlx4_cleanup_mcg_table(dev);
1071                 mlx4_cleanup_qp_table(dev);
1072                 mlx4_cleanup_srq_table(dev);
1073                 mlx4_cleanup_cq_table(dev);
1074                 mlx4_cmd_use_polling(dev);
1075                 mlx4_cleanup_eq_table(dev);
1076                 mlx4_cleanup_mr_table(dev);
1077                 mlx4_cleanup_pd_table(dev);
1078
1079                 iounmap(priv->kar,PAGE_SIZE);
1080                 mlx4_uar_free(dev, &priv->driver_uar);
1081                 mlx4_cleanup_uar_table(dev);
1082                 mlx4_close_hca(dev);
1083                 mlx4_cmd_cleanup(dev);
1084
1085                 if (reset && mlx4_reset(dev))
1086                         mlx4_err(dev, "Failed to reset HCA\n");
1087                 mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is REMOVED ! \n", (int)pdev->dev_id);
1088                 pdev->dev = NULL;
1089 done:
1090                 kfree(priv);
1091         }
1092 }
1093
1094 int mlx4_restart_one(struct pci_dev *pdev)
1095 {
1096         struct mlx4_dev_params dev_params;
1097         mlx4_copy_dev_params(&dev_params, &pdev->dev->dev_params);
1098
1099         mlx4_remove_one(pdev, FALSE);
1100         return mlx4_init_one(pdev, &dev_params);
1101 }
1102
1103 void mlx4_net_init()
1104 {
1105         mlx4_intf_init();
1106 }
1107
1108
1109