[MLX4] added support for 26438 and 26488 devices. [mlnx: 4943]
[mirror/winof/.git] / hw / mlx4 / kernel / inc / l2w_pci.h
1 #pragma once
2
3 // ===========================================
4 // LITERALS
5 // ===========================================
6
7 #define DEVID_HERMON_SDR                        0x6340  /* 25408 */
8 #define DEVID_HERMON_DDR                        0x634a  /* 25418 */
9 #define DEVID_HERMON_DDR_G2                     0x6732  /* 26418 */
10 #define DEVID_HERMON_DDR_G2_A           0x6778  /* 26488 */
11 #define DEVID_HERMON_QDR_G2                     0x673c  /* 26428 */
12 #define DEVID_HERMON_QDR_G2_A           0x6746  /* 26438 */
13
14 #define DEVID_HERMON_ETH                        0x6368  /* 25448 */
15 #define DEVID_HERMON_ETH_YATIR          0x6372  /* 25458 */
16 #define DEVID_HERMON_ETH_G2                     0x6750  /* 26448 */
17 #define DEVID_HERMON_ETH_YATIR_G2       0x675A  /* 26458 */
18 #define DEVID_HERMON_ETH_B0_G2          0x6764  /* 26468 */
19 #define DEVID_HERMON_ETH_B0_40Gb_G2     0x676E  /* 26478 */
20 /* livefish */
21 #define DEVID_HERMON_BD         0x0191  /* 401 */
22
23 /* Types of supported HCA */
24 typedef enum __hca_type {
25         HERMON,                 /* fully functional HCA */
26         LIVEFISH                /* a burning device */
27 } hca_type_t;
28
29 /* vendors */
30 #define PCI_VENDOR_ID_MELLANOX                          0x15b3
31 #define PCI_VENDOR_ID_TOPSPIN                           0x1867
32
33 #define HCA(v, d, t) \
34         { PCI_VENDOR_ID_##v,    DEVID_HERMON_##d, t }
35
36 struct pci_device_id {
37         USHORT          vendor;
38         USHORT          device;
39         hca_type_t      driver_data;
40 };
41
42
43 // ===========================================
44 // TYPES
45 // ===========================================
46
47
48 // ===========================================
49 // MACROS/FUNCTIONS
50 // ===========================================
51
52 NTSTATUS pci_hca_reset( struct pci_dev *pdev);
53
54 /* use shim to implement that */
55 #define mlx4_reset(dev)         pci_hca_reset(dev->pdev)
56
57 // get bar boundaries
58 #define pci_resource_start(dev,bar_num) ((dev)->bar[bar_num >> 1].phys)
59 #define pci_resource_len(dev,bar_num)   ((dev)->bar[bar_num >> 1].size)
60
61 // i/o to registers
62
63 static inline u64 readq(const volatile void __iomem *addr)
64 {
65         //TODO: write atomic implementation of _IO_READ_QWORD and change mthca_doorbell.h
66         u64 val;
67         READ_REGISTER_BUFFER_ULONG((PULONG)(addr), (PULONG)&val, 2 );
68         return val;
69 }
70
71 static inline u32 readl(const volatile void __iomem *addr)
72 {
73         return READ_REGISTER_ULONG((PULONG)(addr));
74 }
75
76 static inline u16 reads(const volatile void __iomem *addr)
77 {
78         return READ_REGISTER_USHORT((PUSHORT)(addr));
79 }
80
81 static inline u8 readb(const volatile void __iomem *addr)
82 {
83         return READ_REGISTER_UCHAR((PUCHAR)(addr));
84 }
85
86 #define __raw_readq             readq
87 #define __raw_readl             readl
88 #define __raw_reads             reads
89 #define __raw_readb             readb
90
91 static inline void writeq(unsigned __int64 val, volatile void __iomem *addr)
92 {
93         //TODO: write atomic implementation of _IO_WRITE_QWORD and change mthca_doorbell.h
94         WRITE_REGISTER_BUFFER_ULONG( (PULONG)(addr), (PULONG)&val, 2 );
95 }
96
97 static inline void writel(unsigned int val, volatile void __iomem *addr)
98 {
99         WRITE_REGISTER_ULONG((PULONG)(addr),val);
100 }
101
102 static inline void writes(unsigned short val, volatile void __iomem *addr)
103 {
104         WRITE_REGISTER_USHORT((PUSHORT)(addr),val);
105 }
106
107 static inline void writeb(unsigned char val, volatile void __iomem *addr)
108 {
109         WRITE_REGISTER_UCHAR((PUCHAR)(addr),val);
110 }
111
112 #define __raw_writeq            writeq
113 #define __raw_writel            writel
114 #define __raw_writes            writes
115 #define __raw_writeb            writeb
116
117