[MLX4] added support for 26438 and 26488 devices. [mlnx: 4943]
[mirror/winof/.git] / hw / mlx4 / kernel / bus / net / main.c
1 /*
2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * OpenIB.org BSD license below:
12  *
13  *     Redistribution and use in source and binary forms, with or
14  *     without modification, are permitted provided that the following
15  *     conditions are met:
16  *
17  *      - Redistributions of source code must retain the above
18  *        copyright notice, this list of conditions and the following
19  *        disclaimer.
20  *
21  *      - Redistributions in binary form must reproduce the above
22  *        copyright notice, this list of conditions and the following
23  *        disclaimer in the documentation and/or other materials
24  *        provided with the distribution.
25  *
26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33  * SOFTWARE.
34  */
35
36
37 #include "mlx4.h"
38 #include "fw.h"
39 #include "icm.h"
40 #include "device.h"
41 #include "doorbell.h"
42 #include "complib\cl_thread.h"
43 #include <mlx4_debug.h>
44
45 #if defined(EVENT_TRACING)
46 #ifdef offsetof
47 #undef offsetof
48 #endif
49 #include "main.tmh"
50 #endif
51
52
53 static struct mlx4_profile default_profile = {
54         1 << 17,        /* num_qp               */
55         1 << 4,         /* rdmarc_per_qp        */
56         1 << 16,        /* num_srq      */
57         1 << 16,        /* num_cq               */
58         1 << 13,        /* num_mcg      */
59         1 << 18,        /* num_mpt      */ 
60         1 << 20         /* num_mtt      */
61 };
62
63 static void process_mod_param_profile(void)
64 {
65         if (g.mod_num_qp)
66                 default_profile.num_qp = 1 << g.mod_num_qp;
67
68         if (g.mod_rdmarc_per_qp)
69                 default_profile.rdmarc_per_qp = 1 << g.mod_rdmarc_per_qp;
70
71         if (g.mod_num_srq)
72                 default_profile.num_srq = 1 << g.mod_num_srq;
73
74         if (g.mod_num_cq)
75                 default_profile.num_cq = 1 << g.mod_num_cq;
76
77         if (g.mod_num_mcg)
78                 default_profile.num_mcg = 1 << g.mod_num_mcg;
79
80         if (g.mod_num_mpt)
81                 default_profile.num_mpt = 1 << g.mod_num_mpt;
82
83         if (g.mod_num_mtt)
84                 default_profile.num_mtt = 1 << g.mod_num_mtt;
85 }
86
87 static struct pci_device_id 
88 mlx4_pci_table[] = {
89         HCA(MELLANOX, SDR,              HERMON),
90         HCA(MELLANOX, DDR,              HERMON),
91         HCA(MELLANOX, DDR_G2,           HERMON),
92         HCA(MELLANOX, DDR_G2_A,         HERMON),
93         HCA(MELLANOX, QDR_G2,           HERMON),
94         HCA(MELLANOX, QDR_G2_A,         HERMON),
95         HCA(MELLANOX, ETH,              HERMON),
96         HCA(MELLANOX, ETH_YATIR,                HERMON),
97         HCA(MELLANOX, ETH_G2,           HERMON),
98         HCA(MELLANOX, ETH_YATIR_G2,     HERMON),
99         HCA(MELLANOX, ETH_B0_G2,        HERMON),
100         HCA(MELLANOX, ETH_B0_40Gb_G2,   HERMON),
101         HCA(MELLANOX, BD,               LIVEFISH),
102 };
103 #define MLX4_PCI_TABLE_SIZE (sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))
104
105
106 static int mlx4_check_port_params(struct mlx4_dev *dev,
107                                   enum mlx4_port_type *port_type)
108 {
109         if (port_type[0] != port_type[1] &&
110             !(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
111                 mlx4_err(dev, "Only same port types supported "
112                               "on this HCA, aborting.\n");
113                 return -EINVAL;
114         }
115         if ((port_type[0] == MLX4_PORT_TYPE_ETH) &&
116             (port_type[1] == MLX4_PORT_TYPE_IB)) {
117                 mlx4_err(dev, "eth-ib configuration is not supported.\n");
118                 return -EINVAL;
119         }
120         return 0;
121 }
122
123 static void mlx4_str2port_type(WCHAR **port_str,
124                                enum mlx4_port_type *port_type)
125 {
126         int i;
127
128         for (i = 0; i < MLX4_MAX_PORTS; i++) {
129                 if (!wcscmp(port_str[i], L"eth"))
130                         port_type[i] = MLX4_PORT_TYPE_ETH;
131                 else
132                         port_type[i] = MLX4_PORT_TYPE_IB;
133         }
134 }
135
136 int mlx4_count_ib_ports(struct mlx4_dev *dev)
137 {
138         int i;
139         int count = 0;
140
141         for (i = 0; i < MLX4_MAX_PORTS; i++) {
142                 if (dev->caps.port_type[i+1] == MLX4_PORT_TYPE_IB) {
143                         count++;
144                 }
145         }
146         return count;
147 }
148
149 BOOLEAN mlx4_is_eth_port(struct mlx4_dev *dev, int port_number)
150 {
151         if (dev->caps.port_type[port_number+1] == MLX4_PORT_TYPE_ETH) {
152                 return TRUE;
153         }
154         return FALSE;
155 }
156
157 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
158 {
159         int err;
160         int i;
161         int num_eth_ports = 0;
162         enum mlx4_port_type port_type[MLX4_MAX_PORTS];
163         struct mlx4_dev *mdev = dev;
164
165         for (i = 0; i < MLX4_MAX_PORTS; i++) 
166                 port_type[i] = dev->dev_params.mod_port_type[i];
167
168         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
169         if (err) {
170                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
171                 return err;
172         }
173
174         if (dev_cap->min_page_sz > PAGE_SIZE) {
175                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
176                          "kernel PAGE_SIZE of %ld, aborting.\n",
177                          dev_cap->min_page_sz, PAGE_SIZE);
178                 return -ENODEV;
179         }
180         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
181                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
182                          "aborting.\n",
183                          dev_cap->num_ports, MLX4_MAX_PORTS);
184                 return -ENODEV;
185         }
186
187         if (dev_cap->uar_size > (int)pci_resource_len(dev->pdev, 2)) {
188                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
189                          "PCI resource 2 size of 0x%llx, aborting.\n",
190                          dev_cap->uar_size,
191                          (unsigned long long) pci_resource_len(dev->pdev, 2));
192                 return -ENODEV;
193         }
194
195         dev->caps.num_ports          = dev_cap->num_ports;
196         for (i = 1; i <= dev->caps.num_ports; ++i) {
197                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
198                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];       
199                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
200                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
201                 dev->caps.port_width_cap[i] = (u8)dev_cap->max_port_width[i];
202                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
203                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];        
204         }
205
206         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
207         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
208         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
209         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
210         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
211         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
212         dev->caps.max_wqes           = dev_cap->max_qp_sz;
213         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
214         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
215         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
216         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
217         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
218         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
219         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
220         /*
221          * Subtract 1 from the limit because we need to allocate a
222          * spare CQE so the HCA HW can tell the difference between an
223          * empty CQ and a full CQ.
224          */
225         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
226         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
227         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
228         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
229                                                     MLX4_MTT_ENTRY_PER_SEG);
230         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
231         dev->caps.reserved_uars      = dev_cap->reserved_uars;
232         dev->caps.reserved_pds       = dev_cap->reserved_pds;
233         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
234         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
235         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
236         dev->caps.flags              = dev_cap->flags;
237         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
238         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
239
240         dev->caps.log_num_macs  = ilog2(roundup_pow_of_two
241                                         (g.mod_num_mac + 1));
242         dev->caps.log_num_vlans = ilog2(roundup_pow_of_two
243                                         (g.mod_num_vlan + 2));
244         dev->caps.log_num_prios = (g.mod_use_prio)? 3: 0;
245         dev->caps.num_fc_exch = g.mod_num_fc_exch;
246
247         err = mlx4_check_port_params(dev, port_type);
248         if (err)
249                 return err;
250
251         for (i = 1; i <= dev->caps.num_ports; ++i) {
252                 if (!dev_cap->supported_port_types[i]) {
253                         mlx4_warn(dev, "FW doesn't support Multi Protocol, "
254                                        "loading IB only\n");
255                         dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
256                         continue;
257                 }
258                 if (port_type[i-1] & dev_cap->supported_port_types[i])
259                         dev->caps.port_type[i] = port_type[i-1];
260                 else {
261                         MLX4_PRINT_EV(TRACE_LEVEL_WARNING,MLX4_DBG_DRV ,
262                                 ("Requested port type %#x for port %d is "
263                                 "not supported by HW. Supported %#x. We'll working to the supported one! \n", 
264                                 port_type[i-1], i, (int)dev_cap->supported_port_types[i]));
265                         MLX4_PRINT_EV(TRACE_LEVEL_WARNING ,MLX4_DBG_DRV ,
266                                 ("Ven %x Dev %d Fw %d.%d.%d, IsBurnDevice %s\n", 
267                                 (unsigned)dev->pdev->ven_id, (unsigned)dev->pdev->dev_id,
268                                 (int) (dev->caps.fw_ver >> 32),
269                                 (int) (dev->caps.fw_ver >> 16) & 0xffff, 
270                                 (int) (dev->caps.fw_ver & 0xffff),
271                                 mlx4_is_livefish(dev) ? "Y" : "N"
272                                 ));
273                         
274                         dev->caps.port_type[i] = dev_cap->supported_port_types[i];
275                 }
276                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
277                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
278                         mlx4_warn(dev, "Requested number of MACs is too much "
279                                        "for port %d, reducing to %d.\n",
280                                         i, 1 << dev->caps.log_num_macs);
281                 }
282                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
283                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
284                         mlx4_warn(dev, "Requested number of VLANs is too much "
285                                        "for port %d, reducing to %d.\n",
286                                         i, 1 << dev->caps.log_num_vlans);
287                 }
288                 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
289                         ++num_eth_ports;
290         }
291
292         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
293         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
294                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
295                 (1 << dev->caps.log_num_macs)*
296                 (1 << dev->caps.log_num_vlans)*
297                 (1 << dev->caps.log_num_prios)*
298                 num_eth_ports;
299         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = dev->caps.num_fc_exch;
300
301         return 0;
302 }
303
304 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
305 {
306         struct mlx4_priv *priv = mlx4_priv(dev);
307         int err;
308
309         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
310                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
311         if (!priv->fw.fw_icm) {
312                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
313                 return -ENOMEM;
314         }
315
316         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
317         if (err) {
318                 mlx4_dbg(dev, "MAP_FA command failed, aborting.\n");
319                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_MAP_FA, 0, 0, 1,
320                         L"%d", err );
321                 goto err_free;
322         }
323
324         err = mlx4_RUN_FW(dev);
325         if (err) {
326                 mlx4_dbg(dev, "RUN_FW command failed, aborting.\n");
327                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_RUN_FW, 0, 0, 1,
328                         L"%d", err );
329                 goto err_unmap_fa;
330         }
331
332         return 0;
333
334 err_unmap_fa:
335         mlx4_UNMAP_FA(dev);
336
337 err_free:
338         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
339         return err;
340 }
341
342 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
343                                           int cmpt_entry_sz)
344 {
345         struct mlx4_priv *priv = mlx4_priv(dev);
346         int err;
347
348         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
349                                   cmpt_base +
350                                   ((u64) (MLX4_CMPT_TYPE_QP *
351                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
352                                   cmpt_entry_sz, dev->caps.num_qps,
353                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
354                                   0, 0);
355         if (err)
356                 goto err;
357
358         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
359                                   cmpt_base +
360                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
361                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
362                                   cmpt_entry_sz, dev->caps.num_srqs,
363                                   dev->caps.reserved_srqs, 0, 0);
364         if (err)
365                 goto err_qp;
366
367         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
368                                   cmpt_base +
369                                   ((u64) (MLX4_CMPT_TYPE_CQ *
370                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
371                                   cmpt_entry_sz, dev->caps.num_cqs,
372                                   dev->caps.reserved_cqs, 0, 0);
373         if (err)
374                 goto err_srq;
375
376         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
377                                   cmpt_base +
378                                   ((u64) (MLX4_CMPT_TYPE_EQ *
379                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
380                                   cmpt_entry_sz,
381                                   roundup_pow_of_two(MLX4_NUM_EQ +
382                                                      dev->caps.reserved_eqs),
383                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
384         if (err)
385                 goto err_cq;
386
387         return 0;
388
389 err_cq:
390         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
391
392 err_srq:
393         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
394
395 err_qp:
396         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
397
398 err:
399         return err;
400 }
401
402 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
403                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
404 {
405         struct mlx4_priv *priv = mlx4_priv(dev);
406         u64 aux_pages;
407         int err;
408
409         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
410         if (err) {
411                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
412                 return err;
413         }
414
415         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
416                  (unsigned long long) icm_size >> 10,
417                  (unsigned long long) aux_pages << 2);
418
419         priv->fw.aux_icm = mlx4_alloc_icm(dev, (int)aux_pages,
420                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
421         if (!priv->fw.aux_icm) {
422                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
423                 return -ENOMEM;
424         }
425
426         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
427         if (err) {
428                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
429                 goto err_free_aux;
430         }
431
432         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
433         if (err) {
434                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
435                 goto err_unmap_aux;
436         }
437
438         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
439                 init_hca->eqc_base, dev_cap->eqc_entry_sz,
440                 dev->caps.num_eqs, dev->caps.num_eqs, 0, 0);
441         if (err) {
442                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
443                 goto err_unmap_cmpt;
444         }
445
446         /*
447          * Reserved MTT entries must be aligned up to a cacheline
448          * boundary, since the FW will write to them, while the driver
449          * writes to all other MTT entries. (The variable
450          * dev->caps.mtt_entry_sz below is really the MTT segment
451          * size, not the raw entry size)
452          */
453         dev->caps.reserved_mtts =
454                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
455                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
456         if ( dev->pdev->p_self_do->AlignmentRequirement + 1 != dma_get_cache_alignment()) {
457                 mlx4_dbg(dev, "Cache-line size %d, recommended value %d.\n",
458                         dev->pdev->p_self_do->AlignmentRequirement + 1,
459                         dma_get_cache_alignment() );
460         }
461
462         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
463                                   init_hca->mtt_base,
464                                   dev->caps.mtt_entry_sz,
465                                   dev->caps.num_mtt_segs,
466                                   dev->caps.reserved_mtts, 1, 0);
467         if (err) {
468                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
469                 goto err_unmap_eq;
470         }
471
472         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
473                                   init_hca->dmpt_base,
474                                   dev_cap->dmpt_entry_sz,
475                                   dev->caps.num_mpts,
476                                   dev->caps.reserved_mrws, 1, 1);
477         if (err) {
478                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
479                 goto err_unmap_mtt;
480         }
481
482         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
483                                   init_hca->qpc_base,
484                                   dev_cap->qpc_entry_sz,
485                                   dev->caps.num_qps,
486                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
487                                   0, 0);
488         if (err) {
489                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
490                 goto err_unmap_dmpt;
491         }
492
493         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
494                                   init_hca->auxc_base,
495                                   dev_cap->aux_entry_sz,
496                                   dev->caps.num_qps,
497                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
498                                   0, 0);
499         if (err) {
500                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
501                 goto err_unmap_qp;
502         }
503
504         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
505                                   init_hca->altc_base,
506                                   dev_cap->altc_entry_sz,
507                                   dev->caps.num_qps,
508                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
509                                   0, 0);
510         if (err) {
511                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
512                 goto err_unmap_auxc;
513         }
514
515         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
516                                   init_hca->rdmarc_base,
517                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
518                                   dev->caps.num_qps,
519                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
520                                   0, 0);
521         if (err) {
522                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
523                 goto err_unmap_altc;
524         }
525
526         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
527                                   init_hca->cqc_base,
528                                   dev_cap->cqc_entry_sz,
529                                   dev->caps.num_cqs,
530                                   dev->caps.reserved_cqs, 0, 0);
531         if (err) {
532                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
533                 goto err_unmap_rdmarc;
534         }
535
536         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
537                                   init_hca->srqc_base,
538                                   dev_cap->srq_entry_sz,
539                                   dev->caps.num_srqs,
540                                   dev->caps.reserved_srqs, 0, 0);
541         if (err) {
542                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
543                 goto err_unmap_cq;
544         }
545
546         /*
547          * It's not strictly required, but for simplicity just map the
548          * whole multicast group table now.  The table isn't very big
549          * and it's a lot easier than trying to track ref counts.
550          */
551         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
552                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
553                                   dev->caps.num_mgms + dev->caps.num_amgms,
554                                   dev->caps.num_mgms + dev->caps.num_amgms,
555                                   0, 0);
556         if (err) {
557                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
558                 goto err_unmap_srq;
559         }
560
561         return 0;
562
563 err_unmap_srq:
564         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
565
566 err_unmap_cq:
567         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
568
569 err_unmap_rdmarc:
570         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
571
572 err_unmap_altc:
573         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
574
575 err_unmap_auxc:
576         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
577
578 err_unmap_qp:
579         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
580
581 err_unmap_dmpt:
582         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
583
584 err_unmap_mtt:
585         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
586
587 err_unmap_eq:
588         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
589
590 err_unmap_cmpt:
591         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
592         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
593         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
594         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
595
596 err_unmap_aux:
597         mlx4_UNMAP_ICM_AUX(dev);
598
599 err_free_aux:
600         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
601
602         return err;
603 }
604
605 static void mlx4_free_icms(struct mlx4_dev *dev)
606 {
607         struct mlx4_priv *priv = mlx4_priv(dev);
608
609         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
610         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
611         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
612         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
613         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
614         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
615         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
616         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
617         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
618         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);     
619         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
620         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
621         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
622         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
623
624         mlx4_UNMAP_ICM_AUX(dev);
625         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
626     priv->fw.aux_icm = NULL;
627 }
628
629 static void mlx4_close_hca(struct mlx4_dev *dev)
630 {
631         mlx4_CLOSE_HCA(dev, 0);
632         mlx4_free_icms(dev);
633         mlx4_UNMAP_FA(dev);
634         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
635 }
636
637 static int mlx4_init_hca(struct mlx4_dev *dev)
638 {
639         struct mlx4_priv          *priv = mlx4_priv(dev);
640         struct mlx4_adapter        adapter;
641         struct mlx4_dev_cap        dev_cap;
642         struct mlx4_profile        profile;
643         struct mlx4_init_hca_param init_hca;
644         u64 icm_size;
645         int err;
646
647         err = mlx4_QUERY_FW(dev);
648         if (err) {
649                 if (err == -EACCES) {
650                         static int print_it = 1;
651                         if (print_it-- > 0) {
652                                 mlx4_info(dev, "Function disabled, please upgrade to multi function driver.\n");
653                                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_WARN_QUERY_FW, 0, 0, 0 );
654                         }
655                 }
656                 else {
657                         mlx4_dbg(dev, "QUERY_FW command failed, aborting.\n");
658                         WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_FW, 0, 0, 1,
659                                 L"%d", err );
660                 }
661                 return err;
662         }
663
664         err = mlx4_load_fw(dev);
665         if (err) {
666                 mlx4_dbg(dev, "Failed to start FW, aborting.\n");
667                 return err;
668         }
669
670         err = mlx4_dev_cap(dev, &dev_cap);
671         if (err) {
672                 mlx4_dbg(dev, "QUERY_DEV_CAP command failed, aborting.\n");
673                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_DEV_CAP, 0, 0, 1,
674                         L"%d", err );
675                 goto err_stop_fw;
676         }
677
678         process_mod_param_profile();
679         profile = default_profile;
680
681         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
682         if ((long long) icm_size < 0) {
683                 err = (int)icm_size;
684                 goto err_stop_fw;
685         }
686
687         init_hca.log_uar_sz = (u8)ilog2(dev->caps.num_uars);
688
689         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
690         if (err)
691                 goto err_stop_fw;
692
693         err = mlx4_INIT_HCA(dev, &init_hca);
694         if (err) {
695                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
696                 goto err_free_icm;
697         }
698
699         err = mlx4_QUERY_ADAPTER(dev, &adapter);
700         if (err) {
701                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
702                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_ADAPTER, 0, 0, 1,
703                         L"%d", err );
704                 goto err_close;
705         }
706
707         priv->eq_table.inta_pin = adapter.inta_pin;
708         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
709
710         return 0;
711
712 err_close:
713         mlx4_CLOSE_HCA(dev,0);
714
715 err_free_icm:
716         mlx4_free_icms(dev);
717
718 err_stop_fw:
719         mlx4_UNMAP_FA(dev);
720         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
721
722         return err;
723 }
724
725 static int mlx4_setup_hca(struct mlx4_dev *dev)
726 {
727         struct mlx4_priv *priv = mlx4_priv(dev);
728         int err;
729         u8 port;
730
731         err = mlx4_init_uar_table(dev);
732         if (err) {
733                 mlx4_err(dev, "Failed to initialize "
734                          "user access region table, aborting.\n");
735                 return err;
736         }
737
738         err = mlx4_uar_alloc(dev, &priv->driver_uar);
739         if (err) {
740                 mlx4_err(dev, "Failed to allocate driver access region, "
741                          "aborting.\n");
742                 goto err_uar_table_free;
743         }
744
745         priv->kar = ioremap((u64)priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
746         if (!priv->kar) {
747                 mlx4_err(dev, "Couldn't map kernel access region, "
748                          "aborting.\n");
749                 err = -ENOMEM;
750                 goto err_uar_free;
751         }
752
753         err = mlx4_init_pd_table(dev);
754         if (err) {
755                 mlx4_err(dev, "Failed to initialize "
756                          "protection domain table, aborting.\n");
757                 goto err_kar_unmap;
758         }
759
760         err = mlx4_init_mr_table(dev);
761         if (err) {
762                 mlx4_err(dev, "Failed to initialize "
763                          "memory region table, aborting.\n");
764                 goto err_pd_table_free;
765         }
766
767         
768         err = mlx4_init_eq_table(dev);
769         if (err) {
770                 mlx4_err(dev, "Failed to initialize "
771                          "event queue table, aborting.\n");
772                 goto err_mr_table_free;
773         }
774
775         err = mlx4_cmd_use_events(dev);
776         if (err) {
777                 mlx4_err(dev, "Failed to switch to event-driven "
778                          "firmware commands, aborting.\n");
779                 goto err_eq_table_free;
780         }
781
782         err = mlx4_NOP(dev);
783         if (err) {
784                 if (dev->flags & MLX4_FLAG_MSI_X) {
785                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
786                                   "interrupt IRQ %d.\n",
787                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
788                         mlx4_warn(dev, "Trying again without MSI-X.\n");
789                 } else {
790                         mlx4_err(dev, "NOP command failed to generate interrupt "
791                                  "(IRQ %d), aborting.\n",
792                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
793                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
794                 }
795
796                 goto err_cmd_poll;
797         }
798
799         mlx4_dbg(dev, "NOP command IRQ test passed\n");
800
801         err = mlx4_init_cq_table(dev);
802         if (err) {
803                 mlx4_err(dev, "Failed to initialize "
804                          "completion queue table, aborting.\n");
805                 goto err_cmd_poll;
806         }
807
808         err = mlx4_init_srq_table(dev);
809         if (err) {
810                 mlx4_err(dev, "Failed to initialize "
811                          "shared receive queue table, aborting.\n");
812                 goto err_cq_table_free;
813         }
814
815         err = mlx4_init_qp_table(dev);
816         if (err) {
817                 mlx4_err(dev, "Failed to initialize "
818                          "queue pair table, aborting.\n");
819                 goto err_srq_table_free;
820         }
821
822         err = mlx4_init_mcg_table(dev);
823         if (err) {
824                 mlx4_err(dev, "Failed to initialize "
825                          "multicast group table, aborting.\n");
826                 goto err_qp_table_free;
827         }
828         for (port = 1; port <= dev->caps.num_ports; port++) {
829                 err = mlx4_SET_PORT(dev, port,0 ,0);
830                 if (err) {
831                         mlx4_err(dev, "Failed to set port %d, aborting\n",
832                                  port);
833                         goto err_mcg_table_free;
834                 }
835         }
836
837         for (port = 0; port < dev->caps.num_ports; port++) {
838                 mlx4_init_mac_table(dev, port);
839                 mlx4_init_vlan_table(dev, port);
840         }
841
842         return 0;
843 err_mcg_table_free:
844         mlx4_cleanup_mcg_table(dev);
845
846 err_qp_table_free:
847         mlx4_cleanup_qp_table(dev);
848
849 err_srq_table_free:
850         mlx4_cleanup_srq_table(dev);
851
852 err_cq_table_free:
853         mlx4_cleanup_cq_table(dev);
854
855 err_cmd_poll:
856         mlx4_cmd_use_polling(dev);
857
858 err_eq_table_free:
859         mlx4_cleanup_eq_table(dev);
860
861 err_mr_table_free:
862         mlx4_cleanup_mr_table(dev);
863
864 err_pd_table_free:
865         mlx4_cleanup_pd_table(dev);
866
867 err_kar_unmap:
868         iounmap(priv->kar,PAGE_SIZE);
869
870 err_uar_free:
871         mlx4_uar_free(dev, &priv->driver_uar);
872
873 err_uar_table_free:
874         mlx4_cleanup_uar_table(dev);
875         return err;
876 }
877
878 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
879 {
880         int i, n_cpus;
881         u64 cpus;
882
883         /* calculate the number of processors */
884         cpus = (u64)KeQueryActiveProcessors();
885         for (i=0,n_cpus=0; i<(sizeof(KAFFINITY)<<3); i++) {
886                 if ((1I64<<i) & cpus)
887                         n_cpus++;
888         }
889
890         /* decide on the mode */
891         if (dev->pdev->n_msi_vectors_alloc >= (n_cpus+2))
892                 dev->flags |= MLX4_FLAG_MSI_X;
893
894         MLX4_PRINT(TRACE_LEVEL_WARNING ,MLX4_DBG_LOW ,
895                 ("Interrupt mode '%s', n_vectors %d, n_cpus %d, Affinity %#I64x\n",
896                 (dev->flags & MLX4_FLAG_MSI_X) ? "MSI-X" : "Legacy", 
897                 dev->pdev->n_msi_vectors_alloc, n_cpus, cpus));
898
899 }
900
901
902 static struct pci_device_id * mlx4_find_pci_dev(USHORT ven_id, USHORT dev_id)
903 {
904         struct pci_device_id *p_id = mlx4_pci_table;
905         int i;
906
907         // find p_id (appropriate line in mlx4_pci_table)
908         for (i = 0; i < MLX4_PCI_TABLE_SIZE; ++i, ++p_id) {
909                 if (p_id->device == dev_id && p_id->vendor ==  ven_id)
910                         return p_id;
911         }
912         return NULL;
913 }
914
915
916 int mlx4_init_one(struct pci_dev *pdev, struct mlx4_dev_params *dev_params)
917 {
918         struct pci_device_id *id;
919         struct mlx4_priv *priv;
920         struct mlx4_dev *dev;
921         int err;
922         NTSTATUS status;
923         int i;
924
925 #ifdef FORCE_LIVEFISH
926                 if (pdev)
927                         goto err;
928 #endif
929
930         /* we are going to recreate device anyway */
931         pdev->dev = NULL;
932         pdev->ib_dev = NULL;
933         
934         /* find the type of device */
935         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
936         if (id == NULL) {
937                 err = -ENOSYS;
938                 goto err;
939         }
940
941         /*
942          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
943          * be present)
944          */
945         if (pci_resource_len(pdev, 0) != 1 << 20) {
946                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
947                         ("Missing DCS, aborting.\n"));
948                 err = -ENODEV;
949                 goto err;
950         }
951         if (!pci_resource_len(pdev, 1)) {
952                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
953                         ("Missing UAR, aborting.\n"));
954                 err = -ENODEV;
955                 goto err;
956         }
957
958 run_as_livefish:
959         /* allocate mlx4_priv structure */
960         priv = kzalloc(sizeof *priv, GFP_KERNEL);
961         if (!priv) {
962                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
963                         ("Device struct alloc failed, aborting.\n"));
964                 err = -ENOMEM;
965                 goto end;
966         }
967         /* must be here for livefish */
968         INIT_LIST_HEAD(&priv->ctx_list);
969         spin_lock_init(&priv->ctx_lock);
970
971         INIT_LIST_HEAD(&priv->pgdir_list);
972         mutex_init(&priv->pgdir_mutex);
973
974         /* deal with livefish, if any */
975         dev       = &priv->dev;
976         dev->signature = MLX4_DEV_SIGNATURE;
977         dev->pdev = pdev;
978         pdev->dev = dev;
979         if (id->driver_data == LIVEFISH)
980                 dev->flags |= MLX4_FLAG_LIVEFISH;
981         if (mlx4_is_livefish(dev)) {
982                 err = mlx4_register_device(dev);
983                 if (err) {
984                         MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
985                                 ("mlx4_register_device for livefish failed, return with error.\n"));
986                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_FAIL, 
987                                 0, errno_to_ntstatus(err), 0 ); 
988                         pdev->dev = NULL;
989                         kfree(priv);
990                 } 
991                 else {
992                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
993                         ("MLX4_BUS started in \"livefish\" mode !!!.\n"));
994                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_OK, 
995                                 0, errno_to_ntstatus(err), 0 ); 
996                 }
997                 goto end;
998         }
999
1000         for (i = 0; i < MLX4_MAX_PORTS; i++) 
1001                 dev->dev_params.mod_port_type[i] = dev_params->mod_port_type[i];
1002
1003         /*
1004          * Now reset the HCA before we touch the PCI capabilities or
1005          * attempt a firmware command, since a boot ROM may have left
1006          * the HCA in an undefined state.
1007          */
1008         status = mlx4_reset(dev);
1009         if ( !NT_SUCCESS( status ) ) {
1010                 mlx4_err(dev, "Failed to reset HCA, aborting.(status %#x)\n", status);
1011                 err = -EFAULT;
1012                 goto err_free_dev;
1013         }
1014
1015         if (mlx4_cmd_init(dev)) {
1016                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1017                 goto err_free_dev;
1018         }
1019
1020         err = mlx4_init_hca(dev);
1021         if (err) {
1022                 if (err == -EACCES) 
1023                         dev->flags |= MLX4_FLAG_NOT_PRIME;
1024                 goto err_cmd;
1025         }
1026
1027         mlx4_enable_msi_x(dev);
1028
1029         err = mlx4_setup_hca(dev);
1030         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
1031                 dev->flags &= ~MLX4_FLAG_MSI_X;
1032                 err = mlx4_setup_hca(dev);
1033         }
1034
1035         if (err)
1036                 goto err_close;
1037
1038         err = mlx4_register_device(dev);
1039         if (err)
1040                 goto err_cleanup;
1041
1042         mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is INITIALIZED ! \n", (int)pdev->dev_id);
1043         return 0;
1044
1045 err_cleanup:
1046         mlx4_cleanup_mcg_table(dev);
1047         mlx4_cleanup_qp_table(dev);
1048         mlx4_cleanup_srq_table(dev);
1049         mlx4_cleanup_cq_table(dev);
1050         mlx4_cmd_use_polling(dev);
1051         mlx4_cleanup_eq_table(dev);
1052         mlx4_cleanup_mr_table(dev);
1053         mlx4_cleanup_pd_table(dev);
1054         mlx4_cleanup_uar_table(dev);
1055
1056 err_close:
1057         mlx4_close_hca(dev);
1058
1059 err_cmd:
1060         mlx4_cmd_cleanup(dev);
1061
1062 err_free_dev:
1063         pdev->dev = NULL;
1064         kfree(priv);
1065
1066 err:
1067         /* we failed device initialization - try to simulate "livefish" device to facilitate using FW burning tools */
1068         id = mlx4_find_pci_dev(pdev->ven_id, DEVID_HERMON_BD);
1069         if (id == NULL) {
1070                 err = -ENOSYS;
1071                 goto end;
1072         }
1073         goto run_as_livefish;
1074
1075 end:    
1076         return err;
1077 }
1078
1079 void mlx4_remove_one(struct pci_dev *pdev, int reset)
1080 {
1081         struct mlx4_dev  *dev  = pdev->dev;
1082         struct mlx4_priv *priv = mlx4_priv(dev);
1083         int p;
1084
1085         if (dev) {
1086                 mlx4_unregister_device(dev);
1087                 if (mlx4_is_livefish(dev))
1088                         goto done;
1089
1090                 for (p = 1; p <= dev->caps.num_ports; ++p)
1091                         mlx4_CLOSE_PORT(dev, p);
1092
1093                 mlx4_cleanup_mcg_table(dev);
1094                 mlx4_cleanup_qp_table(dev);
1095                 mlx4_cleanup_srq_table(dev);
1096                 mlx4_cleanup_cq_table(dev);
1097                 mlx4_cmd_use_polling(dev);
1098                 mlx4_cleanup_eq_table(dev);
1099                 mlx4_cleanup_mr_table(dev);
1100                 mlx4_cleanup_pd_table(dev);
1101
1102                 iounmap(priv->kar,PAGE_SIZE);
1103                 mlx4_uar_free(dev, &priv->driver_uar);
1104                 mlx4_cleanup_uar_table(dev);
1105                 mlx4_close_hca(dev);
1106                 mlx4_cmd_cleanup(dev);
1107
1108                 if (reset && mlx4_reset(dev))
1109                         mlx4_err(dev, "Failed to reset HCA\n");
1110                 mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is REMOVED ! \n", (int)pdev->dev_id);
1111                 pdev->dev = NULL;
1112 done:
1113                 kfree(priv);
1114         }
1115 }
1116
1117 int mlx4_restart_one(struct pci_dev *pdev)
1118 {
1119         struct mlx4_dev_params dev_params;
1120         mlx4_copy_dev_params(&dev_params, &pdev->dev->dev_params);
1121
1122         mlx4_remove_one(pdev, FALSE);
1123         return mlx4_init_one(pdev, &dev_params);
1124 }
1125
1126 void mlx4_net_init()
1127 {
1128         mlx4_intf_init();
1129 }
1130
1131
1132