hw/mlx4/kernel/bus/net/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36
  37 #include "mlx4.h"
  38 #include "fw.h"
  39 #include "icm.h"
  40 #include "device.h"
  41 #include "doorbell.h"
  42 #include "complib\cl_thread.h"
  43
  44 // TODO: put into Globals
  45 #ifdef CONFIG_MLX4_DEBUG
  46 // "Enable debug tracing if > 0"
  47 int debug_level = 1;
  48 #endif /* CONFIG_MLX4_DEBUG */
  49
  50 #ifdef CONFIG_PCI_MSI
  51
  52 // "attempt to use MSI-X if nonzero"
  53 static int msi_x = 1;
  54
  55 #else /* CONFIG_PCI_MSI */
  56
  57 #define msi_x (0)
  58
  59 #endif /* CONFIG_PCI_MSI */
  60
  61 static struct mlx4_profile default_profile = {
  62         1 << 17,        /* num_qp               */
  63         1 << 4,         /* rdmarc_per_qp        */
  64         1 << 16,        /* num_srq      */
  65         1 << 16,        /* num_cq               */
  66         1 << 13,        /* num_mcg      */
  67         1 << 17,        /* num_mpt      */
  68         1 << 20         /* num_mtt      */
  69 };
  70
  71 static void process_mod_param_profile(void)
  72 {
  73         if (g.mod_num_qp)
  74                 default_profile.num_qp = 1 << g.mod_num_qp;
  75
  76         if (g.mod_rdmarc_per_qp)
  77                 default_profile.rdmarc_per_qp = 1 << g.mod_rdmarc_per_qp;
  78
  79         if (g.mod_num_srq)
  80                 default_profile.num_srq = 1 << g.mod_num_srq;
  81
  82         if (g.mod_num_cq)
  83                 default_profile.num_cq = 1 << g.mod_num_cq;
  84
  85         if (g.mod_num_mcg)
  86                 default_profile.num_mcg = 1 << g.mod_num_mcg;
  87
  88         if (g.mod_num_mpt)
  89                 default_profile.num_mpt = 1 << g.mod_num_mpt;
  90
  91         if (g.mod_num_mtt)
  92                 default_profile.num_mtt = 1 << g.mod_num_mtt;
  93 }
  94
  95 static struct pci_device_id
  96 mlx4_pci_table[] = {
  97         HCA(MELLANOX, SDR,              HERMON),
  98         HCA(MELLANOX, DDR,              HERMON),
  99         HCA(MELLANOX, QDR,              HERMON),
 100         HCA(MELLANOX, DDR_G2,   HERMON),
 101         HCA(MELLANOX, QDR_G2,   HERMON),
 102         HCA(MELLANOX, BD,               LIVEFISH),
 103 };
 104 #define MLX4_PCI_TABLE_SIZE (sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))
 105
 106 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 107 {
 108         int err;
 109         int i;
 110
 111         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 112         if (err) {
 113                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 114                 return err;
 115         }
 116
 117         if (dev_cap->min_page_sz > PAGE_SIZE) {
 118                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 119                          "kernel PAGE_SIZE of %ld, aborting.\n",
 120                          dev_cap->min_page_sz, PAGE_SIZE);
 121                 return -ENODEV;
 122         }
 123         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 124                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 125                          "aborting.\n",
 126                          dev_cap->num_ports, MLX4_MAX_PORTS);
 127                 return -ENODEV;
 128         }
 129
 130         if (dev_cap->uar_size > (int)pci_resource_len(dev->pdev, 2)) {
 131                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 132                          "PCI resource 2 size of 0x%llx, aborting.\n",
 133                          dev_cap->uar_size,
 134                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 135                 return -ENODEV;
 136         }
 137
 138         dev->caps.num_ports          = dev_cap->num_ports;
 139         for (i = 1; i <= dev->caps.num_ports; ++i) {
 140                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 141                 dev->caps.mtu_cap[i]        = dev_cap->max_mtu[i];
 142                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 143                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 144                 dev->caps.port_width_cap[i] = (u8)dev_cap->max_port_width[i];
 145         }
 146
 147         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 148         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 149         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 150         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 151         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 152         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 153         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 154         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 155         dev->caps.reserved_qps       = dev_cap->reserved_qps;
 156         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 157         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 158         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 159         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 160         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 161         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
 162         /*
 163          * Subtract 1 from the limit because we need to allocate a
 164          * spare CQE so the HCA HW can tell the difference between an
 165          * empty CQ and a full CQ.
 166          */
 167         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 168         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 169         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 170         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
 171                                                     MLX4_MTT_ENTRY_PER_SEG);
 172         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 173         dev->caps.reserved_uars      = dev_cap->reserved_uars;
 174         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 175         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
 176         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 177         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 178         dev->caps.flags              = dev_cap->flags;
 179         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 180
 181         return 0;
 182 }
 183
 184 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
 185 {
 186         struct mlx4_priv *priv = mlx4_priv(dev);
 187         int err;
 188
 189         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 190                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 191         if (!priv->fw.fw_icm) {
 192                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 193                 return -ENOMEM;
 194         }
 195
 196         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 197         if (err) {
 198                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 199                 goto err_free;
 200         }
 201
 202         err = mlx4_RUN_FW(dev);
 203         if (err) {
 204                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 205                 goto err_unmap_fa;
 206         }
 207
 208         return 0;
 209
 210 err_unmap_fa:
 211         mlx4_UNMAP_FA(dev);
 212
 213 err_free:
 214         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 215         return err;
 216 }
 217
 218 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 219                                           int cmpt_entry_sz)
 220 {
 221         struct mlx4_priv *priv = mlx4_priv(dev);
 222         int err;
 223
 224         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 225                                   cmpt_base +
 226                                   ((u64) (MLX4_CMPT_TYPE_QP *
 227                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 228                                   cmpt_entry_sz, dev->caps.num_qps,
 229                                   dev->caps.reserved_qps, 0, 0);
 230         if (err)
 231                 goto err;
 232
 233         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 234                                   cmpt_base +
 235                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 236                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 237                                   cmpt_entry_sz, dev->caps.num_srqs,
 238                                   dev->caps.reserved_srqs, 0, 0);
 239         if (err)
 240                 goto err_qp;
 241
 242         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 243                                   cmpt_base +
 244                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 245                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 246                                   cmpt_entry_sz, dev->caps.num_cqs,
 247                                   dev->caps.reserved_cqs, 0, 0);
 248         if (err)
 249                 goto err_srq;
 250
 251         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 252                                   cmpt_base +
 253                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 254                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 255                                   cmpt_entry_sz,
 256                                   roundup_pow_of_two(MLX4_NUM_EQ +
 257                                                      dev->caps.reserved_eqs),
 258                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
 259         if (err)
 260                 goto err_cq;
 261
 262         return 0;
 263
 264 err_cq:
 265         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 266
 267 err_srq:
 268         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 269
 270 err_qp:
 271         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 272
 273 err:
 274         return err;
 275 }
 276
 277 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 278                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 279 {
 280         struct mlx4_priv *priv = mlx4_priv(dev);
 281         u64 aux_pages;
 282         int err;
 283
 284         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 285         if (err) {
 286                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 287                 return err;
 288         }
 289
 290         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 291                  (unsigned long long) icm_size >> 10,
 292                  (unsigned long long) aux_pages << 2);
 293
 294         priv->fw.aux_icm = mlx4_alloc_icm(dev, (int)aux_pages,
 295                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 296         if (!priv->fw.aux_icm) {
 297                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 298                 return -ENOMEM;
 299         }
 300
 301         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 302         if (err) {
 303                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 304                 goto err_free_aux;
 305         }
 306
 307         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 308         if (err) {
 309                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 310                 goto err_unmap_aux;
 311         }
 312
 313         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
 314         if (err) {
 315                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 316                 goto err_unmap_cmpt;
 317         }
 318
 319         /*
 320          * Reserved MTT entries must be aligned up to a cacheline
 321          * boundary, since the FW will write to them, while the driver
 322          * writes to all other MTT entries. (The variable
 323          * dev->caps.mtt_entry_sz below is really the MTT segment
 324          * size, not the raw entry size)
 325          */
 326         dev->caps.reserved_mtts =
 327                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 328                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 329         if ( dev->pdev->p_self_do->AlignmentRequirement + 1 != dma_get_cache_alignment()) {
 330                 mlx4_dbg(dev, "Cache-line size %d, recommended value %d.\n",
 331                         dev->pdev->p_self_do->AlignmentRequirement + 1,
 332                         dma_get_cache_alignment() );
 333         }
 334
 335         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 336                                   init_hca->mtt_base,
 337                                   dev->caps.mtt_entry_sz,
 338                                   dev->caps.num_mtt_segs,
 339                                   dev->caps.reserved_mtts, 1, 0);
 340         if (err) {
 341                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 342                 goto err_unmap_eq;
 343         }
 344
 345         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 346                                   init_hca->dmpt_base,
 347                                   dev_cap->dmpt_entry_sz,
 348                                   dev->caps.num_mpts,
 349                                   dev->caps.reserved_mrws, 1, 1);
 350         if (err) {
 351                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 352                 goto err_unmap_mtt;
 353         }
 354
 355         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 356                                   init_hca->qpc_base,
 357                                   dev_cap->qpc_entry_sz,
 358                                   dev->caps.num_qps,
 359                                   dev->caps.reserved_qps, 0, 0);
 360         if (err) {
 361                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 362                 goto err_unmap_dmpt;
 363         }
 364
 365         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 366                                   init_hca->auxc_base,
 367                                   dev_cap->aux_entry_sz,
 368                                   dev->caps.num_qps,
 369                                   dev->caps.reserved_qps, 0, 0);
 370         if (err) {
 371                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 372                 goto err_unmap_qp;
 373         }
 374
 375         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 376                                   init_hca->altc_base,
 377                                   dev_cap->altc_entry_sz,
 378                                   dev->caps.num_qps,
 379                                   dev->caps.reserved_qps, 0, 0);
 380         if (err) {
 381                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 382                 goto err_unmap_auxc;
 383         }
 384
 385         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 386                                   init_hca->rdmarc_base,
 387                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 388                                   dev->caps.num_qps,
 389                                   dev->caps.reserved_qps, 0, 0);
 390         if (err) {
 391                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 392                 goto err_unmap_altc;
 393         }
 394
 395         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 396                                   init_hca->cqc_base,
 397                                   dev_cap->cqc_entry_sz,
 398                                   dev->caps.num_cqs,
 399                                   dev->caps.reserved_cqs, 0, 0);
 400         if (err) {
 401                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 402                 goto err_unmap_rdmarc;
 403         }
 404
 405         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 406                                   init_hca->srqc_base,
 407                                   dev_cap->srq_entry_sz,
 408                                   dev->caps.num_srqs,
 409                                   dev->caps.reserved_srqs, 0, 0);
 410         if (err) {
 411                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 412                 goto err_unmap_cq;
 413         }
 414
 415         /*
 416          * It's not strictly required, but for simplicity just map the
 417          * whole multicast group table now.  The table isn't very big
 418          * and it's a lot easier than trying to track ref counts.
 419          */
 420         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 421                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
 422                                   dev->caps.num_mgms + dev->caps.num_amgms,
 423                                   dev->caps.num_mgms + dev->caps.num_amgms,
 424                                   0, 0);
 425         if (err) {
 426                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 427                 goto err_unmap_srq;
 428         }
 429
 430         return 0;
 431
 432 err_unmap_srq:
 433         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 434
 435 err_unmap_cq:
 436         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 437
 438 err_unmap_rdmarc:
 439         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 440
 441 err_unmap_altc:
 442         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 443
 444 err_unmap_auxc:
 445         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 446
 447 err_unmap_qp:
 448         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 449
 450 err_unmap_dmpt:
 451         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 452
 453 err_unmap_mtt:
 454         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 455
 456 err_unmap_eq:
 457         mlx4_unmap_eq_icm(dev);
 458
 459 err_unmap_cmpt:
 460         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 461         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 462         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 463         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 464
 465 err_unmap_aux:
 466         mlx4_UNMAP_ICM_AUX(dev);
 467
 468 err_free_aux:
 469         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 470
 471         return err;
 472 }
 473
 474 static void mlx4_free_icms(struct mlx4_dev *dev)
 475 {
 476         struct mlx4_priv *priv = mlx4_priv(dev);
 477
 478         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
 479         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 480         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 481         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 482         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 483         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 484         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 485         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 486         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 487         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 488         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 489         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 490         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 491         mlx4_unmap_eq_icm(dev);
 492
 493         mlx4_UNMAP_ICM_AUX(dev);
 494         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 495 }
 496
 497 static void mlx4_close_hca(struct mlx4_dev *dev)
 498 {
 499         mlx4_CLOSE_HCA(dev, 0);
 500         mlx4_free_icms(dev);
 501         mlx4_UNMAP_FA(dev);
 502         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
 503 }
 504
 505 static int mlx4_init_hca(struct mlx4_dev *dev)
 506 {
 507         struct mlx4_priv          *priv = mlx4_priv(dev);
 508         struct mlx4_adapter        adapter;
 509         struct mlx4_dev_cap        dev_cap;
 510         struct mlx4_profile        profile;
 511         struct mlx4_init_hca_param init_hca;
 512         u64 icm_size;
 513         int err;
 514
 515         err = mlx4_QUERY_FW(dev);
 516         if (err) {
 517                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
 518                 return err;
 519         }
 520
 521         err = mlx4_load_fw(dev);
 522         if (err) {
 523                 mlx4_err(dev, "Failed to start FW, aborting.\n");
 524                 return err;
 525         }
 526
 527         err = mlx4_dev_cap(dev, &dev_cap);
 528         if (err) {
 529                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 530                 goto err_stop_fw;
 531         }
 532
 533         process_mod_param_profile();
 534         profile = default_profile;
 535
 536         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
 537         if ((long long) icm_size < 0) {
 538                 err = (int)icm_size;
 539                 goto err_stop_fw;
 540         }
 541
 542         init_hca.log_uar_sz = (u8)ilog2(dev->caps.num_uars);
 543
 544         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
 545         if (err)
 546                 goto err_stop_fw;
 547
 548         err = mlx4_INIT_HCA(dev, &init_hca);
 549         if (err) {
 550                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
 551                 goto err_free_icm;
 552         }
 553
 554         err = mlx4_QUERY_ADAPTER(dev, &adapter);
 555         if (err) {
 556                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
 557                 goto err_close;
 558         }
 559
 560         priv->eq_table.inta_pin = adapter.inta_pin;
 561         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
 562
 563         return 0;
 564
 565 err_close:
 566         mlx4_close_hca(dev);
 567
 568 err_free_icm:
 569         mlx4_free_icms(dev);
 570
 571 err_stop_fw:
 572         mlx4_UNMAP_FA(dev);
 573         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 574
 575         return err;
 576 }
 577
 578 static int mlx4_setup_hca(struct mlx4_dev *dev)
 579 {
 580         struct mlx4_priv *priv = mlx4_priv(dev);
 581         int err;
 582
 583         err = mlx4_init_uar_table(dev);
 584         if (err) {
 585                 mlx4_err(dev, "Failed to initialize "
 586                          "user access region table, aborting.\n");
 587                 return err;
 588         }
 589
 590         err = mlx4_uar_alloc(dev, &priv->driver_uar);
 591         if (err) {
 592                 mlx4_err(dev, "Failed to allocate driver access region, "
 593                          "aborting.\n");
 594                 goto err_uar_table_free;
 595         }
 596
 597         priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
 598         if (!priv->kar) {
 599                 mlx4_err(dev, "Couldn't map kernel access region, "
 600                          "aborting.\n");
 601                 err = -ENOMEM;
 602                 goto err_uar_free;
 603         }
 604
 605         err = mlx4_init_pd_table(dev);
 606         if (err) {
 607                 mlx4_err(dev, "Failed to initialize "
 608                          "protection domain table, aborting.\n");
 609                 goto err_kar_unmap;
 610         }
 611
 612         err = mlx4_init_mr_table(dev);
 613         if (err) {
 614                 mlx4_err(dev, "Failed to initialize "
 615                          "memory region table, aborting.\n");
 616                 goto err_pd_table_free;
 617         }
 618
 619
 620         err = mlx4_init_eq_table(dev);
 621         if (err) {
 622                 mlx4_err(dev, "Failed to initialize "
 623                          "event queue table, aborting.\n");
 624                 goto err_mr_table_free;
 625         }
 626
 627         err = mlx4_cmd_use_events(dev);
 628         if (err) {
 629                 mlx4_err(dev, "Failed to switch to event-driven "
 630                          "firmware commands, aborting.\n");
 631                 goto err_eq_table_free;
 632         }
 633
 634         err = mlx4_NOP(dev);
 635         if (err) {
 636                 if (dev->flags & MLX4_FLAG_MSI_X) {
 637                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
 638                                   "interrupt IRQ %d).\n",
 639                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 640                         mlx4_warn(dev, "Trying again without MSI-X.\n");
 641                 } else {
 642                         mlx4_err(dev, "NOP command failed to generate interrupt "
 643                                  "(IRQ %d), aborting.\n",
 644                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 645                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
 646                 }
 647
 648                 goto err_cmd_poll;
 649         }
 650
 651         mlx4_dbg(dev, "NOP command IRQ test passed\n");
 652
 653         err = mlx4_init_cq_table(dev);
 654         if (err) {
 655                 mlx4_err(dev, "Failed to initialize "
 656                          "completion queue table, aborting.\n");
 657                 goto err_cmd_poll;
 658         }
 659
 660         err = mlx4_init_srq_table(dev);
 661         if (err) {
 662                 mlx4_err(dev, "Failed to initialize "
 663                          "shared receive queue table, aborting.\n");
 664                 goto err_cq_table_free;
 665         }
 666
 667         err = mlx4_init_qp_table(dev);
 668         if (err) {
 669                 mlx4_err(dev, "Failed to initialize "
 670                          "queue pair table, aborting.\n");
 671                 goto err_srq_table_free;
 672         }
 673
 674         err = mlx4_init_mcg_table(dev);
 675         if (err) {
 676                 mlx4_err(dev, "Failed to initialize "
 677                          "multicast group table, aborting.\n");
 678                 goto err_qp_table_free;
 679         }
 680
 681         return 0;
 682
 683 err_qp_table_free:
 684         mlx4_cleanup_qp_table(dev);
 685
 686 err_srq_table_free:
 687         mlx4_cleanup_srq_table(dev);
 688
 689 err_cq_table_free:
 690         mlx4_cleanup_cq_table(dev);
 691
 692 err_cmd_poll:
 693         mlx4_cmd_use_polling(dev);
 694
 695 err_eq_table_free:
 696         mlx4_cleanup_eq_table(dev);
 697
 698 err_mr_table_free:
 699         mlx4_cleanup_mr_table(dev);
 700
 701 err_pd_table_free:
 702         mlx4_cleanup_pd_table(dev);
 703
 704 err_kar_unmap:
 705         iounmap(priv->kar,PAGE_SIZE);
 706
 707 err_uar_free:
 708         mlx4_uar_free(dev, &priv->driver_uar);
 709
 710 err_uar_table_free:
 711         mlx4_cleanup_uar_table(dev);
 712         return err;
 713 }
 714
 715 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
 716 {
 717 #ifdef CONFIG_PCI_MSI
 718         struct mlx4_priv *priv = mlx4_priv(dev);
 719         struct msix_entry entries[MLX4_NUM_EQ];
 720         int err;
 721         int i;
 722
 723         if (msi_x) {
 724                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 725                         entries[i].entry = i;
 726
 727                 err = pci_enable_msix(dev->pdev, entries, ARRAY_SIZE(entries));
 728                 if (err) {
 729                         if (err > 0)
 730                                 mlx4_info(dev, "Only %d MSI-X vectors available, "
 731                                           "not using MSI-X\n", err);
 732                         goto no_msi;
 733                 }
 734
 735                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 736                         priv->eq_table.eq[i].irq = entries[i].vector;
 737
 738                 dev->flags |= MLX4_FLAG_MSI_X;
 739                 return;
 740         }
 741
 742 no_msi:
 743         for (i = 0; i < MLX4_NUM_EQ; ++i)
 744                 priv->eq_table.eq[i].irq = dev->pdev->irq;
 745
 746 #else
 747         UNUSED_PARAM(dev);
 748 #endif
 749 }
 750
 751
 752 static struct pci_device_id * mlx4_find_pci_dev(USHORT ven_id, USHORT dev_id)
 753 {
 754         struct pci_device_id *p_id = mlx4_pci_table;
 755         int i;
 756
 757         // find p_id (appropriate line in mlx4_pci_table)
 758         for (i = 0; i < MLX4_PCI_TABLE_SIZE; ++i, ++p_id) {
 759                 if (p_id->device == dev_id && p_id->vendor ==  ven_id)
 760                         return p_id;
 761         }
 762         return NULL;
 763 }
 764
 765 int mlx4_init_one(struct pci_dev *pdev)
 766 {
 767         struct pci_device_id *id;
 768         struct mlx4_priv *priv;
 769         struct mlx4_dev *dev;
 770         int err;
 771
 772 #ifdef FORCE_LIVEFISH
 773                 if (pdev)
 774                         goto err;
 775 #endif
 776
 777         /* find the type of device */
 778         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
 779         if (id == NULL) {
 780                 err = -ENOSYS;
 781                 goto err;
 782         }
 783
 784         /*
 785          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
 786          * be present)
 787          */
 788         if (pci_resource_len(pdev, 0) != 1 << 20) {
 789                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
 790                         ("Missing DCS, aborting.\n"));
 791                 err = -ENODEV;
 792                 goto err;
 793         }
 794         if (!pci_resource_len(pdev, 1)) {
 795                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
 796                         ("Missing UAR, aborting.\n"));
 797                 err = -ENODEV;
 798                 goto err;
 799         }
 800
 801 run_as_livefish:
 802         /* allocate mlx4_priv structure */
 803         priv = kzalloc(sizeof *priv, GFP_KERNEL);
 804         if (!priv) {
 805                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
 806                         ("Device struct alloc failed, aborting.\n"));
 807                 err = -ENOMEM;
 808                 goto end;
 809         }
 810         /* must be here for livefish */
 811         INIT_LIST_HEAD(&priv->ctx_list);
 812         spin_lock_init(&priv->ctx_lock);
 813
 814         /* deal with livefish, if any */
 815         dev       = &priv->dev;
 816         dev->pdev = pdev;
 817         pdev->dev = dev;
 818         if (id->driver_data == LIVEFISH)
 819                 dev->flags |= MLX4_FLAG_LIVEFISH;
 820         if (mlx4_is_livefish(dev)) {
 821                 err = mlx4_register_device(dev);
 822                 if (err)
 823                         MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
 824                                 ("mlx4_register_device for livefish failed, trying to proceed.\n"));
 825                 goto end;
 826         }
 827
 828         /*
 829          * Now reset the HCA before we touch the PCI capabilities or
 830          * attempt a firmware command, since a boot ROM may have left
 831          * the HCA in an undefined state.
 832          */
 833         err = mlx4_reset(dev);
 834         if (err) {
 835                 mlx4_err(dev, "Failed to reset HCA, aborting.\n");
 836                 goto err_free_dev;
 837         }
 838
 839         if (mlx4_cmd_init(dev)) {
 840                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
 841                 goto err_free_dev;
 842         }
 843
 844         err = mlx4_init_hca(dev);
 845         if (err)
 846                 goto err_cmd;
 847
 848         mlx4_enable_msi_x(dev);
 849
 850         err = mlx4_setup_hca(dev);
 851         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
 852 #ifdef CONFIG_PCI_MSI
 853                 dev->flags &= ~MLX4_FLAG_MSI_X;
 854                 pci_disable_msix(pdev);
 855 #endif
 856                 err = mlx4_setup_hca(dev);
 857         }
 858
 859         if (err)
 860                 goto err_close;
 861
 862         err = mlx4_register_device(dev);
 863         if (err)
 864                 goto err_cleanup;
 865
 866         mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is INITIALIZED ! \n", (int)pdev->dev_id);
 867         return 0;
 868
 869 err_cleanup:
 870         mlx4_cleanup_mcg_table(dev);
 871         mlx4_cleanup_qp_table(dev);
 872         mlx4_cleanup_srq_table(dev);
 873         mlx4_cleanup_cq_table(dev);
 874         mlx4_cmd_use_polling(dev);
 875         mlx4_cleanup_eq_table(dev);
 876         mlx4_cleanup_mr_table(dev);
 877         mlx4_cleanup_pd_table(dev);
 878         mlx4_cleanup_uar_table(dev);
 879
 880 err_close:
 881 #ifdef CONFIG_PCI_MSI
 882         if (dev->flags & MLX4_FLAG_MSI_X)
 883                 pci_disable_msix(pdev);
 884 #endif
 885
 886         mlx4_close_hca(dev);
 887
 888 err_cmd:
 889         mlx4_cmd_cleanup(dev);
 890
 891 err_free_dev:
 892         kfree(priv);
 893
 894 err:
 895         /* we failed device initialization - try to simulate "livefish" device to facilitate using FW burning tools */
 896         pdev->dev_id = DEVID_HERMON_BD;
 897         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
 898         if (id == NULL) {
 899                 err = -ENOSYS;
 900                 goto end;
 901         }
 902         goto run_as_livefish;
 903
 904 end:
 905         return err;
 906 }
 907
 908 void mlx4_remove_one(struct pci_dev *pdev)
 909 {
 910         struct mlx4_dev  *dev  = pdev->dev;
 911         struct mlx4_priv *priv = mlx4_priv(dev);
 912         int p;
 913
 914         if (dev) {
 915                 mlx4_unregister_device(dev);
 916                 if (mlx4_is_livefish(dev))
 917                         goto done;
 918
 919                 for (p = 1; p <= dev->caps.num_ports; ++p)
 920                         mlx4_CLOSE_PORT(dev, p);
 921
 922                 mlx4_cleanup_mcg_table(dev);
 923                 mlx4_cleanup_qp_table(dev);
 924                 mlx4_cleanup_srq_table(dev);
 925                 mlx4_cleanup_cq_table(dev);
 926                 mlx4_cmd_use_polling(dev);
 927                 mlx4_cleanup_eq_table(dev);
 928                 mlx4_cleanup_mr_table(dev);
 929                 mlx4_cleanup_pd_table(dev);
 930
 931                 iounmap(priv->kar,PAGE_SIZE);
 932                 mlx4_uar_free(dev, &priv->driver_uar);
 933                 mlx4_cleanup_uar_table(dev);
 934                 mlx4_close_hca(dev);
 935                 mlx4_cmd_cleanup(dev);
 936
 937 #ifdef CONFIG_PCI_MSI
 938                 if (dev->flags & MLX4_FLAG_MSI_X)
 939                         pci_disable_msix(pdev);
 940 #endif
 941
 942                 mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is REMOVED ! \n", (int)pdev->dev_id);
 943                 pdev->dev = NULL;
 944 done:
 945                 kfree(priv);
 946         }
 947 }
 948
 949 int mlx4_restart_one(struct pci_dev *pdev)
 950 {
 951         mlx4_remove_one(pdev);
 952         return mlx4_init_one(pdev);
 953 }
 954
 955 void mlx4_net_init()
 956 {
 957         mlx4_intf_init();
 958 }
 959