51ae38cfa9d8c6f3ffb971ae23a5c14f7ce8e70e
[mirror/winof/.git] / hw / mlx4 / kernel / bus / net / main.c
1 /*
2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * OpenIB.org BSD license below:
12  *
13  *     Redistribution and use in source and binary forms, with or
14  *     without modification, are permitted provided that the following
15  *     conditions are met:
16  *
17  *      - Redistributions of source code must retain the above
18  *        copyright notice, this list of conditions and the following
19  *        disclaimer.
20  *
21  *      - Redistributions in binary form must reproduce the above
22  *        copyright notice, this list of conditions and the following
23  *        disclaimer in the documentation and/or other materials
24  *        provided with the distribution.
25  *
26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33  * SOFTWARE.
34  */
35
36
37 #include "mlx4.h"
38 #include "fw.h"
39 #include "icm.h"
40 #include "device.h"
41 #include "doorbell.h"
42 #include "complib\cl_thread.h"
43 #include <mlx4_debug.h>
44
45 #if defined(EVENT_TRACING)
46 #ifdef offsetof
47 #undef offsetof
48 #endif
49 #include "main.tmh"
50 #endif
51
52
53 static struct mlx4_profile default_profile = {
54         1 << 17,        /* num_qp               */
55         1 << 4,         /* rdmarc_per_qp        */
56         1 << 16,        /* num_srq      */
57         1 << 16,        /* num_cq               */
58         1 << 13,        /* num_mcg      */
59         1 << 18,        /* num_mpt      */ 
60         1 << 20         /* num_mtt      */
61 };
62
63 static void process_mod_param_profile(void)
64 {
65         if (g.mod_num_qp)
66                 default_profile.num_qp = 1 << g.mod_num_qp;
67
68         if (g.mod_rdmarc_per_qp)
69                 default_profile.rdmarc_per_qp = 1 << g.mod_rdmarc_per_qp;
70
71         if (g.mod_num_srq)
72                 default_profile.num_srq = 1 << g.mod_num_srq;
73
74         if (g.mod_num_cq)
75                 default_profile.num_cq = 1 << g.mod_num_cq;
76
77         if (g.mod_num_mcg)
78                 default_profile.num_mcg = 1 << g.mod_num_mcg;
79
80         if (g.mod_num_mpt)
81                 default_profile.num_mpt = 1 << g.mod_num_mpt;
82
83         if (g.mod_num_mtt)
84                 default_profile.num_mtt = 1 << g.mod_num_mtt;
85 }
86
87 static struct pci_device_id 
88 mlx4_pci_table[] = {
89         HCA(MELLANOX, SDR,              HERMON),
90         HCA(MELLANOX, DDR,              HERMON),
91         HCA(MELLANOX, ETH,              HERMON),
92         HCA(MELLANOX, ETH_YATIR,                HERMON),
93         HCA(MELLANOX, DDR_G2,           HERMON),
94         HCA(MELLANOX, QDR_G2,           HERMON),
95         HCA(MELLANOX, ETH_G2,           HERMON),
96         HCA(MELLANOX, ETH_YATIR_G2,     HERMON),
97         HCA(MELLANOX, ETH_B0_G2,        HERMON),
98         HCA(MELLANOX, ETH_B0_40Gb_G2,   HERMON),
99         HCA(MELLANOX, BD,               LIVEFISH),
100 };
101 #define MLX4_PCI_TABLE_SIZE (sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))
102
103
104 static int mlx4_check_port_params(struct mlx4_dev *dev,
105                                   enum mlx4_port_type *port_type)
106 {
107         if (port_type[0] != port_type[1] &&
108             !(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
109                 mlx4_err(dev, "Only same port types supported "
110                               "on this HCA, aborting.\n");
111                 return -EINVAL;
112         }
113         if ((port_type[0] == MLX4_PORT_TYPE_ETH) &&
114             (port_type[1] == MLX4_PORT_TYPE_IB)) {
115                 mlx4_err(dev, "eth-ib configuration is not supported.\n");
116                 return -EINVAL;
117         }
118         return 0;
119 }
120
121 static void mlx4_str2port_type(WCHAR **port_str,
122                                enum mlx4_port_type *port_type)
123 {
124         int i;
125
126         for (i = 0; i < MLX4_MAX_PORTS; i++) {
127                 if (!wcscmp(port_str[i], L"eth"))
128                         port_type[i] = MLX4_PORT_TYPE_ETH;
129                 else
130                         port_type[i] = MLX4_PORT_TYPE_IB;
131         }
132 }
133
134 int mlx4_count_ib_ports(struct mlx4_dev *dev)
135 {
136         int i;
137         int count = 0;
138
139         for (i = 0; i < MLX4_MAX_PORTS; i++) {
140                 if (dev->caps.port_type[i+1] == MLX4_PORT_TYPE_IB) {
141                         count++;
142                 }
143         }
144         return count;
145 }
146
147 BOOLEAN mlx4_is_eth_port(struct mlx4_dev *dev, int port_number)
148 {
149         if (dev->caps.port_type[port_number+1] == MLX4_PORT_TYPE_ETH) {
150                 return TRUE;
151         }
152         return FALSE;
153 }
154
155 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
156 {
157         int err;
158         int i;
159         int num_eth_ports = 0;
160         enum mlx4_port_type port_type[MLX4_MAX_PORTS];
161         struct mlx4_dev *mdev = dev;
162
163         for (i = 0; i < MLX4_MAX_PORTS; i++) 
164                 port_type[i] = dev->dev_params.mod_port_type[i];
165
166         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
167         if (err) {
168                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
169                 return err;
170         }
171
172         if (dev_cap->min_page_sz > PAGE_SIZE) {
173                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
174                          "kernel PAGE_SIZE of %ld, aborting.\n",
175                          dev_cap->min_page_sz, PAGE_SIZE);
176                 return -ENODEV;
177         }
178         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
179                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
180                          "aborting.\n",
181                          dev_cap->num_ports, MLX4_MAX_PORTS);
182                 return -ENODEV;
183         }
184
185         if (dev_cap->uar_size > (int)pci_resource_len(dev->pdev, 2)) {
186                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
187                          "PCI resource 2 size of 0x%llx, aborting.\n",
188                          dev_cap->uar_size,
189                          (unsigned long long) pci_resource_len(dev->pdev, 2));
190                 return -ENODEV;
191         }
192
193         dev->caps.num_ports          = dev_cap->num_ports;
194         for (i = 1; i <= dev->caps.num_ports; ++i) {
195                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
196                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];       
197                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
198                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
199                 dev->caps.port_width_cap[i] = (u8)dev_cap->max_port_width[i];
200                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
201                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];        
202         }
203
204         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
205         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
206         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
207         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
208         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
209         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
210         dev->caps.max_wqes           = dev_cap->max_qp_sz;
211         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
212         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
213         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
214         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
215         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
216         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
217         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
218         /*
219          * Subtract 1 from the limit because we need to allocate a
220          * spare CQE so the HCA HW can tell the difference between an
221          * empty CQ and a full CQ.
222          */
223         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
224         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
225         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
226         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
227                                                     MLX4_MTT_ENTRY_PER_SEG);
228         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
229         dev->caps.reserved_uars      = dev_cap->reserved_uars;
230         dev->caps.reserved_pds       = dev_cap->reserved_pds;
231         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
232         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
233         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
234         dev->caps.flags              = dev_cap->flags;
235         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
236         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
237
238         dev->caps.log_num_macs  = ilog2(roundup_pow_of_two
239                                         (g.mod_num_mac + 1));
240         dev->caps.log_num_vlans = ilog2(roundup_pow_of_two
241                                         (g.mod_num_vlan + 2));
242         dev->caps.log_num_prios = (g.mod_use_prio)? 3: 0;
243         dev->caps.num_fc_exch = g.mod_num_fc_exch;
244
245         err = mlx4_check_port_params(dev, port_type);
246         if (err)
247                 return err;
248
249         for (i = 1; i <= dev->caps.num_ports; ++i) {
250                 if (!dev_cap->supported_port_types[i]) {
251                         mlx4_warn(dev, "FW doesn't support Multi Protocol, "
252                                        "loading IB only\n");
253                         dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
254                         continue;
255                 }
256                 if (port_type[i-1] & dev_cap->supported_port_types[i])
257                         dev->caps.port_type[i] = port_type[i-1];
258                 else {
259                         MLX4_PRINT_EV(TRACE_LEVEL_WARNING,MLX4_DBG_DRV ,
260                                 ("Requested port type %#x for port %d is "
261                                 "not supported by HW. Supported %#x. We'll working to the supported one! \n", 
262                                 port_type[i-1], i, (int)dev_cap->supported_port_types[i]));
263                         MLX4_PRINT_EV(TRACE_LEVEL_WARNING ,MLX4_DBG_DRV ,
264                                 ("Ven %x Dev %d Fw %d.%d.%d, IsBurnDevice %s\n", 
265                                 (unsigned)dev->pdev->ven_id, (unsigned)dev->pdev->dev_id,
266                                 (int) (dev->caps.fw_ver >> 32),
267                                 (int) (dev->caps.fw_ver >> 16) & 0xffff, 
268                                 (int) (dev->caps.fw_ver & 0xffff),
269                                 mlx4_is_livefish(dev) ? "Y" : "N"
270                                 ));
271                         
272                         dev->caps.port_type[i] = dev_cap->supported_port_types[i];
273                 }
274                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
275                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
276                         mlx4_warn(dev, "Requested number of MACs is too much "
277                                        "for port %d, reducing to %d.\n",
278                                         i, 1 << dev->caps.log_num_macs);
279                 }
280                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
281                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
282                         mlx4_warn(dev, "Requested number of VLANs is too much "
283                                        "for port %d, reducing to %d.\n",
284                                         i, 1 << dev->caps.log_num_vlans);
285                 }
286                 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
287                         ++num_eth_ports;
288         }
289
290         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
291         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
292                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
293                 (1 << dev->caps.log_num_macs)*
294                 (1 << dev->caps.log_num_vlans)*
295                 (1 << dev->caps.log_num_prios)*
296                 num_eth_ports;
297         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = dev->caps.num_fc_exch;
298
299         return 0;
300 }
301
302 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
303 {
304         struct mlx4_priv *priv = mlx4_priv(dev);
305         int err;
306
307         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
308                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
309         if (!priv->fw.fw_icm) {
310                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
311                 return -ENOMEM;
312         }
313
314         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
315         if (err) {
316                 mlx4_dbg(dev, "MAP_FA command failed, aborting.\n");
317                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_MAP_FA, 0, 0, 1,
318                         L"%d", err );
319                 goto err_free;
320         }
321
322         err = mlx4_RUN_FW(dev);
323         if (err) {
324                 mlx4_dbg(dev, "RUN_FW command failed, aborting.\n");
325                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_RUN_FW, 0, 0, 1,
326                         L"%d", err );
327                 goto err_unmap_fa;
328         }
329
330         return 0;
331
332 err_unmap_fa:
333         mlx4_UNMAP_FA(dev);
334
335 err_free:
336         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
337         return err;
338 }
339
340 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
341                                           int cmpt_entry_sz)
342 {
343         struct mlx4_priv *priv = mlx4_priv(dev);
344         int err;
345
346         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
347                                   cmpt_base +
348                                   ((u64) (MLX4_CMPT_TYPE_QP *
349                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
350                                   cmpt_entry_sz, dev->caps.num_qps,
351                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
352                                   0, 0);
353         if (err)
354                 goto err;
355
356         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
357                                   cmpt_base +
358                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
359                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
360                                   cmpt_entry_sz, dev->caps.num_srqs,
361                                   dev->caps.reserved_srqs, 0, 0);
362         if (err)
363                 goto err_qp;
364
365         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
366                                   cmpt_base +
367                                   ((u64) (MLX4_CMPT_TYPE_CQ *
368                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
369                                   cmpt_entry_sz, dev->caps.num_cqs,
370                                   dev->caps.reserved_cqs, 0, 0);
371         if (err)
372                 goto err_srq;
373
374         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
375                                   cmpt_base +
376                                   ((u64) (MLX4_CMPT_TYPE_EQ *
377                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
378                                   cmpt_entry_sz,
379                                   roundup_pow_of_two(MLX4_NUM_EQ +
380                                                      dev->caps.reserved_eqs),
381                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
382         if (err)
383                 goto err_cq;
384
385         return 0;
386
387 err_cq:
388         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
389
390 err_srq:
391         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
392
393 err_qp:
394         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
395
396 err:
397         return err;
398 }
399
400 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
401                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
402 {
403         struct mlx4_priv *priv = mlx4_priv(dev);
404         u64 aux_pages;
405         int err;
406
407         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
408         if (err) {
409                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
410                 return err;
411         }
412
413         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
414                  (unsigned long long) icm_size >> 10,
415                  (unsigned long long) aux_pages << 2);
416
417         priv->fw.aux_icm = mlx4_alloc_icm(dev, (int)aux_pages,
418                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
419         if (!priv->fw.aux_icm) {
420                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
421                 return -ENOMEM;
422         }
423
424         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
425         if (err) {
426                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
427                 goto err_free_aux;
428         }
429
430         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
431         if (err) {
432                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
433                 goto err_unmap_aux;
434         }
435
436         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
437         if (err) {
438                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
439                 goto err_unmap_cmpt;
440         }
441
442         /*
443          * Reserved MTT entries must be aligned up to a cacheline
444          * boundary, since the FW will write to them, while the driver
445          * writes to all other MTT entries. (The variable
446          * dev->caps.mtt_entry_sz below is really the MTT segment
447          * size, not the raw entry size)
448          */
449         dev->caps.reserved_mtts =
450                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
451                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
452         if ( dev->pdev->p_self_do->AlignmentRequirement + 1 != dma_get_cache_alignment()) {
453                 mlx4_dbg(dev, "Cache-line size %d, recommended value %d.\n",
454                         dev->pdev->p_self_do->AlignmentRequirement + 1,
455                         dma_get_cache_alignment() );
456         }
457
458         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
459                                   init_hca->mtt_base,
460                                   dev->caps.mtt_entry_sz,
461                                   dev->caps.num_mtt_segs,
462                                   dev->caps.reserved_mtts, 1, 0);
463         if (err) {
464                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
465                 goto err_unmap_eq;
466         }
467
468         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
469                                   init_hca->dmpt_base,
470                                   dev_cap->dmpt_entry_sz,
471                                   dev->caps.num_mpts,
472                                   dev->caps.reserved_mrws, 1, 1);
473         if (err) {
474                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
475                 goto err_unmap_mtt;
476         }
477
478         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
479                                   init_hca->qpc_base,
480                                   dev_cap->qpc_entry_sz,
481                                   dev->caps.num_qps,
482                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
483                                   0, 0);
484         if (err) {
485                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
486                 goto err_unmap_dmpt;
487         }
488
489         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
490                                   init_hca->auxc_base,
491                                   dev_cap->aux_entry_sz,
492                                   dev->caps.num_qps,
493                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
494                                   0, 0);
495         if (err) {
496                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
497                 goto err_unmap_qp;
498         }
499
500         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
501                                   init_hca->altc_base,
502                                   dev_cap->altc_entry_sz,
503                                   dev->caps.num_qps,
504                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
505                                   0, 0);
506         if (err) {
507                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
508                 goto err_unmap_auxc;
509         }
510
511         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
512                                   init_hca->rdmarc_base,
513                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
514                                   dev->caps.num_qps,
515                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
516                                   0, 0);
517         if (err) {
518                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
519                 goto err_unmap_altc;
520         }
521
522         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
523                                   init_hca->cqc_base,
524                                   dev_cap->cqc_entry_sz,
525                                   dev->caps.num_cqs,
526                                   dev->caps.reserved_cqs, 0, 0);
527         if (err) {
528                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
529                 goto err_unmap_rdmarc;
530         }
531
532         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
533                                   init_hca->srqc_base,
534                                   dev_cap->srq_entry_sz,
535                                   dev->caps.num_srqs,
536                                   dev->caps.reserved_srqs, 0, 0);
537         if (err) {
538                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
539                 goto err_unmap_cq;
540         }
541
542         /*
543          * It's not strictly required, but for simplicity just map the
544          * whole multicast group table now.  The table isn't very big
545          * and it's a lot easier than trying to track ref counts.
546          */
547         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
548                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
549                                   dev->caps.num_mgms + dev->caps.num_amgms,
550                                   dev->caps.num_mgms + dev->caps.num_amgms,
551                                   0, 0);
552         if (err) {
553                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
554                 goto err_unmap_srq;
555         }
556
557         return 0;
558
559 err_unmap_srq:
560         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
561
562 err_unmap_cq:
563         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
564
565 err_unmap_rdmarc:
566         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
567
568 err_unmap_altc:
569         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
570
571 err_unmap_auxc:
572         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
573
574 err_unmap_qp:
575         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
576
577 err_unmap_dmpt:
578         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
579
580 err_unmap_mtt:
581         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
582
583 err_unmap_eq:
584         mlx4_unmap_eq_icm(dev);
585
586 err_unmap_cmpt:
587         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
588         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
589         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
590         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
591
592 err_unmap_aux:
593         mlx4_UNMAP_ICM_AUX(dev);
594
595 err_free_aux:
596         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
597
598         return err;
599 }
600
601 static void mlx4_free_icms(struct mlx4_dev *dev)
602 {
603         struct mlx4_priv *priv = mlx4_priv(dev);
604
605         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
606         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
607         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
608         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
609         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
610         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
611         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
612         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
613         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
614         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
615         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
616         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
617         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
618         mlx4_unmap_eq_icm(dev);
619
620         mlx4_UNMAP_ICM_AUX(dev);
621         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
622     priv->fw.aux_icm = NULL;
623 }
624
625 static void mlx4_close_hca(struct mlx4_dev *dev)
626 {
627         mlx4_CLOSE_HCA(dev, 0);
628         mlx4_free_icms(dev);
629         mlx4_UNMAP_FA(dev);
630         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
631 }
632
633 static int mlx4_init_hca(struct mlx4_dev *dev)
634 {
635         struct mlx4_priv          *priv = mlx4_priv(dev);
636         struct mlx4_adapter        adapter;
637         struct mlx4_dev_cap        dev_cap;
638         struct mlx4_profile        profile;
639         struct mlx4_init_hca_param init_hca;
640         u64 icm_size;
641         int err;
642
643         err = mlx4_QUERY_FW(dev);
644         if (err) {
645                 if (err == -EACCES) {
646                         static int print_it = 1;
647                         if (print_it-- > 0) {
648                                 mlx4_info(dev, "Function disabled, please upgrade to multi function driver.\n");
649                                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_WARN_QUERY_FW, 0, 0, 0 );
650                         }
651                 }
652                 else {
653                         mlx4_dbg(dev, "QUERY_FW command failed, aborting.\n");
654                         WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_FW, 0, 0, 1,
655                                 L"%d", err );
656                 }
657                 return err;
658         }
659
660         err = mlx4_load_fw(dev);
661         if (err) {
662                 mlx4_dbg(dev, "Failed to start FW, aborting.\n");
663                 return err;
664         }
665
666         err = mlx4_dev_cap(dev, &dev_cap);
667         if (err) {
668                 mlx4_dbg(dev, "QUERY_DEV_CAP command failed, aborting.\n");
669                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_DEV_CAP, 0, 0, 1,
670                         L"%d", err );
671                 goto err_stop_fw;
672         }
673
674         process_mod_param_profile();
675         profile = default_profile;
676
677         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
678         if ((long long) icm_size < 0) {
679                 err = (int)icm_size;
680                 goto err_stop_fw;
681         }
682
683         init_hca.log_uar_sz = (u8)ilog2(dev->caps.num_uars);
684
685         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
686         if (err)
687                 goto err_stop_fw;
688
689         err = mlx4_INIT_HCA(dev, &init_hca);
690         if (err) {
691                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
692                 goto err_free_icm;
693         }
694
695         err = mlx4_QUERY_ADAPTER(dev, &adapter);
696         if (err) {
697                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
698                 WriteEventLogEntryData( dev->pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_QUERY_ADAPTER, 0, 0, 1,
699                         L"%d", err );
700                 goto err_close;
701         }
702
703         priv->eq_table.inta_pin = adapter.inta_pin;
704         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
705
706         return 0;
707
708 err_close:
709         mlx4_CLOSE_HCA(dev,0);
710
711 err_free_icm:
712         mlx4_free_icms(dev);
713
714 err_stop_fw:
715         mlx4_UNMAP_FA(dev);
716         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
717
718         return err;
719 }
720
721 static int mlx4_setup_hca(struct mlx4_dev *dev)
722 {
723         struct mlx4_priv *priv = mlx4_priv(dev);
724         int err;
725         u8 port;
726
727         err = mlx4_init_uar_table(dev);
728         if (err) {
729                 mlx4_err(dev, "Failed to initialize "
730                          "user access region table, aborting.\n");
731                 return err;
732         }
733
734         err = mlx4_uar_alloc(dev, &priv->driver_uar);
735         if (err) {
736                 mlx4_err(dev, "Failed to allocate driver access region, "
737                          "aborting.\n");
738                 goto err_uar_table_free;
739         }
740
741         priv->kar = ioremap((u64)priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
742         if (!priv->kar) {
743                 mlx4_err(dev, "Couldn't map kernel access region, "
744                          "aborting.\n");
745                 err = -ENOMEM;
746                 goto err_uar_free;
747         }
748
749         err = mlx4_init_pd_table(dev);
750         if (err) {
751                 mlx4_err(dev, "Failed to initialize "
752                          "protection domain table, aborting.\n");
753                 goto err_kar_unmap;
754         }
755
756         err = mlx4_init_mr_table(dev);
757         if (err) {
758                 mlx4_err(dev, "Failed to initialize "
759                          "memory region table, aborting.\n");
760                 goto err_pd_table_free;
761         }
762
763         
764         err = mlx4_init_eq_table(dev);
765         if (err) {
766                 mlx4_err(dev, "Failed to initialize "
767                          "event queue table, aborting.\n");
768                 goto err_mr_table_free;
769         }
770
771         err = mlx4_cmd_use_events(dev);
772         if (err) {
773                 mlx4_err(dev, "Failed to switch to event-driven "
774                          "firmware commands, aborting.\n");
775                 goto err_eq_table_free;
776         }
777
778         err = mlx4_NOP(dev);
779         if (err) {
780                 if (dev->flags & MLX4_FLAG_MSI_X) {
781                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
782                                   "interrupt IRQ %d.\n",
783                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
784                         mlx4_warn(dev, "Trying again without MSI-X.\n");
785                 } else {
786                         mlx4_err(dev, "NOP command failed to generate interrupt "
787                                  "(IRQ %d), aborting.\n",
788                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
789                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
790                 }
791
792                 goto err_cmd_poll;
793         }
794
795         mlx4_dbg(dev, "NOP command IRQ test passed\n");
796
797         err = mlx4_init_cq_table(dev);
798         if (err) {
799                 mlx4_err(dev, "Failed to initialize "
800                          "completion queue table, aborting.\n");
801                 goto err_cmd_poll;
802         }
803
804         err = mlx4_init_srq_table(dev);
805         if (err) {
806                 mlx4_err(dev, "Failed to initialize "
807                          "shared receive queue table, aborting.\n");
808                 goto err_cq_table_free;
809         }
810
811         err = mlx4_init_qp_table(dev);
812         if (err) {
813                 mlx4_err(dev, "Failed to initialize "
814                          "queue pair table, aborting.\n");
815                 goto err_srq_table_free;
816         }
817
818         err = mlx4_init_mcg_table(dev);
819         if (err) {
820                 mlx4_err(dev, "Failed to initialize "
821                          "multicast group table, aborting.\n");
822                 goto err_qp_table_free;
823         }
824         for (port = 1; port <= dev->caps.num_ports; port++) {
825                 err = mlx4_SET_PORT(dev, port,0 ,0);
826                 if (err) {
827                         mlx4_err(dev, "Failed to set port %d, aborting\n",
828                                  port);
829                         goto err_mcg_table_free;
830                 }
831         }
832
833         for (port = 0; port < dev->caps.num_ports; port++) {
834                 mlx4_init_mac_table(dev, port);
835                 mlx4_init_vlan_table(dev, port);
836         }
837
838         return 0;
839 err_mcg_table_free:
840         mlx4_cleanup_mcg_table(dev);
841
842 err_qp_table_free:
843         mlx4_cleanup_qp_table(dev);
844
845 err_srq_table_free:
846         mlx4_cleanup_srq_table(dev);
847
848 err_cq_table_free:
849         mlx4_cleanup_cq_table(dev);
850
851 err_cmd_poll:
852         mlx4_cmd_use_polling(dev);
853
854 err_eq_table_free:
855         mlx4_cleanup_eq_table(dev);
856
857 err_mr_table_free:
858         mlx4_cleanup_mr_table(dev);
859
860 err_pd_table_free:
861         mlx4_cleanup_pd_table(dev);
862
863 err_kar_unmap:
864         iounmap(priv->kar,PAGE_SIZE);
865
866 err_uar_free:
867         mlx4_uar_free(dev, &priv->driver_uar);
868
869 err_uar_table_free:
870         mlx4_cleanup_uar_table(dev);
871         return err;
872 }
873
874 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
875 {
876         int i, n_cpus;
877         u64 cpus;
878
879         /* calculate the number of processors */
880         cpus = (u64)KeQueryActiveProcessors();
881         for (i=0,n_cpus=0; i<(sizeof(KAFFINITY)<<3); i++) {
882                 if ((1I64<<i) & cpus)
883                         n_cpus++;
884         }
885
886         /* decide on the mode */
887         if (dev->pdev->n_msi_vectors_alloc >= (n_cpus+2))
888                 dev->flags |= MLX4_FLAG_MSI_X;
889
890         MLX4_PRINT(TRACE_LEVEL_WARNING ,MLX4_DBG_LOW ,
891                 ("Interrupt mode '%s', n_vectors %d, n_cpus %d, Affinity %#I64x\n",
892                 (dev->flags & MLX4_FLAG_MSI_X) ? "MSI-X" : "Legacy", 
893                 dev->pdev->n_msi_vectors_alloc, n_cpus, cpus));
894
895 }
896
897
898 static struct pci_device_id * mlx4_find_pci_dev(USHORT ven_id, USHORT dev_id)
899 {
900         struct pci_device_id *p_id = mlx4_pci_table;
901         int i;
902
903         // find p_id (appropriate line in mlx4_pci_table)
904         for (i = 0; i < MLX4_PCI_TABLE_SIZE; ++i, ++p_id) {
905                 if (p_id->device == dev_id && p_id->vendor ==  ven_id)
906                         return p_id;
907         }
908         return NULL;
909 }
910
911
912 int mlx4_init_one(struct pci_dev *pdev, struct mlx4_dev_params *dev_params)
913 {
914         struct pci_device_id *id;
915         struct mlx4_priv *priv;
916         struct mlx4_dev *dev;
917         int err;
918         NTSTATUS status;
919         int i;
920
921 #ifdef FORCE_LIVEFISH
922                 if (pdev)
923                         goto err;
924 #endif
925
926         /* we are going to recreate device anyway */
927         pdev->dev = NULL;
928         pdev->ib_dev = NULL;
929         
930         /* find the type of device */
931         id = mlx4_find_pci_dev(pdev->ven_id, pdev->dev_id);
932         if (id == NULL) {
933                 err = -ENOSYS;
934                 goto err;
935         }
936
937         /*
938          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
939          * be present)
940          */
941         if (pci_resource_len(pdev, 0) != 1 << 20) {
942                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
943                         ("Missing DCS, aborting.\n"));
944                 err = -ENODEV;
945                 goto err;
946         }
947         if (!pci_resource_len(pdev, 1)) {
948                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
949                         ("Missing UAR, aborting.\n"));
950                 err = -ENODEV;
951                 goto err;
952         }
953
954 run_as_livefish:
955         /* allocate mlx4_priv structure */
956         priv = kzalloc(sizeof *priv, GFP_KERNEL);
957         if (!priv) {
958                 MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
959                         ("Device struct alloc failed, aborting.\n"));
960                 err = -ENOMEM;
961                 goto end;
962         }
963         /* must be here for livefish */
964         INIT_LIST_HEAD(&priv->ctx_list);
965         spin_lock_init(&priv->ctx_lock);
966
967         INIT_LIST_HEAD(&priv->pgdir_list);
968         mutex_init(&priv->pgdir_mutex);
969
970         /* deal with livefish, if any */
971         dev       = &priv->dev;
972         dev->signature = MLX4_DEV_SIGNATURE;
973         dev->pdev = pdev;
974         pdev->dev = dev;
975         if (id->driver_data == LIVEFISH)
976                 dev->flags |= MLX4_FLAG_LIVEFISH;
977         if (mlx4_is_livefish(dev)) {
978                 err = mlx4_register_device(dev);
979                 if (err) {
980                         MLX4_PRINT(TRACE_LEVEL_INFORMATION ,MLX4_DBG_LOW ,
981                                 ("mlx4_register_device for livefish failed, return with error.\n"));
982                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_FAIL, 
983                                 0, errno_to_ntstatus(err), 0 ); 
984                         pdev->dev = NULL;
985                         kfree(priv);
986                 } 
987                 else {
988                 MLX4_PRINT(TRACE_LEVEL_ERROR ,MLX4_DBG_LOW ,
989                         ("MLX4_BUS started in \"livefish\" mode !!!.\n"));
990                         WriteEventLogEntryData( pdev->p_self_do, (ULONG)EVENT_MLX4_ERROR_LIFEFISH_OK, 
991                                 0, errno_to_ntstatus(err), 0 ); 
992                 }
993                 goto end;
994         }
995
996         for (i = 0; i < MLX4_MAX_PORTS; i++) 
997                 dev->dev_params.mod_port_type[i] = dev_params->mod_port_type[i];
998
999         /*
1000          * Now reset the HCA before we touch the PCI capabilities or
1001          * attempt a firmware command, since a boot ROM may have left
1002          * the HCA in an undefined state.
1003          */
1004         status = mlx4_reset(dev);
1005         if ( !NT_SUCCESS( status ) ) {
1006                 mlx4_err(dev, "Failed to reset HCA, aborting.(status %#x)\n", status);
1007                 err = -EFAULT;
1008                 goto err_free_dev;
1009         }
1010
1011         if (mlx4_cmd_init(dev)) {
1012                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1013                 goto err_free_dev;
1014         }
1015
1016         err = mlx4_init_hca(dev);
1017         if (err) {
1018                 if (err == -EACCES) 
1019                         dev->flags |= MLX4_FLAG_NOT_PRIME;
1020                 goto err_cmd;
1021         }
1022
1023         mlx4_enable_msi_x(dev);
1024
1025         err = mlx4_setup_hca(dev);
1026         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
1027                 dev->flags &= ~MLX4_FLAG_MSI_X;
1028                 err = mlx4_setup_hca(dev);
1029         }
1030
1031         if (err)
1032                 goto err_close;
1033
1034         err = mlx4_register_device(dev);
1035         if (err)
1036                 goto err_cleanup;
1037
1038         mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is INITIALIZED ! \n", (int)pdev->dev_id);
1039         return 0;
1040
1041 err_cleanup:
1042         mlx4_cleanup_mcg_table(dev);
1043         mlx4_cleanup_qp_table(dev);
1044         mlx4_cleanup_srq_table(dev);
1045         mlx4_cleanup_cq_table(dev);
1046         mlx4_cmd_use_polling(dev);
1047         mlx4_cleanup_eq_table(dev);
1048         mlx4_cleanup_mr_table(dev);
1049         mlx4_cleanup_pd_table(dev);
1050         mlx4_cleanup_uar_table(dev);
1051
1052 err_close:
1053         mlx4_close_hca(dev);
1054
1055 err_cmd:
1056         mlx4_cmd_cleanup(dev);
1057
1058 err_free_dev:
1059         pdev->dev = NULL;
1060         kfree(priv);
1061
1062 err:
1063         /* we failed device initialization - try to simulate "livefish" device to facilitate using FW burning tools */
1064         id = mlx4_find_pci_dev(pdev->ven_id, DEVID_HERMON_BD);
1065         if (id == NULL) {
1066                 err = -ENOSYS;
1067                 goto end;
1068         }
1069         goto run_as_livefish;
1070
1071 end:    
1072         return err;
1073 }
1074
1075 void mlx4_remove_one(struct pci_dev *pdev, int reset)
1076 {
1077         struct mlx4_dev  *dev  = pdev->dev;
1078         struct mlx4_priv *priv = mlx4_priv(dev);
1079         int p;
1080
1081         if (dev) {
1082                 mlx4_unregister_device(dev);
1083                 if (mlx4_is_livefish(dev))
1084                         goto done;
1085
1086                 for (p = 1; p <= dev->caps.num_ports; ++p)
1087                         mlx4_CLOSE_PORT(dev, p);
1088
1089                 mlx4_cleanup_mcg_table(dev);
1090                 mlx4_cleanup_qp_table(dev);
1091                 mlx4_cleanup_srq_table(dev);
1092                 mlx4_cleanup_cq_table(dev);
1093                 mlx4_cmd_use_polling(dev);
1094                 mlx4_cleanup_eq_table(dev);
1095                 mlx4_cleanup_mr_table(dev);
1096                 mlx4_cleanup_pd_table(dev);
1097
1098                 iounmap(priv->kar,PAGE_SIZE);
1099                 mlx4_uar_free(dev, &priv->driver_uar);
1100                 mlx4_cleanup_uar_table(dev);
1101                 mlx4_close_hca(dev);
1102                 mlx4_cmd_cleanup(dev);
1103
1104                 if (reset && mlx4_reset(dev))
1105                         mlx4_err(dev, "Failed to reset HCA\n");
1106                 mlx4_dbg(dev, "MLX4_BUS: NET device (dev_id=%d) is REMOVED ! \n", (int)pdev->dev_id);
1107                 pdev->dev = NULL;
1108 done:
1109                 kfree(priv);
1110         }
1111 }
1112
1113 int mlx4_restart_one(struct pci_dev *pdev)
1114 {
1115         struct mlx4_dev_params dev_params;
1116         mlx4_copy_dev_params(&dev_params, &pdev->dev->dev_params);
1117
1118         mlx4_remove_one(pdev, FALSE);
1119         return mlx4_init_one(pdev, &dev_params);
1120 }
1121
1122 void mlx4_net_init()
1123 {
1124         mlx4_intf_init();
1125 }
1126
1127
1128