Patch from andy yan <andyysj@gmail.com>:
[mirror/scst/.git] / mvsas_tgt / mv_init.c
1 /*
2  * Marvell 88SE64xx/88SE94xx pci init
3  *
4  * Copyright 2007 Red Hat, Inc.
5  * Copyright 2008 Marvell. <kewei@marvell.com>
6  *
7  * This file is licensed under GPLv2.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; version 2 of the
12  * License.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22  * USA
23 */
24
25
26 #include "mv_sas.h"
27 #include "mv_spi.h"
28
29 static struct scsi_transport_template *mvs_stt;
30 static const struct mvs_chip_info mvs_chips[] = {
31         [chip_6320] =   { 1, 2, 0x400, 17, 16,  9, &mvs_64xx_dispatch, },
32         [chip_6440] =   { 1, 4, 0x400, 17, 16,  9, &mvs_64xx_dispatch, },
33         [chip_6485] =   { 1, 8, 0x800, 33, 32, 10, &mvs_64xx_dispatch, },
34         [chip_9180] =   { 2, 4, 0x800, 17, 64,  9, &mvs_94xx_dispatch, },
35         [chip_9480] =   { 2, 4, 0x800, 17, 64,  9, &mvs_94xx_dispatch, },
36 };
37
38 #ifdef SUPPORT_TARGET
39 #include <scst.h>
40 #include <scst_debug.h>
41 #include "mv_tgt.h"
42 struct mvs_info *tgt_mvi;
43 struct mvs_tgt_initiator mvs_tgt;
44 #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
45 struct class_device_attribute *mvst_host_attrs[];
46 #else
47 struct device_attribute *mvst_host_attrs[];
48 #endif
49 #endif
50
51 #define SOC_SAS_NUM 2
52
53 static struct scsi_host_template mvs_sht = {
54         .module                 = THIS_MODULE,
55         .name                   = DRV_NAME,
56         .queuecommand           = sas_queuecommand,
57         .target_alloc           = sas_target_alloc,
58         .slave_configure        = mvs_slave_configure,
59         .slave_destroy          = sas_slave_destroy,
60         .scan_finished          = mvs_scan_finished,
61         .scan_start             = mvs_scan_start,
62         .change_queue_depth     = sas_change_queue_depth,
63         .change_queue_type      = sas_change_queue_type,
64         .bios_param             = sas_bios_param,
65         .can_queue              = 1,
66         .cmd_per_lun            = 1,
67         .this_id                = -1,
68         .sg_tablesize           = SG_ALL,
69         .max_sectors            = SCSI_DEFAULT_MAX_SECTORS,
70         .use_clustering         = ENABLE_CLUSTERING,
71         .eh_device_reset_handler        = sas_eh_device_reset_handler,
72         .eh_bus_reset_handler   = sas_eh_bus_reset_handler,
73         .slave_alloc            = mvs_slave_alloc,
74         .target_destroy         = sas_target_destroy,
75         .ioctl                  = sas_ioctl,
76 #ifdef SUPPORT_TARGET
77         .shost_attrs            = mvst_host_attrs,
78 #endif
79 };
80
81 static struct sas_domain_function_template mvs_transport_ops = {
82         .lldd_dev_found         = mvs_dev_found,
83         .lldd_dev_gone  = mvs_dev_gone,
84
85         .lldd_execute_task      = mvs_queue_command,
86         .lldd_control_phy       = mvs_phy_control,
87
88         .lldd_abort_task        = mvs_abort_task,
89         .lldd_abort_task_set    = mvs_abort_task_set,
90         .lldd_clear_aca         = mvs_clear_aca,
91        .lldd_clear_task_set    = mvs_clear_task_set,
92         .lldd_I_T_nexus_reset   = mvs_I_T_nexus_reset,
93         .lldd_lu_reset          = mvs_lu_reset,
94         .lldd_query_task        = mvs_query_task,
95
96         .lldd_port_formed       = mvs_port_formed,
97         .lldd_port_deformed     = mvs_port_deformed,
98
99 };
100
101 static void __devinit mvs_phy_init(struct mvs_info *mvi, int phy_id)
102 {
103         struct mvs_phy *phy = &mvi->phy[phy_id];
104         struct asd_sas_phy *sas_phy = &phy->sas_phy;
105
106         phy->mvi = mvi;
107         init_timer(&phy->timer);
108         sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0;
109         sas_phy->class = SAS;
110         sas_phy->iproto = SAS_PROTOCOL_ALL;
111         sas_phy->tproto = 0;
112         sas_phy->type = PHY_TYPE_PHYSICAL;
113         sas_phy->role = PHY_ROLE_INITIATOR;
114         sas_phy->oob_mode = OOB_NOT_CONNECTED;
115         sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
116
117         sas_phy->id = phy_id;
118         sas_phy->sas_addr = &mvi->sas_addr[0];
119         sas_phy->frame_rcvd = &phy->frame_rcvd[0];
120         sas_phy->ha = (struct sas_ha_struct *)mvi->shost->hostdata;
121         sas_phy->lldd_phy = phy;
122 }
123
124 static void mvs_free(struct mvs_info *mvi)
125 {
126         int i;
127         struct mvs_wq *mwq;
128         int slot_nr;
129
130         if (!mvi)
131                 return;
132
133         if (mvi->flags & MVF_FLAG_SOC)
134                 slot_nr = MVS_SOC_SLOTS;
135         else
136                 slot_nr = MVS_SLOTS;
137
138         for (i = 0; i < mvi->tags_num; i++) {
139                 struct mvs_slot_info *slot = &mvi->slot_info[i];
140                 if (slot->buf)
141                         dma_free_coherent(mvi->dev, MVS_SLOT_BUF_SZ,
142                                           slot->buf, slot->buf_dma);
143         }
144
145         if (mvi->tx)
146                 dma_free_coherent(mvi->dev,
147                                   sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ,
148                                   mvi->tx, mvi->tx_dma);
149         if (mvi->rx_fis)
150                 dma_free_coherent(mvi->dev, MVS_RX_FISL_SZ,
151                                   mvi->rx_fis, mvi->rx_fis_dma);
152         if (mvi->rx)
153                 dma_free_coherent(mvi->dev,
154                                   sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1),
155                                   mvi->rx, mvi->rx_dma);
156         if (mvi->slot)
157                 dma_free_coherent(mvi->dev,
158                                   sizeof(*mvi->slot) * slot_nr,
159                                   mvi->slot, mvi->slot_dma);
160 #ifndef DISABLE_HOTPLUG_DMA_FIX
161         if (mvi->bulk_buffer)
162                 dma_free_coherent(mvi->dev, TRASH_BUCKET_SIZE,
163                                   mvi->bulk_buffer, mvi->bulk_buffer_dma);
164 #endif
165
166         MVS_CHIP_DISP->chip_iounmap(mvi);
167         if (mvi->shost)
168                 scsi_host_put(mvi->shost);
169         list_for_each_entry(mwq, &mvi->wq_list, entry)
170                 cancel_delayed_work(&mwq->work_q);
171         kfree(mvi);
172 }
173
174 #ifdef MVS_USE_TASKLET
175 struct tasklet_struct   mv_tasklet;
176 static void mvs_tasklet(unsigned long opaque)
177 {
178         unsigned long flags;
179         u32 stat;
180         u16 core_nr, i = 0;
181
182         struct mvs_info *mvi;
183         struct sas_ha_struct *sha = (struct sas_ha_struct *)opaque;
184
185         core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
186         mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0];
187
188         if (unlikely(!mvi))
189                 BUG_ON(1);
190
191         for (i = 0; i < core_nr; i++) {
192                 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i];
193                 stat = MVS_CHIP_DISP->isr_status(mvi, mvi->irq);
194                 if (stat)
195                         MVS_CHIP_DISP->isr(mvi, mvi->irq, stat);
196         }
197
198 }
199 #endif
200
201 static irqreturn_t mvs_interrupt(int irq, void *opaque)
202 {
203         u32 core_nr, i = 0;
204         u32 stat;
205         struct mvs_info *mvi;
206         struct sas_ha_struct *sha = opaque;
207
208         core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
209         mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0];
210
211         if (unlikely(!mvi))
212                 return IRQ_NONE;
213
214         stat = MVS_CHIP_DISP->isr_status(mvi, irq);
215         if (!stat)
216                 return IRQ_NONE;
217
218 #ifdef MVS_USE_TASKLET
219         tasklet_schedule(&mv_tasklet);
220 #else
221         for (i = 0; i < core_nr; i++) {
222                 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i];
223                 MVS_CHIP_DISP->isr(mvi, irq, stat);
224         }
225 #endif
226         return IRQ_HANDLED;
227 }
228
229 static int __devinit mvs_alloc(struct mvs_info *mvi, struct Scsi_Host *shost)
230 {
231         int i, slot_nr;
232
233         if (mvi->flags & MVF_FLAG_SOC)
234                 slot_nr = MVS_SOC_SLOTS;
235         else
236                 slot_nr = MVS_SLOTS;
237
238         spin_lock_init(&mvi->lock);
239         for (i = 0; i < mvi->chip->n_phy; i++) {
240                 mvs_phy_init(mvi, i);
241                 mvi->port[i].wide_port_phymap = 0;
242                 mvi->port[i].port_attached = 0;
243                 INIT_LIST_HEAD(&mvi->port[i].list);
244         }
245         for (i = 0; i < MVS_MAX_DEVICES; i++) {
246                 mvi->devices[i].taskfileset = MVS_ID_NOT_MAPPED;
247                 mvi->devices[i].dev_type = NO_DEVICE;
248                 mvi->devices[i].device_id = i;
249         }
250
251         /*
252          * alloc and init our DMA areas
253          */
254         mvi->tx = dma_alloc_coherent(mvi->dev,
255                                      sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ,
256                                      &mvi->tx_dma, GFP_KERNEL);
257         if (!mvi->tx)
258                 goto err_out;
259         memset(mvi->tx, 0, sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ);
260         mvi->rx_fis = dma_alloc_coherent(mvi->dev, MVS_RX_FISL_SZ,
261                                          &mvi->rx_fis_dma, GFP_KERNEL);
262         if (!mvi->rx_fis)
263                 goto err_out;
264         memset(mvi->rx_fis, 0, MVS_RX_FISL_SZ);
265
266         mvi->rx = dma_alloc_coherent(mvi->dev,
267                                      sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1),
268                                      &mvi->rx_dma, GFP_KERNEL);
269         if (!mvi->rx)
270                 goto err_out;
271         memset(mvi->rx, 0, sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1));
272         mvi->rx[0] = cpu_to_le32(0xfff);
273         mvi->rx_cons = 0xfff;
274
275         mvi->slot = dma_alloc_coherent(mvi->dev,
276                                        sizeof(*mvi->slot) * slot_nr,
277                                        &mvi->slot_dma, GFP_KERNEL);
278         if (!mvi->slot)
279                 goto err_out;
280         memset(mvi->slot, 0, sizeof(*mvi->slot) * slot_nr);
281
282 #ifndef DISABLE_HOTPLUG_DMA_FIX
283         mvi->bulk_buffer = dma_alloc_coherent(mvi->dev,
284                                        TRASH_BUCKET_SIZE,
285                                        &mvi->bulk_buffer_dma, GFP_KERNEL);
286         if (!mvi->bulk_buffer)
287                 goto err_out;
288 #endif
289         for (i = 0; i < slot_nr; i++) {
290                 struct mvs_slot_info *slot = &mvi->slot_info[i];
291
292                 slot->buf = dma_alloc_coherent(mvi->dev, MVS_SLOT_BUF_SZ,
293                                                &slot->buf_dma, GFP_KERNEL);
294                 if (!slot->buf) {
295                         printk(KERN_DEBUG"failed to allocate slot->buf.\n");
296                         goto err_out;
297                 }
298                 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
299                 ++mvi->tags_num;
300         }
301         /* Initialize tags */
302         mvs_tag_init(mvi);
303         return 0;
304 err_out:
305         return 1;
306 }
307
308
309 int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex)
310 {
311         unsigned long res_start, res_len, res_flag, res_flag_ex = 0;
312         struct pci_dev *pdev = mvi->pdev;
313         if (bar_ex != -1) {
314                 /*
315                  * ioremap main and peripheral registers
316                  */
317                 res_start = pci_resource_start(pdev, bar_ex);
318                 res_len = pci_resource_len(pdev, bar_ex);
319                 if (!res_start || !res_len)
320                         goto err_out;
321
322                 res_flag_ex = pci_resource_flags(pdev, bar_ex);
323                 if (res_flag_ex & IORESOURCE_MEM) {
324                         if (res_flag_ex & IORESOURCE_CACHEABLE)
325                                 mvi->regs_ex = ioremap(res_start, res_len);
326                         else
327                                 mvi->regs_ex = ioremap_nocache(res_start,
328                                                 res_len);
329                 } else
330                         mvi->regs_ex = (void *)res_start;
331                 if (!mvi->regs_ex)
332                         goto err_out;
333         }
334
335         res_start = pci_resource_start(pdev, bar);
336         res_len = pci_resource_len(pdev, bar);
337         if (!res_start || !res_len)
338                 goto err_out;
339
340         res_flag = pci_resource_flags(pdev, bar);
341         if (res_flag & IORESOURCE_CACHEABLE)
342                 mvi->regs = ioremap(res_start, res_len);
343         else
344                 mvi->regs = ioremap_nocache(res_start, res_len);
345
346         if (!mvi->regs) {
347                 if (mvi->regs_ex && (res_flag_ex & IORESOURCE_MEM))
348                         iounmap(mvi->regs_ex);
349                 mvi->regs_ex = NULL;
350                 goto err_out;
351         }
352
353         return 0;
354 err_out:
355         return -1;
356 }
357
358 void mvs_iounmap(void __iomem *regs)
359 {
360         iounmap(regs);
361 }
362
363 static struct mvs_info *__devinit mvs_pci_alloc(struct pci_dev *pdev,
364                                 const struct pci_device_id *ent,
365                                 struct Scsi_Host *shost, unsigned int id)
366 {
367         struct mvs_info *mvi;
368         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
369
370         mvi = kzalloc(sizeof(*mvi) + MVS_SLOTS * sizeof(struct mvs_slot_info),
371                         GFP_KERNEL);
372         if (!mvi)
373                 return NULL;
374
375         mvi->pdev = pdev;
376         mvi->dev = &pdev->dev;
377         mvi->chip_id = ent->driver_data;
378         mvi->chip = &mvs_chips[mvi->chip_id];
379         INIT_LIST_HEAD(&mvi->wq_list);
380         mvi->irq = pdev->irq;
381
382         ((struct mvs_prv_info *)sha->lldd_ha)->mvi[id] = mvi;
383         ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy;
384
385         mvi->id = id;
386         mvi->sas = sha;
387         mvi->shost = shost;
388 #ifdef MVS_USE_TASKLET
389         tasklet_init(&mv_tasklet, mvs_tasklet, (unsigned long)sha);
390 #endif
391
392         if (MVS_CHIP_DISP->chip_ioremap(mvi))
393                 goto err_out;
394         if (!mvs_alloc(mvi, shost))
395                 return mvi;
396 err_out:
397         mvs_free(mvi);
398         return NULL;
399 }
400
401 /* move to PCI layer or libata core? */
402 static int pci_go_64(struct pci_dev *pdev)
403 {
404         int rc;
405
406         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
407                 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
408                 if (rc) {
409                         rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
410                         if (rc) {
411                                 dev_printk(KERN_ERR, &pdev->dev,
412                                            "64-bit DMA enable failed\n");
413                                 return rc;
414                         }
415                 }
416         } else {
417                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
418                 if (rc) {
419                         dev_printk(KERN_ERR, &pdev->dev,
420                                    "32-bit DMA enable failed\n");
421                         return rc;
422                 }
423                 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
424                 if (rc) {
425                         dev_printk(KERN_ERR, &pdev->dev,
426                                    "32-bit consistent DMA enable failed\n");
427                         return rc;
428                 }
429         }
430
431         return rc;
432 }
433
434 static int __devinit mvs_prep_sas_ha_init(struct Scsi_Host *shost,
435                                 const struct mvs_chip_info *chip_info)
436 {
437         int phy_nr, port_nr; unsigned short core_nr;
438         struct asd_sas_phy **arr_phy;
439         struct asd_sas_port **arr_port;
440         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
441
442         core_nr = chip_info->n_host;
443         phy_nr  = core_nr * chip_info->n_phy;
444         port_nr = phy_nr;
445
446         memset(sha, 0x00, sizeof(struct sas_ha_struct));
447         arr_phy  = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL);
448         arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL);
449         if (!arr_phy || !arr_port)
450                 goto exit_free;
451
452         sha->sas_phy = arr_phy;
453         sha->sas_port = arr_port;
454
455         sha->lldd_ha = kzalloc(sizeof(struct mvs_prv_info), GFP_KERNEL);
456         if (!sha->lldd_ha)
457                 goto exit_free;
458
459         ((struct mvs_prv_info *)sha->lldd_ha)->n_host = core_nr;
460
461         shost->transportt = mvs_stt;
462         shost->max_id = 128;
463         shost->max_lun = ~0;
464         shost->max_channel = 1;
465         shost->max_cmd_len = 16;
466
467         return 0;
468 exit_free:
469         kfree(arr_phy);
470         kfree(arr_port);
471         return -1;
472
473 }
474
475 static void  __devinit mvs_post_sas_ha_init(struct Scsi_Host *shost,
476                         const struct mvs_chip_info *chip_info)
477 {
478         int can_queue, i = 0, j = 0;
479         struct mvs_info *mvi = NULL;
480         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
481         unsigned short nr_core = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
482
483         for (j = 0; j < nr_core; j++) {
484                 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
485                 for (i = 0; i < chip_info->n_phy; i++) {
486                         sha->sas_phy[j * chip_info->n_phy  + i] =
487                                 &mvi->phy[i].sas_phy;
488                         sha->sas_port[j * chip_info->n_phy + i] =
489                                 &mvi->port[i].sas_port;
490                 }
491         }
492
493         sha->sas_ha_name = DRV_NAME;
494         sha->dev = mvi->dev;
495         sha->lldd_module = THIS_MODULE;
496         sha->sas_addr = &mvi->sas_addr[0];
497
498         sha->num_phys = nr_core * chip_info->n_phy;
499
500         sha->lldd_max_execute_num = 1;
501
502         if (mvi->flags & MVF_FLAG_SOC)
503                 can_queue = MVS_SOC_CAN_QUEUE;
504         else
505                 can_queue = MVS_CAN_QUEUE;
506
507         sha->lldd_queue_size = can_queue;
508         shost->can_queue = can_queue;
509         mvi->shost->cmd_per_lun = MVS_SLOTS/sha->num_phys;
510         sha->core.shost = mvi->shost;
511 }
512
513 #ifndef SUPPORT_TARGET
514 static void mvs_init_sas_add(struct mvs_info *mvi)
515 {
516         u8 i;
517         for (i = 0; i < mvi->chip->n_phy; i++) {
518                 mvi->phy[i].dev_sas_addr = 0x5005043011ab0000ULL;
519                 mvi->phy[i].dev_sas_addr =
520                         cpu_to_be64((u64)(*(u64 *)&mvi->phy[i].dev_sas_addr));
521         }
522
523         memcpy(mvi->sas_addr, &mvi->phy[0].dev_sas_addr, SAS_ADDR_SIZE);
524 }
525 #endif
526
527 static int __devinit mvs_pci_init(struct pci_dev *pdev,
528                                   const struct pci_device_id *ent)
529 {
530         unsigned int rc, nhost = 0;
531         struct mvs_info *mvi;
532         irq_handler_t irq_handler = mvs_interrupt;
533         struct Scsi_Host *shost = NULL;
534         const struct mvs_chip_info *chip;
535
536         dev_printk(KERN_INFO, &pdev->dev,
537                 "mvsas: driver version %s\n", DRV_VERSION);
538         rc = pci_enable_device(pdev);
539         if (rc)
540                 goto err_out_enable;
541
542         pci_set_master(pdev);
543
544         rc = pci_request_regions(pdev, DRV_NAME);
545         if (rc)
546                 goto err_out_disable;
547
548         rc = pci_go_64(pdev);
549         if (rc)
550                 goto err_out_regions;
551
552         shost = scsi_host_alloc(&mvs_sht, sizeof(void *));
553         if (!shost) {
554                 rc = -ENOMEM;
555                 goto err_out_regions;
556         }
557
558         chip = &mvs_chips[ent->driver_data];
559         SHOST_TO_SAS_HA(shost) =
560                 kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL);
561         if (!SHOST_TO_SAS_HA(shost)) {
562                 kfree(shost);
563                 rc = -ENOMEM;
564                 goto err_out_regions;
565         }
566
567         rc = mvs_prep_sas_ha_init(shost, chip);
568         if (rc) {
569                 kfree(shost);
570                 rc = -ENOMEM;
571                 goto err_out_regions;
572         }
573
574         pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost));
575 #ifdef SUPPORT_TARGET
576         tgt_mvi = kcalloc(chip->n_host, sizeof(struct mvs_info *), GFP_KERNEL);
577         if (!tgt_mvi)
578                 PRINT_ERROR("%s:allocate tgt_mvi failed", __func__);
579 #endif
580
581         do {
582                 mvi = mvs_pci_alloc(pdev, ent, shost, nhost);
583                 if (!mvi) {
584                         rc = -ENOMEM;
585                         goto err_out_regions;
586                 }
587
588 #ifdef SUPPORT_TARGET
589                 if (mvs_spi_init(mvi)) {
590                         mvs_free(mvi);
591                         rc = -EFAULT;
592                         goto err_out_regions;
593                 }
594 #else
595                 mvs_init_sas_add(mvi);
596 #endif
597
598                 mvi->instance = nhost;
599
600 #ifdef SUPPORT_TARGET
601                 ((struct mvs_info **)tgt_mvi)[nhost] = mvi;
602                 mvst_init_tgt_port(mvi);
603 #endif
604
605                 rc = MVS_CHIP_DISP->chip_init(mvi);
606                 if (rc) {
607                         mvs_free(mvi);
608                         goto err_out_regions;
609                 }
610                 nhost++;
611         } while (nhost < chip->n_host);
612
613         mvs_post_sas_ha_init(shost, chip);
614
615         rc = scsi_add_host(shost, &pdev->dev);
616         if (rc)
617                 goto err_out_shost;
618
619         rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
620         if (rc)
621                 goto err_out_shost;
622         rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED,
623                 DRV_NAME, SHOST_TO_SAS_HA(shost));
624         if (rc)
625                 goto err_not_sas;
626
627 #ifdef SUPPORT_TARGET
628         rc = mvst_init();
629         if (rc)
630                 goto err_out_shost;
631 #endif
632
633         MVS_CHIP_DISP->interrupt_enable(mvi);
634
635         scsi_scan_host(mvi->shost);
636
637         return 0;
638
639 err_not_sas:
640         sas_unregister_ha(SHOST_TO_SAS_HA(shost));
641 err_out_shost:
642         scsi_remove_host(mvi->shost);
643 err_out_regions:
644         pci_release_regions(pdev);
645 err_out_disable:
646         pci_disable_device(pdev);
647 err_out_enable:
648         return rc;
649 }
650
651 static void __devexit mvs_pci_remove(struct pci_dev *pdev)
652 {
653         unsigned short core_nr, i = 0;
654         struct sas_ha_struct *sha = pci_get_drvdata(pdev);
655         struct mvs_info *mvi = NULL;
656
657         core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
658         mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0];
659
660 #ifdef MVS_USE_TASKLET
661         tasklet_kill(&mv_tasklet);
662 #endif
663
664         pci_set_drvdata(pdev, NULL);
665         sas_unregister_ha(sha);
666         sas_remove_host(mvi->shost);
667         scsi_remove_host(mvi->shost);
668
669 #ifdef SUPPORT_TARGET
670         for (i = 0; i < core_nr; i++) {
671                 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i];
672                 mvi->flags |= MVF_HOST_SHUTTING_DOWN;
673                 if ((mvs_tgt.tgt_host_action != NULL)
674                         && (mvi->flags & MVF_TARGET_MODE_ENABLE)) {
675                         mv_dprintk("start disable target mode of host%d\n", i);
676                         mvs_tgt.tgt_host_action(mvi, EXIT_TARGET_MODE, 0);
677                 }
678         }
679         mvst_exit();
680 #endif
681
682         MVS_CHIP_DISP->interrupt_disable(mvi);
683         free_irq(mvi->irq, sha);
684         for (i = 0; i < core_nr; i++) {
685                 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i];
686                 mvs_free(mvi);
687         }
688         kfree(sha->sas_phy);
689         kfree(sha->sas_port);
690         kfree(sha);
691         pci_release_regions(pdev);
692         pci_disable_device(pdev);
693         return;
694 }
695
696 static struct pci_device_id __devinitdata mvs_pci_table[] = {
697         { PCI_VDEVICE(MARVELL, 0x6320), chip_6320 },
698         { PCI_VDEVICE(MARVELL, 0x6340), chip_6440 },
699         {
700                 .vendor         = PCI_VENDOR_ID_MARVELL,
701                 .device         = 0x6440,
702                 .subvendor      = PCI_ANY_ID,
703                 .subdevice      = 0x6480,
704                 .class          = 0,
705                 .class_mask     = 0,
706                 .driver_data    = chip_6485,
707         },
708         { PCI_VDEVICE(MARVELL, 0x6440), chip_6440 },
709         { PCI_VDEVICE(MARVELL, 0x6485), chip_6485 },
710         { PCI_VDEVICE(MARVELL, 0x9480), chip_9480 },
711         { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 },
712
713         { }     /* terminate list */
714 };
715
716 static struct pci_driver mvs_pci_driver = {
717         .name           = DRV_NAME,
718         .id_table       = mvs_pci_table,
719         .probe          = mvs_pci_init,
720         .remove         = __devexit_p(mvs_pci_remove),
721 };
722
723 #ifdef SUPPORT_TARGET
724
725 #define SATA_STR                "SATA "
726 #define SAS_STR         "SAS "
727 #define NA_STR          " "
728
729 #define END_DEV_STR             "END DEVICE"
730 #define EXPANDER_STR    "EXPANDER"
731
732 static char *mvs_get_phy_type_string(struct mvs_phy *phy)
733 {
734         if (!phy->phy_attached)
735                 return NA_STR;
736         if (phy->phy_type & PORT_TYPE_SAS)
737                 return SAS_STR;
738         else if (phy->phy_type & PORT_TYPE_SATA)
739                 return SATA_STR;
740         else
741                 return NA_STR;
742 }
743
744 static char *mvs_get_dev_type_string(struct mvs_phy *phy)
745 {
746         if (!phy->phy_attached)
747                 return NA_STR;
748         if ((phy->att_dev_info & 0x7) == 1
749                 || phy->phy_type & PORT_TYPE_SATA)
750                 return END_DEV_STR;
751         else if ((phy->att_dev_info & 0x7) == 2
752                 || (phy->att_dev_info & 0x7) == 3)
753                 return EXPANDER_STR;
754         else
755                 return NA_STR;
756 }
757
758 #if  LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
759 static ssize_t
760 mvs_show_tgt_enabled(struct class_device *cdev, char *buffer)
761 #else
762 static ssize_t
763 mvs_show_tgt_enabled(struct device *cdev,
764                 struct device_attribute *attr, char *buffer)
765 #endif
766 {
767         struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(class_to_shost(cdev));
768         struct mvs_info *mvi = NULL;
769         struct mvs_phy *phy;
770         char *phy_type, *dev_type;
771         ulong max_size = PAGE_SIZE;
772         ssize_t size = 0;
773         u8 phyid = 0, core_id, hn;
774         size = snprintf(buffer, max_size, "%-5s%-20s%-18s%-20s%-12s\n",
775                         "phy", "dev sas address", "attach dev type",
776                         "attach sas address", "target mode");
777         hn = ((struct mvs_prv_info *)sas_ha->lldd_ha)->n_host;
778         for (core_id = 0; core_id < hn; core_id++) {
779                 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[core_id];
780                 for (phyid = 0; phyid < mvi->chip->n_phy; phyid++) {
781                         phy = &mvi->phy[phyid];
782                         phy_type = mvs_get_phy_type_string(phy);
783                         dev_type = mvs_get_dev_type_string(phy);
784                         size += snprintf(buffer+size, max_size,
785                                 "%-5d%-20llx%-5s%-13s%-20llx%-15d\n",
786                                 phyid+core_id*mvi->chip->n_phy,
787                                 SAS_ADDR(&phy->dev_sas_addr),
788                                 phy_type, dev_type,
789                                 SAS_ADDR(&phy->att_dev_sas_addr),
790                                 PHY_IN_TARGET_MODE(phy->dev_info));
791                 }
792         }
793         return size;
794 }
795
796 static int mvsas_parse_ushort(const char *str, unsigned short *valp)
797 {
798         unsigned long val;
799         char *end;
800         int ret = 0;
801
802         if (!isdigit(str[0])) {
803                 ret = -1;
804                 goto bail;
805         }
806
807         val = simple_strtoull(str, &end, 0);
808         if (val > 0xffff) {
809                 ret = -1;
810                 goto bail;
811         }
812
813         *valp = val;
814
815         ret = end + 1 - str;
816         if (ret == 0)
817                 ret = -1;
818
819 bail:
820         return ret;
821 }
822
823 static void mvs_target_mode_setting(struct sas_ha_struct *sas_ha,
824                                 int action, const char *buffer)
825 {
826         struct mvs_info *mvi = NULL;
827         unsigned short val = 0, hi;
828         u8 host_no = 0;
829         if (mvsas_parse_ushort(buffer, &val) < 0)
830                 return;
831         hi = val/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
832         mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
833         if (!mvi) {
834                 mv_dprintk("failed to get root pointer\n");
835                 return;
836         }
837         if (val > mvi->chip->n_host*mvi->chip->n_phy)
838                 return;
839         while (val+1 > mvi->chip->n_phy) {
840                 val -= mvi->chip->n_phy;
841                 host_no++;
842         }
843         switch (action) {
844         case MVSAS_ENABLE_TGT:
845                 mv_dprintk("Enable phy%d\n", val+host_no*mvi->chip->n_phy);
846                 mvs_tgt.tgt_host_action(mvi, ENABLE_TARGET_MODE, val);
847                 msleep_interruptible(10*1000);
848                 break;
849         case MVSAS_DISABLE_TGT:
850                 mv_dprintk("Disable phy%d\n", val+host_no*mvi->chip->n_phy);
851                 mvs_tgt.tgt_host_action(mvi, DISABLE_TARGET_MODE, val);
852                 msleep_interruptible(10*1000);
853                 break;
854         default:
855                 break;
856         }
857 }
858
859
860 #if   LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
861 static ssize_t
862 mvs_store_tgt_enabled(struct class_device *cdev,
863                           const char *buffer, size_t size)
864 #else
865 static ssize_t
866 mvs_store_tgt_enabled(struct device *cdev, struct device_attribute *attr,
867                           const char *buffer, size_t size)
868 #endif
869 {
870         struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(class_to_shost(cdev));
871         char *p, *e;
872         int force = 0, action = 0;
873
874         if (buffer == NULL)
875                 return size;
876
877         if (mvs_tgt.tgt_host_action == NULL) {
878                 mv_printk("not acting for lack of target driver\n");
879                 return size;
880         }
881
882         if ((size > 1) && (buffer[1] == 'f')) {
883                 force = 1;
884                 mv_dprintk("forcing the matter\n");
885         }
886         p = (char *)buffer;
887         if (p[strlen(p) - 1] == '\n')
888                 p[strlen(p) - 1] = '\0';
889         if (!strncasecmp("enable", p, 6)) {
890                 mv_printk("get enable\n");
891                 p += 6;
892                 action = MVSAS_ENABLE_TGT;
893         } else if (!strncasecmp("disable ", p, 7)) {
894                 mv_printk("get disable\n");
895                 p += 7;
896                 action = MVSAS_DISABLE_TGT;
897         } else {
898                 mv_printk("Unknown action \"%s\"", p);
899                 return size;
900         }
901
902         switch (action) {
903         case MVSAS_ENABLE_TGT:
904         case MVSAS_DISABLE_TGT:
905                 while (isspace(*p) && *p != '\0')
906                         p++;
907                 e = p;
908                 while (!isspace(*e) && *e != '\0')
909                         e++;
910                 *e = 0;
911                 break;
912         }
913
914         mvs_target_mode_setting(sas_ha, action, p);
915
916         return size;
917 }
918
919 #if  LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
920
921 static CLASS_DEVICE_ATTR(target_mode,
922                          S_IRUGO|S_IWUSR,
923                          mvs_show_tgt_enabled,
924                          mvs_store_tgt_enabled);
925
926 struct class_device_attribute *mvst_host_attrs[] = {
927         &class_device_attr_target_mode,
928         NULL,
929 };
930 #else
931 static DEVICE_ATTR(target_mode,
932                          S_IRUGO|S_IWUSR,
933                          mvs_show_tgt_enabled,
934                          mvs_store_tgt_enabled);
935
936 struct device_attribute *mvst_host_attrs[] = {
937         &dev_attr_target_mode,
938         NULL,
939 };
940
941 #endif
942
943 #endif  /* #ifdef SUPPORT_TARGET */
944
945
946
947 static int __init mvs_init(void)
948 {
949         int rc;
950
951         mvs_stt = sas_domain_attach_transport(&mvs_transport_ops);
952         if (!mvs_stt)
953                 return -ENOMEM;
954
955         rc = pci_register_driver(&mvs_pci_driver);
956
957         if (rc)
958                 goto err_out;
959
960         return 0;
961
962 err_out:
963         sas_release_transport(mvs_stt);
964         return rc;
965 }
966
967 static void __exit mvs_exit(void)
968 {
969         pci_unregister_driver(&mvs_pci_driver);
970         sas_release_transport(mvs_stt);
971 }
972
973 module_init(mvs_init);
974 module_exit(mvs_exit);
975
976 MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
977 MODULE_DESCRIPTION("Marvell 88SE6440 SAS/SATA controller driver");
978 MODULE_VERSION(DRV_VERSION);
979 MODULE_LICENSE("GPL");
980 #ifdef CONFIG_PCI
981 MODULE_DEVICE_TABLE(pci, mvs_pci_table);
982 #endif